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* e100: proc_int should be high when interruptedJosh Blum2011-06-201-3/+1
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* e100: added proc_int and buffer for async messagesJosh Blum2011-06-192-17/+49
| | | | | | | | Redirected the tx_err stream into a buffer_int2, and connected interrupt when a packet is written. The proc_int is muxed into the aux spi miso to use when its not being selected for spi.
* u1e: core compile now works as a fullchip lintMatt Ettus2011-06-161-1/+1
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* u1p/u1e: cleanup some warnings, connect the correct clocksMatt Ettus2011-06-161-3/+3
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* Merge branch 'usrp_e100_aux_spi' into dsp_rebaseMatt Ettus2011-06-155-156/+24
|\ | | | | | | | | | | | | | | | | | | * usrp_e100_aux_spi: usrp-e100: removed passthrough files, not needed w/ aux spi for clock chip usrp-e100: make reg_test32 persistent across resets, bump compat number usrp-e100: work on aux spi Conflicts: usrp2/top/E1x0/u1e_core.v
| * usrp-e100: removed passthrough files, not needed w/ aux spi for clock chipJosh Blum2011-06-093-139/+0
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| * usrp-e100: make reg_test32 persistent across resets, bump compat numberJosh Blum2011-06-081-2/+3
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| * usrp-e100: work on aux spiJosh Blum2011-06-082-17/+22
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* | u1e/u1p: new register map for new dspMatt Ettus2011-06-151-13/+16
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* | u1p: work in dual rx and frontend from u1eMatt Ettus2011-06-141-3/+1
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* | u1e-dsp: attach tx dc offset and iq balanceMatt Ettus2011-06-141-6/+9
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* | u1e: update u1e to use new rx_frontend, and give it a 2nd rx dsp coreMatt Ettus2011-06-081-21/+74
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* added copyrightsJosh Blum2011-06-074-0/+68
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* lots of renaming and moving around of toplevel directories to reflect ↵Matt Ettus2011-06-0714-0/+1137
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