aboutsummaryrefslogtreecommitdiffstats
path: root/usrp2/top/B100
Commit message (Expand)AuthorAgeFilesLines
* fpga: force -include_global for custom sourcesJosh Blum2012-03-121-1/+1
* fpga: fix custom defs in some top level makefilesJosh Blum2012-03-082-99/+1
* dsp rework: implement 64 bit ticks no secondsJosh Blum2012-02-061-1/+1
* B100: External FPGA reset from FX2 reuses fpga_cfg_cclk.Nick Foster2012-02-062-2/+6
* dsp rework: pass vita clears into dsp modules, unified fifo clearsJosh Blum2012-02-041-22/+17
* b100: timing constraints on GPIF linesJosh Blum2012-02-041-0/+9
* b100: connect all clears for gpifJosh Blum2012-02-031-1/+1
* dsp rework: rehash of the custom module stuff and readmeJosh Blum2012-02-022-6/+13
* dsp rework: custom engine module for rx/tx vita chainJosh Blum2012-02-011-3/+6
* Merge branch 'slave_fifo_rebase' into dsp_reworkJosh Blum2012-02-013-20/+27
|\
| * Fix missing B100 core_compile (poor Git hygeine)Nick Foster2012-01-231-0/+1
| * b100: bumped fpga compat number for slave fifo modeJosh Blum2012-01-121-1/+1
| * B100: moar buffering on TX for better performance in bidirectional applicationsNick Foster2012-01-121-2/+2
| * Squashed slave mode changes onto master.Nick Foster2012-01-124-19/+25
* | dsp rework: added double buffer interface to vita txJosh Blum2012-01-281-1/+1
* | dsp rework: moved scale and round into ddc chainJosh Blum2012-01-281-1/+1
* | dsp rework: top level fixes B100/E100Josh Blum2012-01-272-4/+4
* | dsp rework: integrated custom dsp module shellsJosh Blum2012-01-272-5/+9
* | dsp rework: implemented dsp changes for other top levelsJosh Blum2012-01-271-18/+34
* | dsp rework: u2_core test implementationJosh Blum2012-01-261-2/+2
|/
* need more umph out of correction valuesJosh Blum2011-11-101-1/+1
* convenience makefiles for top level projectsJosh Blum2011-11-051-0/+14
* increase vita rx fifosize to 10, like USRP2, make things workJosh Blum2011-11-041-2/+2
* b100: fix warnings, complete removal of test codeMatt Ettus2011-11-041-16/+4
* u1e/u1p: GPIOs switched over to setting regsMatt Ettus2011-10-271-11/+19
* 32 bit compat number for E and B seriesJosh Blum2011-10-261-5/+4
* u1e/u1p: removed led setting regMatt Ettus2011-10-261-7/+2
* u1p/u1e: partially redone atr and gpio redoMatt Ettus2011-10-261-22/+9
* u1e/u1p: remove unused UARTMatt Ettus2011-10-261-13/+0
* connect and map b100 and e100 front-panel ledsJosh Blum2011-10-111-1/+1
* B100: use gpif_misc on R2 hw, invert direction of gpif_misc pinsNick Foster2011-09-191-2/+2
* u1e,u1p: turn off debug pins, misc cleanupsMatt Ettus2011-09-081-5/+6
* u1p: proper format in ucf fileMatt Ettus2011-09-085-4/+474
* b100: gpif_rst resynced to gpif_clkMatt Ettus2011-08-261-1/+1
* B100/E100: fix ATR RX mode pins not connectedNick Foster2011-08-101-2/+2
* appease the ISE godsMatt Ettus2011-07-191-0/+1
* b100: fix for fpga syntax error on xfer_rateJosh Blum2011-07-191-1/+1
* u1p: remove uart and bus testing to fit easierMatt Ettus2011-06-161-8/+9
* u1p: remove unused portsMatt Ettus2011-06-161-1/+0
* u1p/u1e: cleanup some warnings, connect the correct clocksMatt Ettus2011-06-161-8/+7
* u1e/u1p: new register map for new dspMatt Ettus2011-06-151-13/+16
* u1p: work in dual rx and frontend from u1eMatt Ettus2011-06-141-13/+60
* u1p: new tx dsp frontend, copied from u1eMatt Ettus2011-06-141-10/+17
* added copyrightsJosh Blum2011-06-072-0/+34
* lots of renaming and moving around of toplevel directories to reflect product...Matt Ettus2011-06-077-0/+855
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-15 20:24:18 +0000