| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | 16 bit wide spi core | Matt Ettus | 2010-03-27 | 1 | -0/+182 |
| * | remove timescale junk | Matt Ettus | 2010-03-26 | 5 | -21/+19 |
| * | remove the #1 delay in all the regs. They just slow down sims. | Matt Ettus | 2010-02-22 | 4 | -96/+90 |
| * | Moved usrp2 fpga files into usrp2 subdir. | Josh Blum | 2010-01-22 | 331 | -0/+1515024 |
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