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* Fix for SPI SS > 8 bits wideNick Foster2010-07-281-2/+2
* separate boot ram, redone memory map, connected uartMatt Ettus2010-07-131-2/+2
* barely fails timing on gigE/10 and gigE/12, larger fail on udp/10, but allMatt Ettus2010-06-142-11/+21
* first attempt at cleaning up the build systemMatt Ettus2010-06-101-0/+28
* added pragmas suggested by Ian Buckley to help ISE12 synthesisMatt Ettus2010-05-181-3/+6
* get rid of old CVS linkageMatt Ettus2010-05-18221-315/+0
* Moved usrp2 fpga files into usrp2 subdir.Josh Blum2010-01-22331-0/+1515024