| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | E100: revert unnecessary change to fifo_to_gpmc | Josh Blum | 2013-05-09 | 1 | -3/+7 |
| * | e100: switch to fixed length xfers | Josh Blum | 2013-03-14 | 3 | -33/+34 |
| * | e100: tighten timing - less routing on EM_A | Josh Blum | 2012-07-19 | 2 | -2/+2 |
| * | e100: renamed top level for E100/E110 to E1x0 | Josh Blum | 2012-07-17 | 1 | -7/+7 |
| * | gpmc: squashed GPMC FIFO work for E100 | Josh Blum | 2012-07-16 | 5 | -162/+93 |
| * | gpmc: tighter timing constraints and easier to route gpmc to fifo | Josh Blum | 2012-07-16 | 1 | -11/+26 |
| * | e100: offset gpmc to fifo writes by 2 transfers | Josh Blum | 2012-07-15 | 1 | -4/+4 |
| * | e100: reverted commit registering in gpmc | Josh Blum | 2012-07-15 | 1 | -38/+1 |
| * | Added registers for gpmc-to-fifo interface to address sequence errors for E10... | Al Fayez | 2012-05-22 | 1 | -1/+38 |
| * | fpga: xclock fix for edge case condition | Josh Blum | 2012-05-08 | 1 | -6/+8 |
| * | e100: squashed work on bus implementation on GPMC | Josh Blum | 2011-08-29 | 19 | -942/+521 |
| * | added copyrights | Josh Blum | 2011-06-07 | 11 | -0/+187 |
| * | fifo36_mux now has shortfifos on the input ports as well as output | Matt Ettus | 2011-02-25 | 2 | -6/+3 |
| * | timed tester : Bring out src/dst flags for rx chain for testing. | Philip Balister | 2011-02-25 | 1 | -1/+11 |
| * | u1e: hook up tester controls | Matt Ettus | 2011-02-17 | 1 | -5/+7 |
| * | move declarations to before use | Matt Ettus | 2011-02-16 | 1 | -8/+8 |
| * | hook up under/overruns for debug purposes | Matt Ettus | 2011-02-16 | 1 | -5/+5 |
| * | e100: integrate loopback and timed testing into main image | Matt Ettus | 2011-02-16 | 1 | -5/+89 |
| * | allow for CS to rise before, at the same time, or after OE | Matt Ettus | 2010-09-24 | 1 | -7/+6 |
| * | added ability to clear out fifos of tx and rx. | Matt Ettus | 2010-06-17 | 2 | -16/+16 |
| * | Merge branch 'master' into u1e_newbuild | Matt Ettus | 2010-06-14 | 1 | -0/+20 |
| * | debug pins | Matt Ettus | 2010-06-08 | 2 | -3/+8 |
| * | added little endian capability for gpmc to fifo and fifo to gpmc, since ARM i... | Matt Ettus | 2010-06-06 | 2 | -4/+4 |
| * | get rid of redundant fifo18, since we can just use fifo19 and ignore the occ bit | Matt Ettus | 2010-06-06 | 2 | -4/+6 |
| * | moved fifos into gpmc_async, reorganized top level a bit, added in crc packet... | Matt Ettus | 2010-05-12 | 1 | -38/+53 |
| * | have_space and have_packet now stay high even while busy, | Matt Ettus | 2010-05-03 | 3 | -4/+6 |
| * | Only allow new packets if we can fit the largest possible packet (2KB) | Matt Ettus | 2010-04-23 | 1 | -1/+1 |
| * | Register outputs to omap to prevent runt pulses from falsely triggering inter... | Matt Ettus | 2010-04-23 | 3 | -7/+20 |
| * | access frame length regs from wishbone | Matt Ettus | 2010-04-15 | 1 | -4/+4 |
| * | async seems to work with packet lengths now. Still need to do wishbone regs ... | Matt Ettus | 2010-04-15 | 3 | -22/+35 |
| * | async gpmc progress | Matt Ettus | 2010-04-15 | 2 | -0/+153 |
| * | add bus error reporting | Matt Ettus | 2010-04-15 | 1 | -3/+9 |
| * | correct name of module | Matt Ettus | 2010-04-15 | 1 | -2/+2 |
| * | progress on synchronous gpmc, but it may not be possible due to the limited n... | Matt Ettus | 2010-04-15 | 3 | -43/+45 |
| * | handle all tri-state in the top level of gpmc | Matt Ettus | 2010-04-15 | 2 | -6/+6 |
| * | more sync progress. This is just a skeleton for now, with junk content | Matt Ettus | 2010-04-14 | 1 | -0/+56 |
| * | more progress on synchronous interface | Matt Ettus | 2010-04-14 | 3 | -26/+94 |
| * | renamed to async. Will be building a sync version for GPMC_CLK | Matt Ettus | 2010-04-14 | 1 | -2/+2 |
| * | make timing diagrams for bus transactions. Still need to do reads | Matt Ettus | 2010-04-14 | 5 | -0/+46 |
| * | probably won't be using this, and it hasn't been tested | Matt Ettus | 2010-04-14 | 1 | -0/+46 |
| * | minor changes to get it to synthesize | Matt Ettus | 2010-04-13 | 1 | -1/+1 |
| * | replaced ram interface with a fifo interface. still need to do rx side | Matt Ettus | 2010-04-12 | 2 | -81/+110 |
| * | split out gpmc to wishbone interface to make gpmc top level cleaner | Matt Ettus | 2010-04-12 | 1 | -0/+57 |
| * | gpmc debug pins | Matt Ettus | 2010-02-25 | 1 | -1/+8 |
| * | fix syntax error which icarus allowed (filed a bug with them) | Matt Ettus | 2010-02-25 | 1 | -7/+9 |
| * | corrected logic | Matt Ettus | 2010-02-25 | 1 | -17/+7 |
| * | edge sync on done signals so we only fill/empty one buffer | Matt Ettus | 2010-02-25 | 2 | -2/+32 |
| * | First cut at passing data buffers around on GPMC bus | Matt Ettus | 2010-02-25 | 2 | -11/+122 |
| * | first cut at making a bidirectional 2 port ram for the gpmc data interface | Matt Ettus | 2010-02-23 | 1 | -6/+18 |
| * | speed up the presentation of registered wb data to the gpmc | Matt Ettus | 2010-02-17 | 1 | -2/+5 |
