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* N320: Reduce PLL lock timemichael-west2021-08-161-5/+5
| | | | | | | - Reduce PLL1 DLD lock count to 4,000 (0xFA0), or 100ms - Change loop to check for lock every 10ms Signed-off-by: michael-west <michael.west@ettus.com>
* mpm: zbx: Fix revision compat checkMartin Braun2021-07-081-11/+35
| | | | | | | | | | | | | | | The revision compat check for ZBX hardware is broken. It requires the rev_compat register to read 1. However, that is the value for RevA, which we are deliberately *not* supporting. Supported revisions are B and C, which have a rev_compat value of 2. We therefore change the check to support revision 2, but not 1. In the future, we would support revisions 2 and up if there are more revs to ZBX. Valid rev_compat values are tracked in a whitelist (which we need to update as we produce more revisions). This patch fixes an issue where MPM wouldn't start when ZBX revisions B or C are plugged in.
* uhd: Add support for the USRP X410Lars Amsel2021-06-1010-23/+1271
| | | | | | | | | | | | | | | | Co-authored-by: Lars Amsel <lars.amsel@ni.com> Co-authored-by: Michael Auchter <michael.auchter@ni.com> Co-authored-by: Martin Braun <martin.braun@ettus.com> Co-authored-by: Paul Butler <paul.butler@ni.com> Co-authored-by: Cristina Fuentes <cristina.fuentes-curiel@ni.com> Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com> Co-authored-by: Virendra Kakade <virendra.kakade@ni.com> Co-authored-by: Lane Kolbly <lane.kolbly@ni.com> Co-authored-by: Max Köhler <max.koehler@ni.com> Co-authored-by: Andrew Lynch <andrew.lynch@ni.com> Co-authored-by: Grant Meyerhoff <grant.meyerhoff@ni.com> Co-authored-by: Ciro Nishiguchi <ciro.nishiguchi@ni.com> Co-authored-by: Thomas Vogel <thomas.vogel@ni.com>
* mpm: mg: periphs: Read lowband lo lock status from cpldmattprost2021-04-191-1/+2
| | | | | | | Fix the issue where N310 did not correctly read the lo lock status from the cpld. Signed-off-by: mattprost <matt.prost@ni.com>
* mpm: Add DboardIface for MB DB driver controlToni Jones2021-03-043-0/+103
| | | | | | | | Add DboardIface class which will act as an interface to bridge the gap between MB and DB drivers in MPM. The DboardIface will be implemented by each Motherboard with MB specific information. Dboard objects will then instantiate the class in order to utilize the implemented control functions.
* sim: Add Daughterboard MethodsSamuel O'Brien2020-10-071-7/+9
| | | | | | | | This commit adds daughterboard simulation to the simulator. There is a sim_dboard class which registers it's methods with the rpc server. These methods are visible over mpm as well as the mpm_shell. Signed-off-by: Samuel O'Brien <sam.obrien@ni.com>
* rh: Enable inverse sinc filter for DAC37J82Martin Braun2020-08-121-1/+1
| | | | | This enables the inv_sinc_ab and inv_sinc_cd flags for the DAC, turning on the inverse sinc filter.
* mpm: Look for pca953x based devices by device/nameSteven Koo2020-06-112-3/+3
| | | | | | | | | | The pca953x driver introduced a change for how the "label" property populates. Instead of using the device model, it gives a device specific name. As a replacement, use device/name. This affects the tca6424 and tca6408. For the kernel change that causes this see: https://github.com/torvalds/linux/commit/5128f8d4450159f59565d247437d3bedda3994cb
* mpm: mg: Make set_master_clock_rate() an async callMartin Braun2019-11-261-2/+2
| | | | | | The ad9371 call set_master_clock_rate() can take a while depending on the rate change, so make it asynchronous in order not to lock out the reclaimer loop.
* e310: Fix issues in MPM and UHDMartin Braun2019-11-261-1/+13
| | | | | | | | | | | - Remove superfluous INFO logging - Improve formatting in many places - Improve Pylint score in various places - Add tear_down to DB object - Simplify custom EEPROM code for E310 - Fix time source selection code - Remove references to GPS_CTRL and GPS_STATUS (are E320 only) - Move clock source control out of MboardRegs object
* mpm: Clean up code, improve Pylint scoreMartin Braun2019-11-261-30/+28
| | | | | | | | | | | | | | | | Many small cleanups: - Fix copyright headers - Fix superfluous imports - Pull some constants out of classes where appropriate - Fix formatting - Improve/fix some docstrings - Disable specific Pylint warnings where appropriate - Global catches use BaseException instead of Exception - Don't use len() for empty checks - Make sure to declare all self attributes in __init__ (note: this is particularly of interest for E310, becuase its regular init happens outside of __init__) - Compacted some E310 code that had multi-DB checks
* x300/mpmd: Port all RFNoC devices to the new RFNoC frameworkMartin Braun2019-11-262-3/+2
| | | | | | | Co-Authored-By: Alex Williams <alex.williams@ni.com> Co-Authored-By: Sugandha Gupta <sugandha.gupta@ettus.com> Co-Authored-By: Brent Stapleton <brent.stapleton@ettus.com> Co-Authored-By: Ciro Nishiguchi <ciro.nishiguchi@ni.com>
* n3xx: mg: Make set_freq() call asynchronousMartin Braun2019-08-221-0/+14
| | | | | | | This does not change the MPM/UHD API, but it makes the set_freq() call asynchronous on the MPM side. The upside is that it will release the GIL if the set_freq() call takes too long, e.g., because of MPM calibrations.
* mpm: mg: Only import AD9371 API calls if not yet on MagnesiumMartin Braun2019-08-221-2/+3
| | | | | This will avoid importing API calls from the self.mykonos object onto the Magnesium class if the Magnesium class already has such a method.
* e310/e320: Move E310 to MPM architecture and refactorSugandha Gupta2019-05-014-2/+231
| | | | | | | | | | | | - Turns the E310 into an MPM device (like N3xx, E320) - Factor out common code between E320 and E310, maximize sharing between the two devices - Remove all pre-MPM E310 code that is no longer needed - Modify MPM to remove all existing overlays before applying new ones (this is necessary to enable idle image mode for E310) Co-authored-by: Virendra Kakade <virendra.kakade@ni.com> Signed-off-by: Virendra Kakade <virendra.kakade@ni.com>
* mpm: rhodium: Fix clock value log formattingMartin Braun2019-02-221-2/+3
| | | | | Before, the log messages would occasionally print 6 digits worth of precision for sample clock values that only require 2.
* mpm: rhodium: Fix typo in log messageMartin Braun2019-02-221-1/+1
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* mpm: n320: Properly check for the LO distribution boardMartin Braun2019-02-192-9/+23
| | | | | | | | Without this patch, the N320 code will rely on an error to occur to determine the non-existence of the N321 LO distribution board. While this works, it forces an error message where there's no error. This will first check for the existence of the board before trying to initialize it.
* mpm: Fix up Rhodium EEPROM handling for BfrfsEEPROMAlex Williams2019-01-231-24/+3
| | | | | | Fixes Rhodium for changes introduced in b7bab6a. The constructor call for BfrfsEEPROM didn't match the signature, and Rhodium's EEPROM map referred to the wrong revision.
* rhodium: Fix some Pylint warningsMartin Braun2019-01-211-6/+4
| | | | Remove some semicolons and superfluous imports.
* rh: general code cleanupMark Meserve2019-01-103-8/+9
| | | | | | | | - Add default bandwidth range - Add default mash order constant - Delete MPM todos - Cleanup whitespace in MPM python code - Add docstring for is_lo_dist_present
* mpm: Factor out user EEPROM code into own moduleMartin Braun2018-12-202-169/+8
| | | | | Affects Magnesium and Rhodium classes, which where duplicating this code.
* uhd/mpm: eiscat: Various changesRyan Marlow2018-12-192-28/+41
| | | | | | | | | | | | | | - correct lmk initialization parameters - adding missing parameters and consts wrt clock synchronization. - fixed default master clock rate - eiscat, ddc: update xml. - remove references to CORDIC_FREQ in ddc_eiscat - update readback reg addr in radio_eiscat - set default spp from 3992 to 3968. - updated jesd mode sequence initialization - updating eiscat_radio_ctrl_impl - add rx_codecs to property tree to display correct ADC chip. - updated issue_stream_cmd
* rh: remove polarity setting for sdclkout11Mark Meserve2018-12-121-2/+2
| | | | - output 11 is unused, a value of 0 will leave the polarity as normal
* rh: add functions to toggle lowband loMark Meserve2018-12-122-0/+20
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* rh: Enable clock synchronization error checkingHumberto Jimenez2018-11-291-7/+3
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* mpm: rh: Remove n321 overlayAlex Williams2018-11-271-1/+0
| | | | | | The n321 overlay is no longer needed. The devices have been added to the n320 overlay because the kernel cannot tear down multiple overlays reliably.
* rh: Fix update_ref_clock_freq() to update init argsHumberto Jimenez2018-11-261-0/+3
| | | | | | The update_ref_clock_freq() procedure now updates the self._init_args value of the Rhodium class daugtherboard objects in MPM to propagate the latest user-selected arguments for future reference.
* rh: fix typo in set_clk_safe_stateMark Meserve2018-11-161-1/+1
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* cmake: Update coding style to use lowercase commandsMartin Braun2018-11-141-4/+4
| | | | | | | | | | | | | | | | | Also updates our coding style file. Ancient CMake versions required upper-case commands. Later command names became case-insensitive. Now the preferred style is lower-case. Run the following shell code (with GNU compliant sed): cmake --help-command-list | grep -v "cmake version" | while read c; do echo 's/\b'"$(echo $c | tr '[:lower:]' '[:upper:]')"'\(\s*\)(/'"$c"'\1(/g' done > convert.sed \ && git ls-files -z -- bootstrap '*.cmake' '*.cmake.in' \ '*CMakeLists.txt' | xargs -0 gsed -i -f convert.sed && rm convert.sed (Make sure the backslashes don't get mangled!)
* rh: change uio access to utilize with-asMark Meserve2018-11-122-79/+85
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* mpm: rh: Add MAX 10 update scriptAlex Williams2018-11-071-0/+165
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* rh: add lo distribution supportMark Meserve2018-11-052-3/+144
| | | | | | | | | - This is a combination of 5 commits. - rh: add lo distribution board gpio expander - rh: add lo distribution mpm functions - rh: add code to conditionally initialize lo distribution - rh: change empty i2c device from exception to assertion - rh: add lo distribution board control
* rh: disable lmk test outputMark Meserve2018-10-301-1/+1
| | | | - Improves spur performance
* rh: Phase DAC configuration clean-upHumberto Jimenez2018-10-301-6/+4
| | | | | | | | | | | | | | | | | | | | | - Confirmed the Phase DAC to be initialized at mid-scale. - Confirmed the Phase DAC step resolution for fine clock shifting. The clock synchronization algorithm relies on the Phase DAC to fine shift the sampling clocks on each daughterboard. Only a certain number of DAC codes are required for the actual clock adjustment, thus a different range of codes may be chosen by initializing the Phase DAC with a given value. With the selected range, one may measure the Phase DAC's linearity and step resolution, which defines how many steps are required when performing the fine shifting of the clocks. After initializing the 16-bit Phase DAC at 25%, 50% (mid-scale), and 75%; it was found that the clock distribution PLL locks relatively faster when using mid-scale (2^15). By testing the Phase DAC's linearity, it was confirmed that the circuit resolution is 1.11 ps per code.
* rh: Deterministic latency optimization in JESD204BHumberto Jimenez2018-10-301-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | - Optimized JESD204B RX/TX links' latency. - Made JESD latency constant across supported frequencies. - Checking RX SYSREF capture in the FPGA deframer block. The JESD204B standard can be linked in such a way to produce a repeatable, deterministic delay from the framer to deframer. This is accomplished by setting up a LMFC (local multiframe clock) in both devices. The LMFCs are reset whenever a SYSREF edge is captured by the framer and deframer. Therefore, it is simple to control the LMFC rising edges in each device by implementing variable delay elements on the SYSREF pulses to the framer and deframer. Latency across the JESD204B TX/RX links should remain constant and deterministic across the supported sampling_clock_rate values. By testing the roundtrip latency (i.e. FPGA -> TX -> RX -> FPGA) with different delay values in the FPGA, one may decrease the latency and provide enough setup and hold margin for the data to be transfered through each JESD link. It was found that a different set of SYSREF delay values are required for sampling_clock_rate = 400 MSPS to match the latency of the other supported rates.
* rh: add support for rhodium devicesMark Meserve2018-10-2510-0/+2520
| | | | | | Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com> Co-authored-by: Alex Williams <alex.williams@ni.com> Co-authored-by: Derek Kozel <derek.kozel@ni.com>
* nijesdcore: add variable configuration supportMark Meserve2018-10-252-2/+8
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* mg: adding skip_rfic argumentTrung Tran2018-10-181-2/+3
| | | | | | This change to add skip_rfic as an device argument. skip_rfic should be only used in ref_clock bist tests to bring down the test time.
* mpm: identify sysfs gpios more genericallyMark Meserve2018-10-181-1/+1
| | | | | - Allow generic path names to be given for each search parameter instead of only checking the label
* N310: Clarify logging for when re-inits occurTrung Tran2018-10-161-0/+2
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* mpm: dboard_manager: add more args to update_ref_clock_freqTrung Tran2018-10-122-2/+3
| | | | | | | | | | | | | | | Summary: This change will allow correct args to pass from mboard to dboards, that in turn can be useful for dboard manager. Details: In N310, the dboard manager needs the time source to be updated before calling update_ref_clock_source(), because it will trigger a reinit of the dboard, for which the time_source is essential to determine correct clock synchronizer settings. The special case is the white rabbit time source needs a different internal ref_clock_frequency for the clock synchronizer than the passed in ref_clock_freq.
* mpm: mg: move init_rf_cal before JESD de/framer bringupTrung Tran2018-08-161-4/+4
| | | | This sequence is the one as described by the AD9371 user guide.
* e320: Add all 5 temp sensors, fan sensor and rssi sensors per channelSugandha Gupta2018-08-091-4/+2
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* mpm: n3xx: clocking API changes for transitioning clock and time sourcesDaniel Jepson2018-08-022-4/+81
| | | | | | Added set_sync_source method to set both the time and clock sources without forcing a re-init twice. Modified the existing set_time_source and set_clock_source methods to call into set_sync_source.
* mpm: mg: periphs: Modify AD9361 reset function to keep it in resetMartin Braun2018-08-021-2/+9
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* uio: mpm: Fixup for opening mboard-regs UIOBrent Stapleton2018-07-231-13/+13
| | | | | | | | | - Fix the syntax to open mboard-regs UIO objects, and change the open() and close() functions to be private. - We were calling open() twice in every context manager line- once manually, and once in __enter__. This commit corrects those usages, and allows the context manager to fully manage the opening and closing of UIO objects.
* e320: mpm: Add dboard and mboard sensorsSugandha Gupta2018-07-181-13/+57
| | | | | | | | Adding the following sensors: - Catalina temperature, RSSI, and LO Lock sensors - GPS lock, time, TPV, and SKY sensors Co-authored-by: Brent Stapleton <brent.stapleton@ettus.com>
* mpm: initial commit of E320 codeBrent Stapleton2018-07-183-4/+286
| | | | Co-authored-by: Sugandha Gupta <sugandha.gupta@ettus.com>
* mpm: mg: Adding fast-reinit modeMartin Braun2018-07-172-19/+99
| | | | | | | | | | When a device is re-initialized without any changes (e.g., master_clock_rate, ref_clock_freq) then we can skip the initialization sequence and move on. This shaves a significant amount of time from the init sequence. Fast re-init can be overridden by providing the `force_reinit=1` device arg.
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