| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | octoclock: Fixed merge conflict. Utils compile now. | Ashish Chaudhari | 2014-08-07 | 1 | -1/+15 |
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| * | Merge branch 'master' into ashish/cat_refactor_master | Ashish Chaudhari | 2014-08-05 | 22 | -39/+72 |
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| | * | Merge branch 'maint' | Martin Braun | 2014-08-01 | 14 | -22/+22 |
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| | | * | Updated documentation | Nicholas Corgan | 2014-07-31 | 14 | -22/+22 |
| | | | | | | | | | | | | | | | | * Updated UHD documentation-related URL's after manual overhaul * Updated NI-USRP URL to link to NI-USRP 1.3 | ||||
| | * | | Updated master-specfic documentation | Nicholas Corgan | 2014-07-31 | 3 | -4/+12 |
| | | | | | | | | | | | | | | | | * Updated manual URL on OctoClock documentation after manual overhaul * Improved "Coding to the API" page | ||||
| | * | | Merge branch 'maint' | Martin Braun | 2014-07-31 | 4 | -11/+35 |
| | |\| | | | | | | | | | | | | | Conflicts: host/utils/usrp_burn_mb_eeprom.cpp | ||||
| | | * | usrp_burn_mb_eeprom: write all changes to the EEPROM at once | Nicholas Corgan | 2014-07-31 | 1 | -2/+3 |
| | | | | | | | | | | | | | * Utility was unnecessarily wearing out EEPROMs by calling separate writes for each key | ||||
| | | * | Merge branch 'maint' into uhd/bug492 | michael-west | 2014-07-30 | 13 | -56/+174 |
| | | |\ | | | | | | | | | | | | | | | | | Conflicts: host/lib/usrp/b200/b200_impl.cpp | ||||
| | | | * | tx fe corrections: fixing mixed tabs / spaces, other horrible whitespace cruft | Ben Hilburn | 2014-07-25 | 2 | -14/+11 |
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| | | | * | Merge 'maint' into x300/bug513 | Ben Hilburn | 2014-07-25 | 4 | -6/+7 |
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| | | | | * | Updated images package info for UHD 3.7.2 rc1003_007_002_rc1 | Nicholas Corgan | 2014-07-23 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | | | | | | * MD5sum from commit 6ca920485a30034cc4673d382fd37ff7a719c3e4 is invalid | ||||
| | | | * | | X300: Added UHD support for TX FE | Ian Buckley | 2014-07-18 | 2 | -1/+14 |
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| | | * | | | Fix for BUG #492: UHD: set_time_unknown_pps() fails with GPSDO installed | michael-west | 2014-06-25 | 3 | -3/+17 |
| | | | | | | | | | | | | | | | | | | | | | - Added polling for PPS time change after setting time from GPSDO. | ||||
| | * | | | | usrp_burn_mb_eeprom: write all changes to EEPROM at once | Nicholas Corgan | 2014-07-28 | 1 | -2/+3 |
| | | | | | | | | | | | | | | | | | | | | | * Manually applied 1f848914a09795a37156968cc7a5dd11fcb869d3 to master due to merge conflict | ||||
| * | | | | | b200: Added variable rate SPI core for AD9361 and ADF4001 | Ashish Chaudhari | 2014-08-01 | 8 | -8/+159 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | - Added b200_local_spi core that adjusts the divider when talking to the two chips - AD9361 rate is 1MHz and ADF4001 rate is 10kHz | ||||
| * | | | | | b200: Moved AD9361 driver to host | Ashish Chaudhari | 2014-08-01 | 19 | -147/+2877 |
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | - Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow | ||||
| * | | | | Updated images info | Nicholas Corgan | 2014-07-23 | 1 | -2/+2 |
| | | | | | | | | | | | | | | | | | * URL from commit a2f47725f5e6a182c3b30b10c2ce08778fd98123 is invalid | ||||
| * | | | | Updated images URL+MD5sum with new OctoClock firmware+bootloader | Nicholas Corgan | 2014-07-23 | 1 | -2/+2 |
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| * | | | | OctoClock firmware upgrade, added host driver | Nicholas Corgan | 2014-07-23 | 48 | -76/+2602 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * OctoClock can communicate with UHD over Ethernet * Can read NMEA strings from GPSDO and send to host * Added multi_usrp_clock class for clock devices * uhd::device can now filter to return only USRP devices or clock devices * New OctoClock bootloader can accept firmware download over Ethernet * Added octoclock_burn_eeprom,octoclock_firmware_burner utilities * Added test_clock_synch example to show clock API | ||||
| * | | | | Merge branch 'maint' | Nicholas Corgan | 2014-07-23 | 2 | -3/+3 |
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| | * | | | Updated UHD version and images URL+MD5sum for 3.7.2 rc1 | Nicholas Corgan | 2014-07-23 | 2 | -3/+3 |
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| * | | | | Merge branch 'origin/maint' | Ben Hilburn | 2014-07-22 | 2 | -3/+4 |
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| | * | | | Commented out warning if X300 reference clock fails to lock within 1 second ↵ | michael-west | 2014-07-22 | 1 | -2/+3 |
| | | | | | | | | | | | | | | | | | during initialization. Sometimes it takes longer and that is OK. | ||||
| | * | | | Fix for BUG #517: B200: Regression of power level on RX | michael-west | 2014-07-22 | 1 | -1/+1 |
| | | |/ | |/| | | | | | | | - Fixed scalar for RX DSP core | ||||
| * | | | added explanation of Boost thread warning message | Neel Pandeya | 2014-07-22 | 1 | -8/+13 |
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| * | | | Merge remote-tracking branch 'origin/maint' | Ben Hilburn | 2014-07-17 | 3 | -25/+121 |
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| | * | | Updated copyright year. | michael-west | 2014-07-17 | 1 | -1/+1 |
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| | * | | Fix for BUG #469 | michael-west | 2014-07-17 | 1 | -0/+2 |
| | | | | | | | | | | | | | - Added mutex for write_uart() | ||||
| | * | | - Changed variables from uint8_t to uint32_t so parsing of hex strings would ↵ | michael-west | 2014-07-17 | 1 | -3/+3 |
| | | | | | | | | | | | | | work properly. | ||||
| | * | | Addressing comments from review. | michael-west | 2014-07-17 | 2 | -15/+21 |
| | | | | | | | | | | | | | | | | | | | - Corrected types of some variables to be boost types. - Removed debugging code accidentally left in. - Changed some compiled out error messages to log messages. | ||||
| | * | | Fix for BUG #469: Bad/Empty GPS NMEA strings returned when the queries are ↵ | michael-west | 2014-07-17 | 2 | -20/+108 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | made in a random wait iterative fashion Fix for BUG #460: X300: GPGGA sensor most often empty, while RMC is usually OK - Added checksum verification of NMEA strings - Improved handling of short or malformed strings - Fixed GPSDO data synchronization between X300 firmware and host | ||||
| | * | | Merge branch 'origin/b200/bug516' into maint | Ben Hilburn | 2014-07-17 | 1 | -4/+4 |
| | |\ \ | | | | | | | | | | | | | Fixing B200 clock rate float compare. | ||||
| | | * | | BUG #516: B210: Fails to Run with 30.72 MHz Clock | michael-west | 2014-07-10 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | | - Addressed feedback from review. | ||||
| | | * | | Fix for BUG #516: B210: Fails to Run with 30.72 MHz Clock | michael-west | 2014-06-18 | 1 | -3/+3 |
| | | | | | | | | | | | | | | | | | - Corrected clock rate checks for B2x0 | ||||
| | | * | | Fix for BUG #516: B210: Fails to Run with 30.72 MHz Clock | michael-west | 2014-06-18 | 1 | -3/+3 |
| | | |/ | | | | | | | | | | - Corrected clock rate checks for B2x0 | ||||
| * | | | Merge branch 'origin/martin/utils/init_only_probe' | Ben Hilburn | 2014-07-17 | 1 | -1/+2 |
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| | * | | | utils: uhd_usrp_probe gets argument --init-only | Martin Braun | 2014-07-11 | 1 | -1/+2 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will run the tool without the output (unless --tree is provided). Using --init-only, uhd_usrp_probe can be used to simply test a device in more detail than doing a uhd_find_device, but the output of the device initalization is not scrolled by because of the device info output. | ||||
| * | | | | Merge remote-tracking branch 'origin/maint' | Ben Hilburn | 2014-07-17 | 4 | -13/+24 |
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| | * | | Merge branch 'origin/ashish/rx_pcie_overflows' into maint | Ben Hilburn | 2014-07-17 | 2 | -3/+7 |
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| | | * \ | Merge branch 'maint' into ashish/rx_pcie_overflows | Ashish Chaudhari | 2014-07-15 | 4 | -4/+4 |
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| | | * | | | x300: Bugfix for overflows on PCIe at 200MS/s | Ashish Chaudhari | 2014-06-27 | 2 | -3/+7 |
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| | * | | | Merge branch 'origin/b200/bug512' into maint | Ben Hilburn | 2014-07-17 | 1 | -9/+15 |
| | |\ \ \ | | | | | | | | | | | | | | | | B200 now creates internal PPS. Depends on FPGA change. | ||||
| | | * | | | Enhancement #512: B210: Need an Internal PPS | michael-west | 2014-06-13 | 1 | -9/+15 |
| | | | | | | | | | | | | | | | | | | | | | - Added support for internal PPS selection (set as default) | ||||
| | * | | | | Fix for BUG #527: N200: 50 Msps results in two tones | michael-west | 2014-07-01 | 1 | -1/+2 |
| | | |_|/ | |/| | | | | | | | | | | - Adjusted check to enable first half-band filter only if the rate is decimated enough between the CIC and other half-band filter | ||||
| * | | | | Merge branch 'maint' | Ben Hilburn | 2014-06-30 | 4 | -4/+4 |
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| | * | | | Fixing help text for --ref argument in some examples. Reported by Marcus | Ben Hilburn | 2014-06-30 | 4 | -4/+4 |
| | | |/ | |/| | | | | | | | Mueller. | ||||
| * | | | Merge branch 'maint' | Nicholas Corgan | 2014-06-17 | 3 | -3/+9 |
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| | * | | Merge branch 'origin/b200/bug500' into maint - Fixing B200 phase alignment issue | Ben Hilburn | 2014-06-16 | 3 | -3/+9 |
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| | | * | | - Changed XOR to OR for REG_DSP_RX_MUX flags. | michael-west | 2014-06-12 | 1 | -3/+3 |
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| | | * | | Fix for BUG #500: B210: RX channels are not phase aligned | michael-west | 2014-06-06 | 3 | -3/+9 |
| | | | | | | | | | | | | | | | | | - Adding UHD side code to invert second RX channel | ||||
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