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* x300: Timing changes for the new DAC data interfaceAshish Chaudhari2015-03-122-7/+16
| | | | | | | | | - Switched DAC to DCI delay bypass mode because we shift the DCI in the FPGA now - Changed LMK control to add 900ps delay to DAC clocks to be consistent with the radio_clk delay. The timing analyzer is expecting the two clocks to have a 0 deg phase diff.
* x300: Multiple firmware fixes for VivadoAshish Chaudhari2015-02-171-2/+2
| | | | | | | | - Refactored SFP+ hotplug handler - GigE link state comes from SFP+ status and PHY status - Multiple tracing enhancements - Bumped firmware compat number to 4 - Bumpled FPGA compat number to 10
* Merge branch 'bhilburn/uhdcalibpath' into maintAshish Chaudhari2015-02-111-4/+7
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| * Creating the $UHD_CONFIG_DIR env var, here used for custom cal data storage.Ben Hilburn2015-02-111-1/+1
| | | | | | | | This is a renaming of the previously created $UHDCALIBPATH.
| * uhd::paths - fixing `get_app_path` to use correct `get_env_var` functionBen Hilburn2015-02-101-4/+7
| | | | | | | | | | Also added new enviornment variable, "UHDCALIBPATH", so that users can use something other than system-required environment paths.
* | ad936x: removing gain_offset from rx set_gainJon Kiser2015-02-112-21/+6
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* | uhd::paths: Fixed empty string in error messageBen Hilburn2015-02-101-0/+1
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* cmake: fixed setting RC_TRIMMED_VERSION_PATCHNicholas Corgan2015-01-301-1/+1
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* cmake: Dev branches can get a named versionMartin Braun2015-01-282-2/+6
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* Merging new UHD_IMAGES_DIR utilities and bug fixes.Ben Hilburn2015-01-2718-248/+318
| | | | Also includes NI-USRP Windows Registry Key fixes.
* e300: Bumped FPGA compat number to 6.Ashish Chaudhari2015-01-261-1/+1
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* Merge branch 'maint' into e300/clk_pps_updatesAshish Chaudhari2015-01-263-9/+24
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| * ad9361: Removed unnecessary digital TX attenuationAshish Chaudhari2015-01-231-1/+7
| | | | | | | | | | | | - Fix ported from He. The current TX filter does not need the additional -6dB of headroom. Set it to zero so we meet our max power specs.
| * fixup! ad9361: More check for interpolation/decim ratiosAshish Chaudhari2015-01-231-1/+1
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| * Merge remote-tracking branch 'origin/maint' into ashish/bug672Ashish Chaudhari2015-01-236-7/+1602
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| | * ad9361: More check for interpolation/decim ratiosMartin Braun2015-01-232-7/+16
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| * | b200: Bugfix#672: Enable the correct half-bandsAshish Chaudhari2015-01-211-1/+1
| | | | | | | | | | | | - The control bits for the small and the large half-bands were swapped which would cause the large HB to run too fast. Swapped hb0 and hb1 bits to fix the issue.
* | | e300: Several bugfixes for E300 clk/pps selection codeAshish Chaudhari2015-01-233-26/+6
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* | | e300: UHD support for refclk disciplining using PPS.Ashish Chaudhari2015-01-224-18/+82
| |/ |/| | | | | | | | | - Only supported value for clk_source is internal - time_source automatically changes the disciplining pulse source - Added ref_locked sensor
* | UBX: Add UBX Supportmichael-west2015-01-224-0/+1586
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* ad9361: bugfix for ad9361 gain value truncationJon Kiser2015-01-202-6/+10
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* e300: Changed (max) serial number from 6 to 8.Moritz Fischer2015-01-202-4/+19
| | | | | | | | | | This works without hickup because we store the serial as a \0 terminated string. Note: We now also write the data version fields, as they might come in handy one day. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
* B200: Bug #656. Added FIR coeffs for filters with Fs/4 stop band.Ian Buckley2015-01-194-17/+69
| | | | AD9361 driver can now select coeffs for different interpolation ratios.
* cmake: Added ENABLE_STATIC_LIBS optionMartin Braun2015-01-191-1/+12
| | | | | | | - Allows building static libraries - For users calling find_package(UHD), provides extra options for building apps statically linking UHD. - Updated the init_usrp example to link UHD statically.
* e300: Removed duplicate FPGA loading functionMoritz Fischer2015-01-152-31/+0
| | | | Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
* docs: Amended docs for conversion routinesMartin Braun2015-01-141-0/+13
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* b200: Added lo_locked sensorMartin Braun2015-01-143-1/+12
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* convert: Removed default-all-lines 12-bit packerMartin Braun2015-01-141-21/+6
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* convert: Limit sc12 converter buffer overwriteTom Tsou2015-01-141-12/+74
| | | | | | | | | | | | | | | | | | | | | This patch addresses issue #648 "B200: TX with SC12 format and MIMO". The observed MIMO header corruption was caused by overwriting the end of the packed 12-bit sample output buffer. The overwrite was due to the converter call always writing out 4 complex samples even if less than 4 samples were available. The extra samples would corrupt data with zero padding. Avoid the overwrite condition by only writing the minimum number of 32-bit lines necessary rather than the entire 12 byte struct. Samples 32-bit lines 1 1 2 2 3 3 4 3 Signed-off-by: Tom Tsou <tom@tsou.cc>
* e300: rssi sensor network supportJulian Arnold2015-01-124-2/+22
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* b200: rssi sensorJulian Arnold2015-01-121-1/+3
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* ad9361: rssi readoutJulian Arnold2015-01-124-2/+40
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* x300: Fix for BUG #655: X300: Device Time Not Getting Set from GPSDOmichael-west2015-01-121-8/+6
| | | | - Moved setting of tick rate before setting of PPS time
* uhd: Fix for BUG #650: multi_usrp::get_usrp_tx/rx_info returning incorrect ↵michael-west2015-01-121-6/+6
| | | | dboard info for second mboard
* convert: Fix sc12 unpack shiftingTom Tsou2015-01-121-8/+8
| | | | | | | | | | | | Resolve issue #666 "B200: Rx signal distortion when using SC12". During 12-bit unpacking, OTW samples are shifted into the high order bits of the 16-bit intermediate values. The remaining 4-bits are not zeroed and contain bits from adjacent samples. Consequently, signal distortion becomes noticable with spurs and other random signal garbage when operating at low signal levels. Signed-off-by: Tom Tsou <tom@tsou.cc>
* e100: fixed typo in fpga_downloaderNicholas Corgan2015-01-071-2/+2
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* e300,x300: Bumped FPGA compat numberAshish Chaudhari2014-12-162-2/+2
| | | | | - X300: FPGA compat 9 - E300: FPGA compat 5
* e300,x300: Moved LED register space as not to overlap w/ GPIOsAshish Chaudhari2014-12-162-2/+2
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* nirio: Address linking issues on OSXMartin Braun2014-12-151-3/+4
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* b200: Fix for PLL setting not being applied intermittentlyAshish Chaudhari2014-12-102-2/+2
| | | | - Made the methods in adf4001_ctrl virtual
* b200: select valid 10 MHz ref (update GPIO) *before* updating ADF4001 ↵Balint Seeber2014-12-081-3/+4
| | | | external ref selection
* x300: Fixed FC window issue (was off by one)Martin Braun2014-12-021-1/+10
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* b200: serialized access to get_rx/tx_streamJulian Arnold2014-11-212-0/+6
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* x300: Clarified FPGA compat error messageMartin Braun2014-11-211-5/+10
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* x300: Cleaned up DAC ctrl and clock init logicAshish Chaudhari2014-11-066-201/+318
| | | | | | | | | | | - DAC: Squashed configuration into 2 main operations: reset and reset_and_resync - DAC: Put in sleep mode during configuration - DAC: Synchronize only if streaming to more than one DAC - DAC: Use falling edge sync mode - DAC: Fixed power up/down settings - DAC: Frontend sync failure is fatal - Clocks: Refactored clock source change logic - Clocks: Cleaned up init and lock-check sequence
* x300: Fixed typo in io_implMartin Braun2014-11-041-1/+1
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* UHD Tune: Clipping RF LO freq to FE's range in MANUAL tune.Ben Hilburn2014-10-291-1/+3
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* MISO and SIMO configurations no longer allowedJulian Arnold2014-10-211-0/+5
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* bugfix: UHD does not build in msvc when USB feature is disabledAshish Chaudhari2014-10-141-0/+4
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* nirio: Made new nirio iface code compile with GCCAshish Chaudhari2014-10-103-14/+13
| | | | - Addressed GCC specific errors and warnings
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