| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | | x300: Check FPGA compat before firmware compat | Ashish Chaudhari | 2015-04-21 | 1 | -2/+3 | |
| | | | | | | | | | - The firmware is a subset of the FPGA so this order makes sense | |||||
| * | | Merge branch 'master' into vivado | Ashish Chaudhari | 2015-04-21 | 4 | -340/+472 | |
| |\ \ | | | | | | | | | | | | | Conflicts: host/lib/usrp/x300/x300_clock_ctrl.cpp | |||||
| | * | | Merge branch 'maint' | Martin Braun | 2015-04-10 | 4 | -335/+467 | |
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| | | * | Increase command FIFO depth of N2x0 and X3x0 to 64. | michael-west | 2015-04-10 | 1 | -2/+2 | |
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| | | * | X300: Change dboard clock rate to 50 MHz | michael-west | 2015-04-10 | 3 | -333/+465 | |
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| * | | | Merge branch 'master' into vivado | Ashish Chaudhari | 2015-04-09 | 4 | -2/+17 | |
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| | * | | Merge branch 'maint' | Martin Braun | 2015-04-06 | 3 | -1/+16 | |
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| | | * | uhd: Add ability to get and set command time through dboard_iface. | michael-west | 2015-04-03 | 3 | -2/+17 | |
| | | | | | | | | | | | | | | | | This creates a wb_iface child class called timed_wb_iface, which adds support for timed commands. | |||||
| | * | | Merge branch 'maint' | Martin Braun | 2015-03-31 | 1 | -1/+1 | |
| | |\| | | | | | | | | | | | | | Conflicts: host/docs/usrp_e3x0.dox | |||||
| | | * | x300: Fix for Bug #714: Phase wobble across four channels on two devices | Neel Pandeya | 2015-03-30 | 1 | -1/+1 | |
| | | | | | | | | | | | | | - Increased filter loop bandwith on clock control chip | |||||
| * | | | Merge branch 'master' into ashish/vivado | Ashish Chaudhari | 2015-03-30 | 1 | -2/+2 | |
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| | * | | Merge branch 'maint' | Martin Braun | 2015-03-27 | 1 | -2/+2 | |
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| | | * | Warning fixes | Nicholas Corgan | 2015-03-27 | 1 | -2/+2 | |
| | | | | | | | | | | | | | | | | | | | | | | * CMake now not applying C++ flags to C files * GCC 4.4: anti-aliasing rules * MSVC: narrowing, differences in subclass function parameters * Clang: uninitialized variables | |||||
| * | | | Merge branch 'master' into ashish/vivado | Ashish Chaudhari | 2015-03-17 | 4 | -148/+135 | |
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| | * | | gpio: Renamed enums to avoid clash with generic, compiler-provided names | Martin Braun | 2015-03-11 | 1 | -7/+7 | |
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| | * | | B200: UHD support for FPGPIO connector on REV6+ boards. | Ian Buckley | 2015-03-09 | 2 | -19/+22 | |
| | | | | | | | | | | | | | | | | | | | - GPIO on UART connector all board Revs - Consolidated fpgpio_bitbang into fpgpio example and renamed it gpio - Changed FP_GPIO readback address to match X300 | |||||
| | * | | Merge branch 'maint' | Martin Braun | 2015-01-12 | 1 | -8/+6 | |
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| | * | | | revert unnecessary change to the SR_LEDS | Brooks Prumo | 2015-01-05 | 1 | -1/+1 | |
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| | * | | | x300: support new 120 MHz bandwidth versions of the NI-branded X310s | Brooks | 2014-12-22 | 2 | -84/+102 | |
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| | * | | | Merge branch 'maint' | Martin Braun | 2014-12-16 | 2 | -2/+2 | |
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| | * | | | | x300: Fixed minor issues in X300 clk code | Ashish Chaudhari | 2014-12-05 | 1 | -2/+2 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | - Bugfix for #638 - get_ref_locked will check lock status one last time before giving up | |||||
| | * | | | | x300: Made use of new CHDR packing routines | Martin Braun | 2014-12-03 | 1 | -43/+9 | |
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| | * | | | | Merge branch 'maint' | Martin Braun | 2014-12-02 | 1 | -1/+10 | |
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| | * | | | | | uhd: replaced the `images_error` with a generic utility error | Ben Hilburn | 2014-11-21 | 1 | -7/+7 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Deleted images.*, moved functionality to paths.* - Applies for all devices that check FPGA or FW compat numbers - Adds generic utility search tool | |||||
| * | | | | | | x300: Timing changes for the new DAC data interface | Ashish Chaudhari | 2015-03-12 | 2 | -7/+16 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Switched DAC to DCI delay bypass mode because we shift the DCI in the FPGA now - Changed LMK control to add 900ps delay to DAC clocks to be consistent with the radio_clk delay. The timing analyzer is expecting the two clocks to have a 0 deg phase diff. | |||||
| * | | | | | | x300: Multiple firmware fixes for Vivado | Ashish Chaudhari | 2015-02-17 | 1 | -2/+2 | |
| | |_|_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Refactored SFP+ hotplug handler - GigE link state comes from SFP+ status and PHY status - Multiple tracing enhancements - Bumped firmware compat number to 4 - Bumpled FPGA compat number to 10 | |||||
| * | | | | | Merging new UHD_IMAGES_DIR utilities and bug fixes. | Ben Hilburn | 2015-01-27 | 1 | -7/+7 | |
| | |_|_|/ |/| | | | | | | | | | | | Also includes NI-USRP Windows Registry Key fixes. | |||||
| * | | | | x300: Fix for BUG #655: X300: Device Time Not Getting Set from GPSDO | michael-west | 2015-01-12 | 1 | -8/+6 | |
| | |_|/ |/| | | | | | | | | - Moved setting of tick rate before setting of PPS time | |||||
| * | | | e300,x300: Bumped FPGA compat number | Ashish Chaudhari | 2014-12-16 | 1 | -1/+1 | |
| | | | | | | | | | | | | | | | | - X300: FPGA compat 9 - E300: FPGA compat 5 | |||||
| * | | | e300,x300: Moved LED register space as not to overlap w/ GPIOs | Ashish Chaudhari | 2014-12-16 | 1 | -1/+1 | |
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| * | | x300: Fixed FC window issue (was off by one) | Martin Braun | 2014-12-02 | 1 | -1/+10 | |
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| * | x300: Clarified FPGA compat error message | Martin Braun | 2014-11-21 | 1 | -5/+10 | |
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| * | x300: Cleaned up DAC ctrl and clock init logic | Ashish Chaudhari | 2014-11-06 | 6 | -201/+318 | |
| | | | | | | | | | | | | - DAC: Squashed configuration into 2 main operations: reset and reset_and_resync - DAC: Put in sleep mode during configuration - DAC: Synchronize only if streaming to more than one DAC - DAC: Use falling edge sync mode - DAC: Fixed power up/down settings - DAC: Frontend sync failure is fatal - Clocks: Refactored clock source change logic - Clocks: Cleaned up init and lock-check sequence | |||||
| * | x300: Fixed typo in io_impl | Martin Braun | 2014-11-04 | 1 | -1/+1 | |
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| * | x300,nirio: Added support for NI-RIO 14.0 | Ashish Chaudhari | 2014-10-10 | 3 | -20/+17 | |
| | | | | | | | | | | - Split niriok_proxy interfaces to support NI-RIO <=13.0 and >=14.0 kernel interfaces - Fixed multi-session race conditions by synchronizing niriok_proxy access - Fixed bug switching from NI LV-FPGA access to UHD access by changing how devices are hashed into a reservation table - Fixed calculation of FRAC values for CBX and SBX LO tuning by rounding instead of truncating - Fixed bug that was not setting two MSBs for band select configuration of CBX LO - Submitting on behalf of Patrick Sisterhen, Matthew Crymble | |||||
| * | x300: Reduced the TX buffer from 576K to 520K | Ashish Chaudhari | 2014-10-09 | 2 | -2/+2 | |
| | | | | | | - Trading performance for stability. This helps meet timing at the cost of a shorter processing time window between sends. - Bumped FPGA compat number to 8 | |||||
| * | Merge branch 'maint' | Martin Braun | 2014-09-25 | 7 | -55/+162 | |
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| | * | x300: Reverted back to no analog delay for DAC ref clocks | michael-west | 2014-09-25 | 1 | -5/+0 | |
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| | * | x300: added reset and resync of ADCs and DACs when changing reference clock | michael-west | 2014-09-25 | 6 | -54/+166 | |
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| * | | Merge branch 'maint' | Martin Braun | 2014-09-24 | 1 | -0/+1 | |
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| | * | x300: Added output sync for DAC reference clocks | Martin Braun | 2014-09-24 | 1 | -0/+1 | |
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| * | | Give user the option to ignore daughterboard's calibration file at runtime | Nicholas Corgan | 2014-09-02 | 2 | -2/+8 | |
| | | | | | | | | | | | * Add "ignore-cal-file" to the uhd::device_addr_t arguments * Added documentation for new feature | |||||
| * | | Added missing pure virtual destructors to base classes | Nicholas Corgan | 2014-09-01 | 6 | -4/+22 | |
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| * | | Merge branch 'maint' | Martin Braun | 2014-09-01 | 1 | -1/+1 | |
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| | * | x300_dboard_iface: added UHD_UNUSED() macro to unused parameters in ↵ | Nicholas Corgan | 2014-08-29 | 1 | -1/+1 | |
| | | | | | | | | | | | | | set_clock_enabled() * Removes GCC warning about unused parameters | |||||
| * | | Merge branch 'maint' | Martin Braun | 2014-08-18 | 3 | -43/+37 | |
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| | * | Bumping FPGA compat to 7. | michael-west | 2014-08-18 | 1 | -1/+1 | |
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| | * | Changed analog delay on DAC reference and radio clocks from 1075ps to 900ps | michael-west | 2014-08-18 | 1 | -4/+4 | |
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| | * | - Fixes for channel alignment | michael-west | 2014-08-18 | 2 | -42/+36 | |
| | | | | | | | | | | | | | | | | | | | | | - Added analog delay for radio clock - Added analog delay for DAC reference clocks - Removed resetting of clock control - Removed setting of reference clock and PPS to external sources during initialization - Fixes for set_time_unknown_pps - Removed wait for PPS edge after setting time from GPSDO - Changed set_time_unknonw_pps to time out based on system time rather than device VITA time | |||||
| * | | Merge branch 'maint' | Martin Braun | 2014-07-31 | 2 | -10/+22 | |
| |\| | | | | | | | | | Conflicts: host/utils/usrp_burn_mb_eeprom.cpp | |||||
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