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* x300: Bumped max HW rev to 8Martin Braun2015-07-161-1/+1
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* Added uhd::image_loader class and uhd_image_loader utilityNicholas Corgan2015-07-156-8/+538
| | | | | | * Single class for loading firmware/FPGA images onto devices instead of multiple utilities * Loading functions are registered for each device, corresponding to their --args="type=foo" name * Deprecation warnings added to all product-specific image loading utilities
* Merge branch 'maint'Martin Braun2015-07-141-1/+0
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| * x300: Removed stray debug printMartin Braun2015-07-141-1/+0
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* | Updated compat numbers for B2x0 and X3x0Martin Braun2015-07-141-1/+1
| | | | | | | | | | - B2x0: FW compat number (goes with previous firmware update) - X3x0: Max HW rev number
* | Merge branch 'maint'Martin Braun2015-07-142-0/+11
|\| | | | | | | | | | | | | | | | | | | Conflicts: fpga-src host/CMakeLists.txt host/cmake/Modules/UHDVersion.cmake host/lib/usrp/b200/b200_impl.hpp host/lib/usrp/e300/e300_fpga_defs.hpp host/lib/usrp/x300/x300_fw_common.h
| * x300: Added max hw rev checkingMartin Braun2015-07-142-0/+11
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* | x300: Added retry mechanism to ADC capture delay self-calAshish Chaudhari2015-07-141-47/+65
| | | | | | | | | | - If the self-cal fails, UHD waits for 2 sec for the ADC temp to stabilize and retries the self-cal
* | x300: Updated pre-rev7 board delays after characterizationAshish Chaudhari2015-07-141-3/+2
| | | | | | | | - Characterized over process and temperature
* | x300: Fixed Windows build issue in x300_clock_ctrlAshish Chaudhari2015-07-091-3/+4
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* | x300: Added FPGA->ADC Clock delay for rev 7+ boardsAshish Chaudhari2015-07-071-1/+1
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* | x300: Bumped FPGA compat number to 11Ashish Chaudhari2015-07-071-1/+1
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* | x300: Added self-cal to tune ADC source-sync data delaysAshish Chaudhari2015-07-073-50/+160
| | | | | | | | | | | | | | - Self-calibration routine steps through various values of IDELAY taps on the SS data bits to detect metastability in the capture interface and computes an ideal delay tap value - Self calibration is triggered at device creation
* | x300: Added self-cal to tune ADC clk delay at startupAshish Chaudhari2015-07-013-33/+239
| | | | | | | | | | | | | | | | - Self-calibration routine steps through various values of LMK delay to detect metastability in the SSCLK -> radio_clk crossing and computes an ideal delay for the ADC clock. - Self calibration is triggered at startup if the self_cal_adc_delay device arg is specified
* | x300: Added set/get_clock_delay to x300_clock_ctrlAshish Chaudhari2015-07-012-17/+244
| | | | | | | | | | | | | | - This function allows delaying divider pairs using the digital and analog delay blocks in the LMK divider - ctrl object caches delay for later retrieval - Minor fixes to LMK regmap
* | Merge branch 'maint'Martin Braun2015-06-091-16/+28
|\| | | | | | | | | | | | | Conflicts: host/lib/usrp/common/ad9361_ctrl.hpp host/lib/usrp/common/ad9361_driver/ad9361_device.h host/lib/usrp/e300/e300_remote_codec_ctrl.hpp
| * x300: Updated clock rate / ref freq warnings for clarityMartin Braun2015-05-221-16/+28
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* | x300: Check FPGA compat before firmware compatAshish Chaudhari2015-04-211-2/+3
| | | | | | | | - The firmware is a subset of the FPGA so this order makes sense
* | Merge branch 'master' into vivadoAshish Chaudhari2015-04-214-340/+472
|\ \ | | | | | | | | | | | | Conflicts: host/lib/usrp/x300/x300_clock_ctrl.cpp
| * | Merge branch 'maint'Martin Braun2015-04-104-335/+467
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| | * Increase command FIFO depth of N2x0 and X3x0 to 64.michael-west2015-04-101-2/+2
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| | * X300: Change dboard clock rate to 50 MHzmichael-west2015-04-103-333/+465
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* | | Merge branch 'master' into vivadoAshish Chaudhari2015-04-094-2/+17
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| * | Merge branch 'maint'Martin Braun2015-04-063-1/+16
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| | * uhd: Add ability to get and set command time through dboard_iface.michael-west2015-04-033-2/+17
| | | | | | | | | | | | | | | This creates a wb_iface child class called timed_wb_iface, which adds support for timed commands.
| * | Merge branch 'maint'Martin Braun2015-03-311-1/+1
| |\| | | | | | | | | | | | | Conflicts: host/docs/usrp_e3x0.dox
| | * x300: Fix for Bug #714: Phase wobble across four channels on two devicesNeel Pandeya2015-03-301-1/+1
| | | | | | | | | | | | - Increased filter loop bandwith on clock control chip
* | | Merge branch 'master' into ashish/vivadoAshish Chaudhari2015-03-301-2/+2
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| * | Merge branch 'maint'Martin Braun2015-03-271-2/+2
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| | * Warning fixesNicholas Corgan2015-03-271-2/+2
| | | | | | | | | | | | | | | | | | | | | * CMake now not applying C++ flags to C files * GCC 4.4: anti-aliasing rules * MSVC: narrowing, differences in subclass function parameters * Clang: uninitialized variables
* | | Merge branch 'master' into ashish/vivadoAshish Chaudhari2015-03-174-148/+135
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| * | gpio: Renamed enums to avoid clash with generic, compiler-provided namesMartin Braun2015-03-111-7/+7
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| * | B200: UHD support for FPGPIO connector on REV6+ boards.Ian Buckley2015-03-092-19/+22
| | | | | | | | | | | | | | | | | | - GPIO on UART connector all board Revs - Consolidated fpgpio_bitbang into fpgpio example and renamed it gpio - Changed FP_GPIO readback address to match X300
| * | Merge branch 'maint'Martin Braun2015-01-121-8/+6
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| * | | revert unnecessary change to the SR_LEDSBrooks Prumo2015-01-051-1/+1
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| * | | x300: support new 120 MHz bandwidth versions of the NI-branded X310sBrooks2014-12-222-84/+102
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| * | | Merge branch 'maint'Martin Braun2014-12-162-2/+2
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| * | | | x300: Fixed minor issues in X300 clk codeAshish Chaudhari2014-12-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | - Bugfix for #638 - get_ref_locked will check lock status one last time before giving up
| * | | | x300: Made use of new CHDR packing routinesMartin Braun2014-12-031-43/+9
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| * | | | Merge branch 'maint'Martin Braun2014-12-021-1/+10
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| * | | | | uhd: replaced the `images_error` with a generic utility errorBen Hilburn2014-11-211-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Deleted images.*, moved functionality to paths.* - Applies for all devices that check FPGA or FW compat numbers - Adds generic utility search tool
* | | | | | x300: Timing changes for the new DAC data interfaceAshish Chaudhari2015-03-122-7/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Switched DAC to DCI delay bypass mode because we shift the DCI in the FPGA now - Changed LMK control to add 900ps delay to DAC clocks to be consistent with the radio_clk delay. The timing analyzer is expecting the two clocks to have a 0 deg phase diff.
* | | | | | x300: Multiple firmware fixes for VivadoAshish Chaudhari2015-02-171-2/+2
| |_|_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Refactored SFP+ hotplug handler - GigE link state comes from SFP+ status and PHY status - Multiple tracing enhancements - Bumped firmware compat number to 4 - Bumpled FPGA compat number to 10
* | | | | Merging new UHD_IMAGES_DIR utilities and bug fixes.Ben Hilburn2015-01-271-7/+7
| |_|_|/ |/| | | | | | | | | | | Also includes NI-USRP Windows Registry Key fixes.
* | | | x300: Fix for BUG #655: X300: Device Time Not Getting Set from GPSDOmichael-west2015-01-121-8/+6
| |_|/ |/| | | | | | | | - Moved setting of tick rate before setting of PPS time
* | | e300,x300: Bumped FPGA compat numberAshish Chaudhari2014-12-161-1/+1
| | | | | | | | | | | | | | | - X300: FPGA compat 9 - E300: FPGA compat 5
* | | e300,x300: Moved LED register space as not to overlap w/ GPIOsAshish Chaudhari2014-12-161-1/+1
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* | x300: Fixed FC window issue (was off by one)Martin Braun2014-12-021-1/+10
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* x300: Clarified FPGA compat error messageMartin Braun2014-11-211-5/+10
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* x300: Cleaned up DAC ctrl and clock init logicAshish Chaudhari2014-11-066-201/+318
| | | | | | | | | | | - DAC: Squashed configuration into 2 main operations: reset and reset_and_resync - DAC: Put in sleep mode during configuration - DAC: Synchronize only if streaming to more than one DAC - DAC: Use falling edge sync mode - DAC: Fixed power up/down settings - DAC: Frontend sync failure is fatal - Clocks: Refactored clock source change logic - Clocks: Cleaned up init and lock-check sequence
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