| Commit message (Collapse) | Author | Age | Files | Lines |
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- b200: compat 14
- b200mini: compat 5
- e3xx: compat 15
- x3xx: compat 20
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Conflicts:
host/lib/usrp/b200/b200_impl.hpp
host/lib/usrp/e300/e300_fpga_defs.hpp
host/lib/usrp/x300/x300_fw_common.h
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- b200: compat 13
- b200mini: compat 4
- e3xx: compat 14
- x3xx: compat 19
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- b200: compat 11
- b200mini: compat 2
- e300: compat 11
- x300: compat 15
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Compensate for headroom required to rotate a signal in
the CORDIC. Fixes some CORDIC-related clipping issues,
that reduced ENOB to 15 or 14.5 bits.
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- e300: compat 13
- x300: compat 18
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All device-specific CMake components are now registered in one place,
before the host/lib/ subdirs are sourced. This way, there are no
cyclic dependencies.
This solves the issue where ENABLE_X300=Off could disable USB, but
preserves the fix where ENABLE_X300=Off would still build some X300
codes.
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- b200: compat 12
- b200mini: compat 3
- e300: compat 12
- x300: compat 17
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Conflicts:
host/lib/usrp/cores/CMakeLists.txt
host/lib/usrp/x300/x300_impl.hpp
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- Refactored GPIO ATR definitions
- Added new 3000 core with a more efficient API
- Added a separate db_gpio_atr core to control the ATR bus
- Ported b2xx, e3xx and x3xx to the new core
- Minor cleanup
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- New and improved DRAM DMA FIFO
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- Added HG vs HGS detection logic
- Added DMA FIFO configuration code
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- b200: compat 11
- b200mini: compat 2
- e300: compat 11
- x300: compat 15
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Compensate for headroom required to rotate a signal in
the CORDIC. Fixes some CORDIC-related clipping issues,
that reduced ENOB to 15 or 14.5 bits.
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- It's status is thrown away anyway
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- b200: compat 10
- e300: compat 10
- x300: compat 14
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- Included list header in soft_reg header
- Fixed typo in x300_impl
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set LibUHD to required
* If required component's dependencies aren't met, CMake will throw an error unless user specifically disables it
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This preps the code for merging common registers altogether.
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* On utility level, force user to use --args=type=foo
* In each loader, throw an error if args are ambiguous
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The old code used a non standard (though very common) way
to determine the size of an array.
In order to avoid warnings, pass another parameter to indicate
the size.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
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- Delays changed after ADC config change and FPGA fixes
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- radio_rst was being asserted to reset the capture iface IDELAYs but
that was excessive and had adverse effects on the rest of the radio
- Replaced radio_rst with a localized IDELAYCTRL reset
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This reverts commit a12b24027fe1af9ca51949f6a9333ac5451690ef.
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- The following function implementations were moved from x300_impl.cpp
to x300_adc_dac_utils.cpp
- synchronize_dacs
- self_test_adcs
- extended_adc_test
- self_cal_adc_capture_delay
- self_cal_adc_xfer_delay
- This reduces the size of the x300_impl object file
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- We added additional microcode to configure DCI matching,config rate,etc
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- The value was originally empirically determined based on self-cal
results. After the fix for uncalibrated IDELAY, the self-cal offset
data was no longer correct.
- The new delay through the ADC ensures that the self-cal nominally
pick the halfway tap of 16
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- Everytime the LMK is configured, we do the following:
- Reset all LMK regs
- Wait for LMK lock
- Reset radio_clk PLL in FPGA
- Wait for FPGA PLL to lock
- Assert radio_rst which resets downstream radio logic
- This address the intermittent self-cal failures due to uncalibrated IDELAY taps
- Bumped FPGA compat to 12
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- This changed with the ADS62P44 -> ADS62P48 design change
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- New device arg "ext_adc_self_test" triggers the test
- ext_adc_self_test=<time> runs the test for "time" seconds
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- product code, revision and revision compat errors are now exceptions
- Added recover_mb_eeprom arg to recover from a corrupt/uninitialized EEPROM
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- Added new field "revision_compat" to mb_eeprom
- Enforce a revision_compat of 7
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- Added new PCIe and MB PIDs for new boards
- Added an error if MB PID is invalid
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