uhd - Ettus' UHD Repository

	Commit message (Collapse)	Author	Age	Files	Lines
*	x300: New mode to configure master clock rate	Scott Torborg	2018-11-16	1	-5/+5
\| \| \| \| \| \| \| \|	Add a new clocking mode to automatically configure arbitrary master clock rates. Co-authored-by: Brent Stapleton <brent.stapleton@ettus.com> Co-authored-by: Martin Braun <martin.braun@ettus.com>
*	uhd: Add device arg to enable dual ethernet for tx	Ciro Nishiguchi	2018-11-14	1	-1/+10
\| \| \| \| \| \| \| \|	UHD currently only uses a single ethernet link for tx data, even if the device is initialized with dual 10GbE links. Using both links when a DMA FIFO is present causes sequence errors due to DMA FIFO bandwidth limitations. This maintains the current default behavior but allows users to override it through a device arg "enable_tx_dual_eth".
*	x300: Remove 120 MHz option	Martin Braun	2018-11-07	1	-2/+0
\| \| \| \| \|	None of our FPGA images support a 120 MHz master clock rate, so the UHD code should match that.
*	x300: Use constrained_args	Martin Braun	2018-08-10	1	-0/+182
	x300_impl will now use a constrained_device_args_t-derived object to parse device args. No API or functional changes.