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| author | Martin Braun <martin.braun@ettus.com> | 2018-10-30 17:05:17 -0700 |
|---|---|---|
| committer | Brent Stapleton <bstapleton@g.hmc.edu> | 2018-11-07 17:00:10 -0800 |
| commit | 2373f3267a5aa975064e30060b2dcf909c462a93 (patch) | |
| tree | 473f6c012b33f79645949c2977467b3f361771b1 /host/lib/usrp/x300/x300_device_args.hpp | |
| parent | 2493f31820024ed962095dcd36223c6a21224be4 (diff) | |
| download | uhd-2373f3267a5aa975064e30060b2dcf909c462a93.tar.gz uhd-2373f3267a5aa975064e30060b2dcf909c462a93.tar.bz2 uhd-2373f3267a5aa975064e30060b2dcf909c462a93.zip | |
x300: Remove 120 MHz option
None of our FPGA images support a 120 MHz master clock rate, so the UHD
code should match that.
Diffstat (limited to 'host/lib/usrp/x300/x300_device_args.hpp')
| -rw-r--r-- | host/lib/usrp/x300/x300_device_args.hpp | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/host/lib/usrp/x300/x300_device_args.hpp b/host/lib/usrp/x300/x300_device_args.hpp index 76edc95ab..57e6e04cc 100644 --- a/host/lib/usrp/x300/x300_device_args.hpp +++ b/host/lib/usrp/x300/x300_device_args.hpp @@ -116,8 +116,6 @@ private: _dboard_clock_rate.set(50e6); } else if (_master_clock_rate.get() == 184.32e6) { _dboard_clock_rate.set(46.08e6); - } else if (_master_clock_rate.get() == 120e6) { - _dboard_clock_rate.set(40e6); } else { throw uhd::value_error( "Can't infer daughterboard clock rate. Specify " |