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path: root/host/lib/usrp/x300/x300_clock_ctrl.hpp
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* UBX: Phase synchronizationmichael-west2016-02-181-0/+1
| | | | | | | - Disabled MAX2871 VCO auto selection for phase sync - Added checks for new phase sync constraints recently published by Maxim - Added dboard_clock_rate option for X300 - Adjusted timing of SYNC signal relative to dboard referenc clock
* x300: Added set/get_clock_delay to x300_clock_ctrlAshish Chaudhari2015-07-011-1/+17
| | | | | | | - This function allows delaying divider pairs using the digital and analog delay blocks in the LMK divider - ctrl object caches delay for later retrieval - Minor fixes to LMK regmap
* X300: Change dboard clock rate to 50 MHzmichael-west2015-04-101-0/+13
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* Added missing pure virtual destructors to base classesNicholas Corgan2014-09-011-0/+2
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* Addressed comments from review.michael-west2014-03-151-2/+2
| | | | | | - Fixed typos. - Renamed reset() to reset_clocks(). - Created wait_for_ref_locked() function.
* Fixed bug found during testing where internal clock reference was taking ↵Michael West2014-02-201-0/+6
| | | | | | several seconds to lock. Added reset to the clock control and called it whenever the clock reference is changed.
* Merging USRP X300 and X310 support!!Ben Hilburn2014-02-041-0/+83