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authorAshish Chaudhari <ashish@ettus.com>2015-06-25 19:43:16 -0700
committerAshish Chaudhari <ashish@ettus.com>2015-07-01 17:07:58 -0700
commite59ce9d103278f1bb269a0ed163163488b697419 (patch)
tree550b76078a877bcb37a547d1e5eba48afb087390 /host/lib/usrp/x300/x300_clock_ctrl.hpp
parentcfb304d1cc5cb7b219f686eca5e2a5bb80d7e5ea (diff)
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x300: Added set/get_clock_delay to x300_clock_ctrl
- This function allows delaying divider pairs using the digital and analog delay blocks in the LMK divider - ctrl object caches delay for later retrieval - Minor fixes to LMK regmap
Diffstat (limited to 'host/lib/usrp/x300/x300_clock_ctrl.hpp')
-rw-r--r--host/lib/usrp/x300/x300_clock_ctrl.hpp18
1 files changed, 17 insertions, 1 deletions
diff --git a/host/lib/usrp/x300/x300_clock_ctrl.hpp b/host/lib/usrp/x300/x300_clock_ctrl.hpp
index 9c08aa356..160a14e6d 100644
--- a/host/lib/usrp/x300/x300_clock_ctrl.hpp
+++ b/host/lib/usrp/x300/x300_clock_ctrl.hpp
@@ -33,7 +33,7 @@ enum x300_clock_which_t
X300_CLOCK_WHICH_DB0_TX,
X300_CLOCK_WHICH_DB1_RX,
X300_CLOCK_WHICH_DB1_TX,
- X300_CLOCK_WHICH_TEST,
+ X300_CLOCK_WHICH_FPGA,
};
class x300_clock_ctrl : boost::noncopyable
@@ -94,6 +94,22 @@ public:
*/
virtual void set_ref_out(const bool) = 0;
+ /*! Set the clock delay for the given clock divider.
+ * \param which which clock
+ * \param rate the delay in nanoseconds
+ * \param resync resync clocks to apply delays
+ * \return the actual delay value set
+ * \throw exception when which invalid or delay_ns out of range
+ */
+ virtual double set_clock_delay(const x300_clock_which_t which, const double delay_ns, const bool resync = true) = 0;
+
+ /*! Get the clock delay for the given clock divider.
+ * \param which which clock
+ * \return the actual delay value set
+ * \throw exception when which invalid
+ */
+ virtual double get_clock_delay(const x300_clock_which_t which) = 0;
+
/*! Reset the clocks.
* Should be called if the reference clock changes
* to reduce the time required to achieve a lock.