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* ad936x: Disable AGC by defaultMartin Braun2015-08-101-1/+1
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* ad9361/b200/e300: Refactored AD936x + perifs managementMartin Braun2015-07-294-3/+428
| | | | | | - Created AD936x manager class - Moved functionality from B2x0 and E310 into manager - Separated property tree + perifs initialization in both device classes
* ad9361: Updated copyright headersMartin Braun2015-07-216-6/+84
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* ad9361: Update Tx Quad Cal to match current gain tablesTom Tsou2015-07-131-1/+1
| | | | | | | | | | | | | | | | Fixes issue #828 "B200: Tx quadrature calibration regression in master" Following commit added new gain table settings to reflect updated values from ADI. Gain indices used by Tx Quad Cal were not matched to accommodate the new tables. 2b06c38 "b2xx: dc offset and iq imbalance correction control" Requirement for Tx Quad Cal is for TIA gain and analog LPF gain to be set at 0 dB, or 0x20 in the gain table. Final effect is a dramatic decrease in Tx DC offset and quadrature image. Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
* ad9361: Prevent positive loop gain on Rx quadrature trackingTom Tsou2015-07-131-1/+1
| | | | | | | | | | | | | | Patch fixes a portion of #807 "B210: severe distortion on In-phase data for some gain settings" ADI recommends that the "Prevent Pos Loop Gain" setting be enabled to prevent the Rx quadrature tracking loop from becoming unstable at low power levels. ADI Linux kernel driver also reflects this setting. We do not follow the ADI recommendation. Adjust accordingly. Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
* ad9361: Invert phase on Rx LNA bypass pathTom Tsou2015-07-131-1/+8
| | | | | | | | | | | | | | | | | | | This patch resolves issue #823 "B200: Receive RF DC calibration makes calibration worse below 34 dB" According to ADI reference documents, enabling any of the 3 LNA's in the receive path causes a 180 degree phase shift. Correspondingly, we invert the LNA bypass path (gain indices below 34 dB) to match. Testing, however, reveals that one of these statements or the polarity inversion setting itself is false. Disabling the switch results in expected behavior and proper phase alignment. Overall effect is up to 60 dB of DC offset suppression ahead of the Rx analog LPF. This reduces the problematic dependency on active baseband tracking and may resolves multiple tracking stability issues. Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
* Merge branch 'maint'Martin Braun2015-07-081-2/+2
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| * B200: New AD9361 I/O timing programming to work with new b200_io.v logic design.Ian Buckley2015-07-081-2/+2
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* | ad9361: brought in Boost.Assign std::map workaround for MSVC 2013Nicholas Corgan2015-06-291-4/+11
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* | Merge branch 'maint'Martin Braun2015-06-094-7/+42
|\| | | | | | | | | | | | | Conflicts: host/lib/usrp/common/ad9361_ctrl.hpp host/lib/usrp/common/ad9361_driver/ad9361_device.h host/lib/usrp/e300/e300_remote_codec_ctrl.hpp
| * B200/E300: Fix incorrect readback of frequency.michael-west2015-05-224-3/+29
| | | | | | | | When the LO is tuned it changes the frequency on both channels. The frequency value read back for the first channel was not updated when the LO frequency for the other channel was tuned to a different value.
| * ad9361: Minor clarifications on req_rate and baseband_bwMartin Braun2015-05-192-4/+13
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* | Merge branch 'maint'Martin Braun2015-04-201-0/+1
|\| | | | | | | | | Conflicts: host/CMakeLists.txt
| * uhd: Fixed missing includeMartin Braun2015-04-201-0/+1
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* | Merge branch 'maint'Martin Braun2015-04-143-9/+4
|\| | | | | | | | | | | | | Conflicts: host/lib/usrp/b200/b200_io_impl.cpp host/lib/usrp/common/ad9361_driver/ad9361_device.cpp host/lib/usrp/common/ad9361_driver/ad9361_device.h
| * ad9361: Removed recommended max clock rate warningMartin Braun2015-04-143-9/+4
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* | Merge branch 'maint'Martin Braun2015-04-141-6/+6
|\| | | | | | | | | Conflicts: host/CMakeLists.txt
| * dboards: Fixed type deduction for older compilers on max287x codeMichael West2015-04-141-6/+6
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* | Merge branch 'maint'Martin Braun2015-04-101-0/+799
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| * Fix for BUG #683: UHD: Need to factor out MAX287x code for UBX and CBXmichael-west2015-04-101-0/+799
| | | | | | | | | | - Factored out MAX287x code into common header file - Added necessary code for MAX2871 synchronization.
* | Merge branch 'maint'Martin Braun2015-04-062-6/+9
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| * uhd: Add ability to get and set command time through dboard_iface.michael-west2015-04-032-6/+9
| | | | | | | | | | This creates a wb_iface child class called timed_wb_iface, which adds support for timed commands.
* | Merge branch 'maint'Martin Braun2015-03-273-7/+7
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| * Warning fixesNicholas Corgan2015-03-273-7/+7
| | | | | | | | | | | | | | * CMake now not applying C++ flags to C files * GCC 4.4: anti-aliasing rules * MSVC: narrowing, differences in subclass function parameters * Clang: uninitialized variables
* | b2xx: filter API implementation. Supports listing of RX/TX filters, querying ↵Julian Arnold2015-03-194-58/+714
| | | | | | | | RX/TX filter information and writing of analog and FIR filters
* | ad9361: DC and IQ correction only done if df > 100MHz during a tune requestJulian Arnold2015-03-132-6/+15
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* | uhd: Fixed multiple compiler warningsMichael Dickens2015-03-111-14/+14
| | | | | | | | | | | | - Use ULL and LL etc. so compiler doesn't need to decide constant's types - define the empty 'while' loop to include {} to make older compilers happy - Use explicit type names for BOOST_CHECK_EQUAL
* | b2xx: AGC supportJulian Arnold2015-03-054-24/+185
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* | e3xx: support for dc offset and iq balance controlJulian Arnold2015-02-232-15/+11
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* | b2xx: dc offset and iq imbalance correction controlJulian Arnold2015-02-205-106/+233
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* | Merge branch 'maint'Martin Braun2015-02-171-10/+10
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| * b200: Revised configuration of AD9361 for master_clock_rates >56e6MHz. ↵Ian Buckley2015-02-171-10/+10
| | | | | | | | Issues #649 & #691
* | Merge branch 'maint'Martin Braun2015-02-122-21/+6
|\| | | | | | | | | Conflicts: host/examples/rx_samples_to_file.cpp
| * ad936x: removing gain_offset from rx set_gainJon Kiser2015-02-112-21/+6
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* | Merge branch 'maint'Martin Braun2015-01-271-1/+7
|\| | | | | | | | | Conflicts: host/docs/usrp_e3x0.dox
| * ad9361: Removed unnecessary digital TX attenuationAshish Chaudhari2015-01-231-1/+7
| | | | | | | | | | | | - Fix ported from He. The current TX filter does not need the additional -6dB of headroom. Set it to zero so we meet our max power specs.
| * fixup! ad9361: More check for interpolation/decim ratiosAshish Chaudhari2015-01-231-1/+1
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* | Merge branch 'maint'Martin Braun2015-01-232-7/+16
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| * | fixup! ad9361: More check for interpolation/decim ratiosAshish Chaudhari2015-01-231-1/+1
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| * ad9361: More check for interpolation/decim ratiosMartin Braun2015-01-232-7/+16
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* | ad9361: Added relative temperature sensorJulian Arnold2015-01-204-1/+61
|/ | | | This allows to read a relative temperature from an AD9361 device.
* ad9361: bugfix for ad9361 gain value truncationJon Kiser2015-01-202-6/+10
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* B200: Bug #656. Added FIR coeffs for filters with Fs/4 stop band.Ian Buckley2015-01-194-17/+69
| | | | AD9361 driver can now select coeffs for different interpolation ratios.
* ad9361: rssi readoutJulian Arnold2015-01-124-2/+40
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* b200: Fix for PLL setting not being applied intermittentlyAshish Chaudhari2014-12-101-1/+1
| | | | - Made the methods in adf4001_ctrl virtual
* x300,nirio: Added support for NI-RIO 14.0Ashish Chaudhari2014-10-101-1/+2
| | | | | | | | | - Split niriok_proxy interfaces to support NI-RIO <=13.0 and >=14.0 kernel interfaces - Fixed multi-session race conditions by synchronizing niriok_proxy access - Fixed bug switching from NI LV-FPGA access to UHD access by changing how devices are hashed into a reservation table - Fixed calculation of FRAC values for CBX and SBX LO tuning by rounding instead of truncating - Fixed bug that was not setting two MSBs for band select configuration of CBX LO - Submitting on behalf of Patrick Sisterhen, Matthew Crymble
* ad9361: Made recommended rate a constantMartin Braun2014-09-023-3/+4
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* Added missing pure virtual destructors to base classesNicholas Corgan2014-09-014-4/+38
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* uhd: Changed line endings from Windows -> UNIXAshish Chaudhari2014-08-212-2039/+2039
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* ad9361: Output PLL lock status on ctrl output pins.Ashish Chaudhari2014-08-211-1/+1
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