aboutsummaryrefslogtreecommitdiffstats
path: root/host/lib/usrp/b100
Commit message (Expand)AuthorAgeFilesLines
...
* | b100: squashed host code for fifo control/timed commandsJosh Blum2012-07-026-215/+99
* | utils: UHD Image Downloader - downloads firmware/FPGA images compatible with ...Nicholas Corgan2012-06-071-8/+8
* | Merge branch 'maint'Josh Blum2012-05-161-1/+1
|\|
| * b100: fix use of boost cstdint hereJosh Blum2012-05-161-1/+1
* | usrp: mboard eeprom map use string as keyJosh Blum2012-05-142-3/+4
* | b100/e100: bumped compat number to 10 after fpga mergeJosh Blum2012-04-251-1/+1
* | mboard id's are now more concise (codenames are separated, for example), and ...Nicholas Corgan2012-04-201-1/+2
|/
* B100: enable_gpif(0) disables FIFO output clock on FX2. this prevents the "st...Nick Foster2012-03-161-2/+2
* usrp: fix from "rev iq correction"Josh Blum2012-03-161-2/+2
* usrp: reset cordics on init after tick rate updateJosh Blum2012-02-281-0/+8
* uhd: fixed some compile warnings for msvcJosh Blum2012-02-281-1/+1
* uhd: added async md user payload and common utilsJosh Blum2012-02-141-15/+11
* b100: use frame boundary to calculate frame sizeJosh Blum2012-02-141-2/+2
* b100: reset/reenumerate fx2 for bad endpoint stateJosh Blum2012-02-141-0/+19
* b100: added transport flushes and moved around reset codeJosh Blum2012-02-142-13/+4
* b100/usrp1: various tweaks for compiler warns and valgrindJosh Blum2012-02-091-2/+2
* uhd: various tweaks for compiler warns and valgrindJosh Blum2012-02-091-1/+1
* B100: Firmware reset tweaks.Nick Foster2012-02-091-1/+1
* dsp rework: implement 64 bit ticks, no secondsJosh Blum2012-02-063-12/+12
* B100: use FPGA external reset on initNick Foster2012-02-062-0/+7
* b100/e100: unify rx/tx fifo clears into oneJosh Blum2012-02-042-7/+4
* b100: delete some unused registers from mapJosh Blum2012-02-042-7/+0
* dsp rework: work on usb wrapper for smaller packets, large lutsJosh Blum2012-02-024-11/+24
* b100: sc8 mode not implemented errorJosh Blum2012-02-011-0/+4
* b100: bump compat numbers for slave fifo modeJosh Blum2012-02-011-1/+1
* B100: Modified TX send size to achieve 10.7Msps.Nick Foster2012-02-011-1/+1
* B100 host code changes to remove TX padding, remove RX padding, increase max ...Nick Foster2012-02-011-1/+1
* dsp rework: account for no sid used in tx vita pktJosh Blum2012-02-011-0/+1
* dsp rework: tx trailer, scaling work (peak)Josh Blum2012-01-311-0/+1
* gen2: added user setting regs api and user coreJosh Blum2012-01-313-0/+10
* dsp rework: work on scaling and args parsing on RX and TX dspJosh Blum2012-01-311-9/+4
* dsp rework: implemented new scalefactor in rx dsp coreJosh Blum2012-01-312-2/+2
* usrp1/b100: reenumeration loop with timeout only when foundJosh Blum2012-01-271-1/+3
* usrp1/b100: handle longer reenumerations with loop and timeoutJosh Blum2012-01-261-17/+25
* uhd: add samples per pkt option to rx streamerJosh Blum2012-01-261-1/+2
* uhd: flush transport for new rx streamersJosh Blum2012-01-231-1/+1
* usrp: added underflow_policy to tx streamer argsJosh Blum2011-12-201-0/+1
* UHD will now print 'L' whenever a late packet is transmitted.Ben Hilburn2011-12-121-0/+3
* uhd: work with stream clearingJosh Blum2011-12-051-1/+2
* b100: tweaks for fpga resets on initJosh Blum2011-11-221-11/+8
* usrp: clear dsp when making new streamerJosh Blum2011-11-211-0/+1
* uhd: support for applying cal corrections B100Josh Blum2011-11-152-0/+23
* usrp: fixed default initialization of iq bal correctionJosh Blum2011-11-131-2/+2
* usrp: work on dboard code to use subtrees to populate frontend propsJosh Blum2011-11-071-17/+4
* usrp: parse rx stream args scalarJosh Blum2011-11-051-1/+2
* e100/b100: init tree before filling itJosh Blum2011-11-041-1/+1
* e100/b100: moved gpio regs and compat readbackJosh Blum2011-11-034-104/+25
* somebody made a typoJosh Blum2011-11-031-1/+1
* usrp: reorganize frontend paths in tree for correction stuffJosh Blum2011-11-031-5/+8
* usrp: prefer name iq_balance for api callJosh Blum2011-11-031-4/+4