B100: use FPGA external reset on init

2 files changed, 7 insertions, 0 deletions

diff --git a/host/lib/usrp/b100/b100_impl.cpp b/host/lib/usrp/b100/b100_impl.cpp
index 455efa2fe..08a2cdeec 100644
--- a/host/lib/usrp/b100/b100_impl.cpp
+++ b/host/lib/usrp/b100/b100_impl.cpp
@@ -181,6 +181,8 @@ b100_impl::b100_impl(const device_addr_t &device_addr){
     //load FPGA image, gpif is disabled while loading
     this->enable_gpif(false);
     _fx2_ctrl->usrp_load_fpga(b100_fpga_image);
+    this->set_reset_fpga(1);
+    this->set_reset_fpga(0);
     this->enable_gpif(true);
 
     //create the control transport
@@ -525,6 +527,10 @@ void b100_impl::clear_fpga_fifo(void) {
     _fx2_ctrl->usrp_control_write(VRQ_CLEAR_FPGA_FIFO, 0, 0, 0, 0);
 }
 
+void b100_impl::set_reset_fpga(const bool en) {
+    _fx2_ctrl->usrp_control_write(VRQ_FPGA_SET_RESET, en ? 0 : 1, 0, 0, 0);
+}
+
 sensor_value_t b100_impl::get_ref_locked(void){
     const bool lock = _clock_ctrl->get_locked();
     return sensor_value_t("Ref", lock, "locked", "unlocked");
diff --git a/host/lib/usrp/b100/b100_impl.hpp b/host/lib/usrp/b100/b100_impl.hpp
index 49a3139f0..b71b65562 100644
--- a/host/lib/usrp/b100/b100_impl.hpp
+++ b/host/lib/usrp/b100/b100_impl.hpp
@@ -126,6 +126,7 @@ private:
     void reset_gpif(const boost::uint16_t);
     void enable_gpif(const bool);
     void clear_fpga_fifo(void);
+    void set_reset_fpga(const bool en);
     void handle_async_message(uhd::transport::managed_recv_buffer::sptr);
     uhd::sensor_value_t get_ref_locked(void);
     void set_rx_fe_corrections(const double);