Commit message (Collapse) | Author | Age | Files | Lines | |
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* | b100: removed unused files from merge | Josh Blum | 2012-08-04 | 3 | -402/+0 |
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* | b100/e100: clock source option for pps phase sync abuse | Josh Blum | 2012-07-19 | 1 | -0/+13 |
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* | b100: squashed host code for fifo control/timed commands | Josh Blum | 2012-07-02 | 6 | -215/+99 |
| | | | | | This uses the new b100/e100 common core and FIFO control modules. Subsequent commit will be the compatible FPGA merge. | ||||
* | utils: UHD Image Downloader - downloads firmware/FPGA images compatible with ↵ | Nicholas Corgan | 2012-06-07 | 1 | -8/+8 |
| | | | | the current host code and places them in the images directory | ||||
* | Merge branch 'maint' | Josh Blum | 2012-05-16 | 1 | -1/+1 |
|\ | | | | | | | | | Conflicts: host/docs/gpsdo.rst | ||||
| * | b100: fix use of boost cstdint here | Josh Blum | 2012-05-16 | 1 | -1/+1 |
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* | | usrp: mboard eeprom map use string as key | Josh Blum | 2012-05-14 | 2 | -3/+4 |
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* | | b100/e100: bumped compat number to 10 after fpga merge | Josh Blum | 2012-04-25 | 1 | -1/+1 |
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* | | mboard id's are now more concise (codenames are separated, for example), and ↵ | Nicholas Corgan | 2012-04-20 | 1 | -1/+2 |
|/ | | | | dboard subdev names are more descriptive (RFX RX is now RFX1200 RX, etc) | ||||
* | B100: enable_gpif(0) disables FIFO output clock on FX2. this prevents the ↵ | Nick Foster | 2012-03-16 | 1 | -2/+2 |
| | | | | "stuffing zeroes" problem and improves transport reliability. | ||||
* | usrp: fix from "rev iq correction" | Josh Blum | 2012-03-16 | 1 | -2/+2 |
| | | | | Must zero out the default IQ correction to have zero effect by default. | ||||
* | usrp: reset cordics on init after tick rate update | Josh Blum | 2012-02-28 | 1 | -0/+8 |
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* | uhd: fixed some compile warnings for msvc | Josh Blum | 2012-02-28 | 1 | -1/+1 |
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* | uhd: added async md user payload and common utils | Josh Blum | 2012-02-14 | 1 | -15/+11 |
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* | b100: use frame boundary to calculate frame size | Josh Blum | 2012-02-14 | 1 | -2/+2 |
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* | b100: reset/reenumerate fx2 for bad endpoint state | Josh Blum | 2012-02-14 | 1 | -0/+19 |
| | | | | | | Determine state of control endpoint, re-enumerate to put in a known state, rerun some initialization code. | ||||
* | b100: added transport flushes and moved around reset code | Josh Blum | 2012-02-14 | 2 | -13/+4 |
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* | b100/usrp1: various tweaks for compiler warns and valgrind | Josh Blum | 2012-02-09 | 1 | -2/+2 |
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* | uhd: various tweaks for compiler warns and valgrind | Josh Blum | 2012-02-09 | 1 | -1/+1 |
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* | B100: Firmware reset tweaks. | Nick Foster | 2012-02-09 | 1 | -1/+1 |
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* | dsp rework: implement 64 bit ticks, no seconds | Josh Blum | 2012-02-06 | 3 | -12/+12 |
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* | B100: use FPGA external reset on init | Nick Foster | 2012-02-06 | 2 | -0/+7 |
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* | b100/e100: unify rx/tx fifo clears into one | Josh Blum | 2012-02-04 | 2 | -7/+4 |
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* | b100: delete some unused registers from map | Josh Blum | 2012-02-04 | 2 | -7/+0 |
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* | dsp rework: work on usb wrapper for smaller packets, large luts | Josh Blum | 2012-02-02 | 4 | -11/+24 |
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* | b100: sc8 mode not implemented error | Josh Blum | 2012-02-01 | 1 | -0/+4 |
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* | b100: bump compat numbers for slave fifo mode | Josh Blum | 2012-02-01 | 1 | -1/+1 |
| | | | | | | Conflicts: host/lib/usrp/b100/b100_impl.hpp | ||||
* | B100: Modified TX send size to achieve 10.7Msps. | Nick Foster | 2012-02-01 | 1 | -1/+1 |
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* | B100 host code changes to remove TX padding, remove RX padding, increase max ↵ | Nick Foster | 2012-02-01 | 1 | -1/+1 |
| | | | | allowed rate. | ||||
* | dsp rework: account for no sid used in tx vita pkt | Josh Blum | 2012-02-01 | 1 | -0/+1 |
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* | dsp rework: tx trailer, scaling work (peak) | Josh Blum | 2012-01-31 | 1 | -0/+1 |
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* | gen2: added user setting regs api and user core | Josh Blum | 2012-01-31 | 3 | -0/+10 |
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* | dsp rework: work on scaling and args parsing on RX and TX dsp | Josh Blum | 2012-01-31 | 1 | -9/+4 |
| | | | | | This simplified some copy pasta in the io_impl.cpp files, and adds a place for sc8 tx mode in the tx dsp core code. | ||||
* | dsp rework: implemented new scalefactor in rx dsp core | Josh Blum | 2012-01-31 | 2 | -2/+2 |
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* | usrp1/b100: reenumeration loop with timeout only when found | Josh Blum | 2012-01-27 | 1 | -1/+3 |
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* | usrp1/b100: handle longer reenumerations with loop and timeout | Josh Blum | 2012-01-26 | 1 | -17/+25 |
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* | uhd: add samples per pkt option to rx streamer | Josh Blum | 2012-01-26 | 1 | -1/+2 |
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* | uhd: flush transport for new rx streamers | Josh Blum | 2012-01-23 | 1 | -1/+1 |
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* | usrp: added underflow_policy to tx streamer args | Josh Blum | 2011-12-20 | 1 | -0/+1 |
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* | UHD will now print 'L' whenever a late packet is transmitted. | Ben Hilburn | 2011-12-12 | 1 | -0/+3 |
| | | | | | This is similiar to printing 'U' and 'S'. This functionality is not yet supported on the USRP1. | ||||
* | uhd: work with stream clearing | Josh Blum | 2011-12-05 | 1 | -1/+2 |
| | | | | | | | | dont clear when using the compat device API tx clear also resets expected seqnum tx clear on usrp2 resets flow control monitor | ||||
* | b100: tweaks for fpga resets on init | Josh Blum | 2011-11-22 | 1 | -11/+8 |
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* | usrp: clear dsp when making new streamer | Josh Blum | 2011-11-21 | 1 | -0/+1 |
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* | uhd: support for applying cal corrections B100 | Josh Blum | 2011-11-15 | 2 | -0/+23 |
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* | usrp: fixed default initialization of iq bal correction | Josh Blum | 2011-11-13 | 1 | -2/+2 |
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* | usrp: work on dboard code to use subtrees to populate frontend props | Josh Blum | 2011-11-07 | 1 | -17/+4 |
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* | usrp: parse rx stream args scalar | Josh Blum | 2011-11-05 | 1 | -1/+2 |
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* | e100/b100: init tree before filling it | Josh Blum | 2011-11-04 | 1 | -1/+1 |
| | | | | git log | ||||
* | e100/b100: moved gpio regs and compat readback | Josh Blum | 2011-11-03 | 4 | -104/+25 |
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* | somebody made a typo | Josh Blum | 2011-11-03 | 1 | -1/+1 |
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