| Commit message (Expand) | Author | Age | Files | Lines |
* | N3xx: Fix White Rabbit | michael-west | 2021-08-04 | 1 | -0/+10 |
* | fpga: Update testbenches to work in ModelSim | Wade Fife | 2021-06-17 | 2 | -6/+64 |
* | fpga: Update rfnoc_image_core for all targets | Wade Fife | 2021-06-10 | 9 | -3582/+3997 |
* | fpga: Change RFNoC YAML version numbers to strings | Wade Fife | 2021-06-08 | 6 | -12/+12 |
* | fpga: Add Replay Block to RFNoC Core Image | mattprost | 2020-09-03 | 10 | -145/+1402 |
* | fpga: Update DRAM IO signatures | Wade Fife | 2020-09-03 | 1 | -10/+10 |
* | fpga: n3xx: Update AXI interconnect address range | Wade Fife | 2020-08-28 | 4 | -2928/+2217 |
* | fpga: n3xx: Fix timeout for timekeeper registers | Wade Fife | 2020-08-19 | 3 | -195/+307 |
* | n320: Double radio ingress buffer size | mattprost | 2020-08-12 | 2 | -8/+8 |
* | fpga: n320: Add BIST (AA) image files | steviez | 2020-07-31 | 5 | -0/+1148 |
* | fpga, mpm: Bump FPGA compat number | RobertWalstab | 2020-07-24 | 1 | -1/+1 |
* | n32x: Swap out liberio for internal Ethernet | RobertWalstab | 2020-07-16 | 1 | -30/+138 |
* | n3xx: Swap out liberio for internal Ethernet | RobertWalstab | 2020-07-16 | 4 | -1115/+1262 |
* | fpga: n3xx: Fix White Rabbit images | Wade Fife | 2020-07-01 | 1 | -3/+19 |
* | fpga: Update RFNOC_EDGE_TBL_FILE for Cygwin | Wade Fife | 2020-06-12 | 1 | -1/+1 |
* | Merge FPGA repository back into UHD repository | Martin Braun | 2020-01-28 | 209 | -0/+165315 |