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* fpga: e31x: Change RFNoC Ctrl clock to 40 MHzWade Fife2020-08-191-1/+2
* fpga: e31x: Fix timeout for timekeeper registersWade Fife2020-08-191-180/+278
* fpga, mpm: Bump FPGA compat numberRobertWalstab2020-07-241-1/+1
* e31x: Minor cleanup on top-level e31x.v moduleMartin Braun2020-07-181-3/+1
* e31x: Swap out liberio for internal EthernetRobertWalstab2020-07-161-54/+8
* Merge FPGA repository back into UHD repositoryMartin Braun2020-01-281-0/+681