Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | fpga: rfnoc: Add Vector IIR RFNoC block | Wade Fife | 2020-05-19 | 6 | -0/+1376 |
* | fpga: rfnoc: Clean up ctrlport_splitter usage | Wade Fife | 2020-05-12 | 2 | -2/+2 |
* | TwinRX: Remove decimation from frontend | Michael West | 2020-05-12 | 1 | -36/+52 |
* | DUC/DDC: Add variable time increment | Michael West | 2020-05-12 | 4 | -16/+23 |
* | fpga: Change default MTU to 10 | Wade Fife | 2020-05-11 | 2 | -2/+2 |
* | rfnoc: Add RFNoC fosphor block | Wade Fife | 2020-04-14 | 6 | -0/+1584 |
* | sim: Add item support to RFNoC simulation | Wade Fife | 2020-03-09 | 6 | -6/+6 |
* | sim: Parameterize chdr_word_t data type | Wade Fife | 2020-03-09 | 7 | -8/+28 |
* | rfnoc: Fix FIR and AXI RAM block register documentation | Wade Fife | 2020-03-05 | 2 | -9/+11 |
* | radio: Update TB to use new block ctrl connect | Wade Fife | 2020-02-19 | 1 | -41/+17 |
* | rfnoc: Update blocks to use autogenerated noc_shell | Wade Fife | 2020-02-06 | 23 | -1825/+2407 |
* | Merge FPGA repository back into UHD repository | Martin Braun | 2020-01-28 | 53 | -0/+14730 |