| Commit message (Expand) | Author | Age | Files | Lines |
* | rfnoc: Fix noc_shell direction comments | Wade Fife | 2021-12-08 | 18 | -81/+86 |
* | fpga: Add ability to get time from Radio block | michael-west | 2021-11-17 | 3 | -2/+26 |
* | siggen: Fix direction of rotation | Wade Fife | 2021-10-27 | 3 | -25/+28 |
* | fpga: Remove stale references to UHD_FPGA_DIR | Wade Fife | 2021-09-08 | 7 | -14/+7 |
* | rfnoc: duc: Remove stale references to CORDIC | Wade Fife | 2021-08-08 | 1 | -18/+15 |
* | fpga: lib: Add rx_front_end_gen3 testbench | Wade Fife | 2021-04-09 | 2 | -0/+247 |
* | TwinRX: Remove frontend filter | michael-west | 2021-04-08 | 1 | -59/+8 |
* | fpga: docs: Improve documentation of rx_frontend_gen3 | Martin Braun | 2021-04-07 | 1 | -1/+73 |
* | fpga: rfnoc: Enable clean switch in Switchboard | Wade Fife | 2020-08-13 | 1 | -1/+1 |
* | fpga: rfnoc: Add tests to FFT block | Wade Fife | 2020-08-10 | 2 | -39/+202 |
* | fpga: rfnoc: Add RFNoC Keep One in N block | Aaron Rossetto | 2020-08-05 | 7 | -0/+1432 |
* | fpga: rfnoc: Add RFNoC Replay block | Wade Fife | 2020-08-04 | 8 | -0/+4101 |
* | fpga: rfnoc: Add 4 KiB boundary check to sim_axi_ram | Wade Fife | 2020-08-04 | 1 | -0/+12 |
* | fpga: rfnoc: Add Signal Generator RFNoC block | Wade Fife | 2020-07-30 | 8 | -0/+1743 |
* | fpga: Add Switchboard RFNoC block | Jesse Zhang | 2020-07-30 | 7 | -0/+1121 |
* | TwinRX: Fix increased noise floor | michael-west | 2020-07-21 | 1 | -1/+1 |
* | fpga: rfnoc: Fix testbenches to run under ModelSim | Wade Fife | 2020-07-20 | 6 | -73/+51 |
* | fpga: rfnoc: Add RFNoC Moving Average block | Wade Fife | 2020-07-16 | 8 | -0/+1587 |
* | fpga: rfnoc: Add Log-Power block | Wade Fife | 2020-06-29 | 6 | -0/+1006 |
* | fpga: rfnoc: Add RFNoC Window block | Wade Fife | 2020-06-29 | 8 | -0/+1454 |
* | fpga: rfnoc: Fix read suppression test in rfnoc_block_axi_ram_fifo_tb | Wade Fife | 2020-06-25 | 1 | -8/+16 |
* | fpga: rfnoc: Add support for 512-bit CHDR widths | Andrew Moch | 2020-06-18 | 5 | -74/+131 |
* | fpga: rfnoc: Add RFNoC Add/Sub block | Wade Fife | 2020-05-28 | 6 | -0/+1183 |
* | rfnoc: Add Split Stream RFNoC block | Wade Fife | 2020-05-28 | 6 | -0/+932 |
* | fpga: rfnoc: Add Vector IIR RFNoC block | Wade Fife | 2020-05-19 | 6 | -0/+1376 |
* | fpga: rfnoc: Clean up ctrlport_splitter usage | Wade Fife | 2020-05-12 | 2 | -2/+2 |
* | TwinRX: Remove decimation from frontend | Michael West | 2020-05-12 | 1 | -36/+52 |
* | DUC/DDC: Add variable time increment | Michael West | 2020-05-12 | 4 | -16/+23 |
* | fpga: Change default MTU to 10 | Wade Fife | 2020-05-11 | 2 | -2/+2 |
* | rfnoc: Add RFNoC fosphor block | Wade Fife | 2020-04-14 | 6 | -0/+1584 |
* | sim: Add item support to RFNoC simulation | Wade Fife | 2020-03-09 | 6 | -6/+6 |
* | sim: Parameterize chdr_word_t data type | Wade Fife | 2020-03-09 | 7 | -8/+28 |
* | rfnoc: Fix FIR and AXI RAM block register documentation | Wade Fife | 2020-03-05 | 2 | -9/+11 |
* | radio: Update TB to use new block ctrl connect | Wade Fife | 2020-02-19 | 1 | -41/+17 |
* | rfnoc: Update blocks to use autogenerated noc_shell | Wade Fife | 2020-02-06 | 23 | -1825/+2407 |
* | Merge FPGA repository back into UHD repository | Martin Braun | 2020-01-28 | 53 | -0/+14730 |