aboutsummaryrefslogtreecommitdiffstats
path: root/fpga/usrp2/opencores/aemb/sim/verilog
Commit message (Expand)AuthorAgeFilesLines
* Removed copy of FPGA source files.Martin Braun2014-10-072-530/+0
* Merge branch 'master' of ettus.sourcerepo.com:ettus/fpga into uhd_masterJosh Blum2010-06-154-5/+0
* moved usrp1 and usrp2 fpga dirs into fpga subdirectoryJosh Blum2010-04-156-0/+535