| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | B200: FX3 performance optimizations based on Cypress AN86947 | michael-west | 2017-01-20 | 2 | -6/+6 |
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| * | Updated compat numbers for B2x0 and X3x0 | Martin Braun | 2015-07-14 | 1 | -1/+1 |
| | | | | | | - B2x0: FW compat number (goes with previous firmware update) - X3x0: Max HW rev number | ||||
| * | fx3: New firmware features: Logging, more configuration | Balint Seeber | 2015-07-14 | 3 | -364/+756 |
| | | | | | | | | - Logging in conjunction with B200 side-channel utility (using UART or directly over USB) - More and better configurability, e.g. Tx voltage swing and DMA configuration | ||||
| * | FX3: Updating FW to support NI-USRP VID and PIDs | Ben Hilburn | 2015-04-15 | 3 | -3/+120 |
| | | | | | | Conflicts: firmware/fx3/b200/b200_usb_descriptors.c | ||||
| * | b200: Bumped FX3 firmware compat number to 7. | Ashish Chaudhari | 2014-10-01 | 1 | -1/+1 |
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| * | b200: Removed all AD9361 related firmware | Ashish Chaudhari | 2014-08-12 | 5 | -418/+3 |
| | | | | | | | | - FX3 does not respond to AD9361 firmware transaction VREQs - FX3 does not respond to AD9361 SPI transaction VREQs - Deleted all AD9361 firmware files - Bumped FW compat to 6 | ||||
| * | b200: Moved AD9361 driver to host | Ashish Chaudhari | 2014-08-01 | 1 | -1/+1 |
| | | | | | | | | - Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow | ||||
| * | b2xx: Pulling FX3 and AD9361 source code into master. | Ben Hilburn | 2014-04-07 | 11 | -0/+4318 |
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index : uhd | |
| Ettus' UHD Repository |
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