| Commit message (Collapse) | Author | Age | Files | Lines |
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This is a data structure intended for use by the DPDK I/O service.
It uses DPDK's lockless ring in multi-producer, single-consumer mode
to allow clients to submit requests to the DPDK I/O service's worker
thread. Clients can specify a timeout for the requests to be fulfilled.
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- ref_locked failure would throw a warning, even though this can happen
in normal operations, and the return value of the get_ref_locked()
function is all the info needed
- get_fpga_type() doesn't need to be called from e31x_periphs, because
it is not read from the motherboard registers (is read from the
EEPROM)
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It used to produce the individual name of the USRP, but it should return
a product name.
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The clock source on E310 is always internal. This patch removes the
variables regarding the clock source (since they are superfluous). This
fixes a bug where self._clock_source on the e31x class would never get
initialized.
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The GPS sensors are pulled in via gpsd_iface.
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The gpio example would continously call get_time_now() to time a loop.
There is no need to query a device here, so we query the system timer
instead.
This fixes an issue where the large amounts of control traffic could
slow down TX, causing the TX and FDX tests to fail. This was only ever
seen on the X300_HG over 1GigE.
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- Use GPIO_BIT(x) instead of 1<<x where appropriate
- Correctly use rx_buff/tx_buff in recv/send, respectively
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This enables the use of the dboard and FP GPIOs. The problem was that
the register offset of 8 was not encoded.
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- Move the SPI addresses out of radio_control_impl
- Fix the GPIO address spaces for N310/N300
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This fixes a bug where get_gpio_attr(bank, "CTRL") would return the
inverted value of what was written. Reason is that the underlying
register was an ATR disable register.
The fix is to invert the cached values of the register.
Now, the following Python code will work:
>>> U = uhd.usrp.MultiUSRP("type=x300")
>>> atr_enable = 0xF # Enable ATR on lower 4 pins, rest is GPIO
>>> U.set_gpio_attr("FP0A", "CTRL", atr_enable)
>>> U.get_gpio_attr("FP0A", "CTRL") == atr_enable
True
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This allows adding stream args to the Python version of benchmark_rate
in the same way as for the C++ version, e.g.:
python3 ./benchmark_rate.py \
--args addr=192.168.40.2,num_poll_offload_threads=4 \
--rx_stream_args \
recv_offload=1,num_recv_frames=32,recv_offload_wait_mode=poll \
--tx_stream_args \
send_offload=1,num_send_frames=32,send_offload_wait_mode=poll \
[... other arguments ...]
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In the existing graph, when the shutdown was simply a release. However,
any outstanding actions would trigger warnings (because released graphs
aren't supposed to still have actions being passed around), which would
sometimes be visible at the end of an application.
This is a safer solution than simply releasing, because it explicitly
sets a shutdown flag that all graph-affecting functions (property
propagation and action handling) respect. Once the flag is set, the
graph can no longer be booted up again.
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This will print the currently-used GPIO bank's name before starting the
test.
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- Fixes issues with test_messages_test (it had inverted the pass/fail
condition)
- Improve Pylint scores in affected files
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This fixes warnings such as this during devtest:
/home/mbr0wn/src/uhddev/host/tests/devtest/uhd_test_base.py:112:
ResourceWarning: unclosed file <_io.TextIOWrapper
name='./results_x300_F457AD.log' mode='r' encoding='UTF-8'>
self.results = yaml.safe_load(open(self.results_file).read()) or {}
/path/to/uhd/host/tests/devtest/uhd_test_base.py:150:
ResourceWarning: unclosed file <_io.TextIOWrapper
name='./results_x300_F457AD.log' mode='w' encoding='UTF-8'>
yaml.dump(self.results, default_flow_style=False))
ok
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For the burst ACK test, test_messages would send 3 packets. However,
that assumes that the underlying link is fast enough to send three
packets in time, and some devices are hard to operate without underruns
without also specifying a start-of burst timestamp. Often, test_messages
would report that no ACK was received, but instead, an underrun was
received.
test_messages also doesn't need to send three packets. The three packets
came from the "start of burst" flag, which no device in UHD supports.
The change is thus to send a single packet with an EOB marker for the
burst ACK test. This will work regardless of the link speed and CPU
power.
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- Remove superfluous INFO logging
- Improve formatting in many places
- Improve Pylint score in various places
- Add tear_down to DB object
- Simplify custom EEPROM code for E310
- Fix time source selection code
- Remove references to GPS_CTRL and GPS_STATUS (are E320 only)
- Move clock source control out of MboardRegs object
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Many small cleanups:
- Fix copyright headers
- Fix superfluous imports
- Pull some constants out of classes where appropriate
- Fix formatting
- Improve/fix some docstrings
- Disable specific Pylint warnings where appropriate
- Global catches use BaseException instead of Exception
- Don't use len() for empty checks
- Make sure to declare all self attributes in __init__ (note: this is
particularly of interest for E310, becuase its regular init happens
outside of __init__)
- Compacted some E310 code that had multi-DB checks
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This removes the token requirement for get_proto_ver() and
get_chdr_width().
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Rename thread affinity args such that they do not end with an integer.
Arg names ending with an integer are interpreted as being targeted at a
specific motherboard index in device_addr methods.
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Allow device args that contain an integer within the name, such as
recv_offload_thread_0_cpu. Previously this would cause an invalid format
exception.
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This assumes an existence of mboard_regs_control in PeriphManagerBase
and implements most TK controls there. All the *_periphs.py files can
now use a common class for registers, including the TK access, but also
git hash, build date, and device ID access.
This also fixes two issues:
- set_timekeeper_time() and set_tick_period() had a bug that would
incorrectly calculate the upper 32 bits of their respective registers.
- N3xx had a bug that would swap around set time now and next PPS. This
got auto-fixed because the common code never had this bug.
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- Replace some `if len(seq)` with `if seq`
- Replace some `lambda: f()` with `f`
- Formatting
- Add some pylint: disable where appropriate
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The DPDK files are left behind as a reference, for now.
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dpdk_ctx represents the central context and manager of all memory
and threads allocated via the DPDK EAL. In this commit, it parses
the user's arguments, configures all the ports, and brings them up.
dpdk_port represents each DPDK NIC port's configuration, and it
manages the allocation of individual queues and their flow rules.
It also would provide access to an ARP table and functions for
handling ARP requests and responses. The flow rules and ARP
functions are not yet implemented.
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Swap out hyphens for underscores in the DPDK args. Also update list
of distributions with the correct DPDK version in the repos.
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With this patch, the elements of of the return value of find_blocks()
are sorted lexicographically (specifically, using
uhd::rfnoc::block_id_it::operator<()).
The underlying block_container class stores the blocks in an unordered
set, so the return value for find_blocks() was always sorted randomly.
multi_usrp_rfnoc had to sort the return values every time find_blocks()
was used to get a useful return value.
Because find_blocks() had no contract for the order of returned blocks,
this change simply sorts the return value before returning it.
multi_usrp_rfnoc is modified to remove all the sorts that are now
superfluous.
A good way to see the change is to run uhd_usrp_probe, which will now
contain content like this:
| _____________________________________________________
| /
| | RFNoC blocks on this device:
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| | * 0/DDC#0
| | * 0/DDC#1
| | * 0/DUC#0
| | * 0/DUC#1
| | * 0/DmaFIFO#0
| | * 0/Radio#0
| | * 0/Radio#1
Assuming the blocks don't change, the order of this list will always be
the same following this patch. Note that the order is unrelated to the
order on the control crossbar, which it never was.
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When calling a multi_usrp object like this:
usrp->set_gpio_attr("TXB", "CTRL", 0xFFFF);
Previously, it would only be able to address daughterboard A. Now, there
is a full backward-compatible solution (compatible with 3.15), that will
address either daughterboard's GPIOs.
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The gpio example can now list all available banks before running tests.
Use like this:
gpio --args $args --list-banks
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The blocks that are neither OOT, nor core blocks (like the DDC/DUC,
etc.) require additional info to find their appropriate Makefile.srcs
files. We don't include them in every build, to avoid building IP for
the FFT, FIR, and other blocks when they're not needed. However, those
blocks are in-tree, and don't follow the same directory structure as
out-of-tree modules, either.
We therefore allow the YAML files for those blocks (which are shipped
with UHD) to contain a path hint to their appropriate Makefile.srcs. The
image builder uses those paths to amend the `make` command
appropriately.
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For easier maintenance, some constants like paths and maps were moved to
the top of the Python file.
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Fixes 85f0551 ("rfnoc: Add I/O service manager to X300 and MPMD")
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Add a new method to io_service::send_io to check whether the destination
is ready for data, to make it possible to poll send_io rather than block
waiting for flow control credits.
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The -I option was broken in multiple ways:
- Multiple -I options would only keep the last one
- The call to make did not actually append RFNOC_OOT_MAKEFILE_SRCS
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- Fix mako paths to run from anywhere
- Correct code errors and clean up generated code
- Add support for port parameters
- Add support for axis_data interface
- Fix NoC shell reset handling
- Replace Python functions with Verilog $clog2
- Allow input and output to share port name
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These command line arguments control the spp values used for streaming.
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This API call is a more explicit way of setting the spp than passing in
an spp value in the args of the stream args when creating streamers. For
pre-RFNoC devices, this is done by injecting the spp arg back into the
stream args. For RFNoC devices, the set_property() call on the radio is
called.
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SEPs on the FPGA can only occupy multiples of the CHDR width in their
FIFOs, unlike SW, where buffers are stored in RAM and can be aligned
anyhow. Therefore, we align the counting of bytes for FC purpose and
count multiples of CHDR width instead of the true number of bytes per
packet.
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For links that do not support releasing buffers out of order, restrict
the I/O service manager to always select the inline I/O service.
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