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author | Martin Braun <martin.braun@ettus.com> | 2019-11-14 15:38:11 -0800 |
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committer | Martin Braun <martin.braun@ettus.com> | 2019-11-26 12:21:34 -0800 |
commit | cd4b1bcd6458b307512ef1249d28a6efe7e70ec8 (patch) | |
tree | 00dd664d512c6b59da3213ddaf9404317e07b3cd | |
parent | 920198556e35edb86c081598ce757a06e12d7711 (diff) | |
download | uhd-cd4b1bcd6458b307512ef1249d28a6efe7e70ec8.tar.gz uhd-cd4b1bcd6458b307512ef1249d28a6efe7e70ec8.tar.bz2 uhd-cd4b1bcd6458b307512ef1249d28a6efe7e70ec8.zip |
n310: Fix GPIO registers
This enables the use of the dboard and FP GPIOs. The problem was that
the register offset of 8 was not encoded.
-rw-r--r-- | host/lib/usrp/dboard/magnesium/magnesium_radio_control_init.cpp | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/host/lib/usrp/dboard/magnesium/magnesium_radio_control_init.cpp b/host/lib/usrp/dboard/magnesium/magnesium_radio_control_init.cpp index 6e342c79a..6595cb113 100644 --- a/host/lib/usrp/dboard/magnesium/magnesium_radio_control_init.cpp +++ b/host/lib/usrp/dboard/magnesium/magnesium_radio_control_init.cpp @@ -121,7 +121,8 @@ void magnesium_radio_control_impl::_init_peripherals() RFNOC_LOG_TRACE("Initializing GPIOs for channel " << radio_idx); _gpio.emplace_back(usrp::gpio_atr::gpio_atr_3000::make(_wb_ifaces.back(), n310_regs::SR_DB_GPIO + radio_idx * n310_regs::CHAN_REG_OFFSET, - n310_regs::RB_DB_GPIO + radio_idx * n310_regs::CHAN_REG_OFFSET)); + n310_regs::RB_DB_GPIO + radio_idx * n310_regs::CHAN_REG_OFFSET, + n310_regs::PERIPH_REG_OFFSET)); // DSA and AD9371 gain bits do *not* toggle on ATR modes. If we ever // connect anything else to this core, we might need to set_atr_mode() // to MODE_ATR on those bits. For now, all bits simply do what they're @@ -132,8 +133,10 @@ void magnesium_radio_control_impl::_init_peripherals() usrp::gpio_atr::gpio_atr_3000::MASK_SET_ALL); } RFNOC_LOG_TRACE("Initializing front-panel GPIO control...") - _fp_gpio = usrp::gpio_atr::gpio_atr_3000::make( - _wb_ifaces.front(), n310_regs::SR_FP_GPIO, n310_regs::RB_FP_GPIO); + _fp_gpio = usrp::gpio_atr::gpio_atr_3000::make(_wb_ifaces.front(), + n310_regs::SR_FP_GPIO, + n310_regs::RB_FP_GPIO, + n310_regs::PERIPH_REG_OFFSET); } void magnesium_radio_control_impl::_init_frontend_subtree( |