aboutsummaryrefslogtreecommitdiffstats
path: root/usrp2/sdr_lib
diff options
context:
space:
mode:
Diffstat (limited to 'usrp2/sdr_lib')
-rw-r--r--usrp2/sdr_lib/round_sd.v40
-rw-r--r--usrp2/sdr_lib/round_sd_tb.v8
2 files changed, 14 insertions, 34 deletions
diff --git a/usrp2/sdr_lib/round_sd.v b/usrp2/sdr_lib/round_sd.v
index 9c2a69615..b77c1471b 100644
--- a/usrp2/sdr_lib/round_sd.v
+++ b/usrp2/sdr_lib/round_sd.v
@@ -6,38 +6,16 @@ module round_sd
(input clk, input reset,
input [WIDTH_IN-1:0] in, output [WIDTH_OUT-1:0] out);
- localparam SUM_WIDTH = WIDTH_IN+1;
- localparam ERR_WIDTH = SUM_WIDTH - (WIDTH_OUT + 1) + 1;
- localparam ACC_WIDTH = ERR_WIDTH + 1;
-
- reg [ACC_WIDTH-1:0] acc;
- wire [SUM_WIDTH-1:0] acc_ext, in_ext;
-
- sign_extend #(.bits_in(WIDTH_IN),.bits_out(SUM_WIDTH)) ext_in (.in(in), .out(in_ext));
- sign_extend #(.bits_in(ACC_WIDTH),.bits_out(SUM_WIDTH)) ext_acc (.in(acc), .out(acc_ext));
-
- wire [SUM_WIDTH-1:0] sum = in_ext + acc_ext;
- wire [WIDTH_OUT:0] sum_round;
- wire [ERR_WIDTH-1:0] err;
- wire [ACC_WIDTH-1:0] err_ext;
-
- //round_reg #(.bits_in(SUM_WIDTH),.bits_out(WIDTH_OUT+1)) round_sum (.clk(clk), .in(sum), .out(sum_round));
- round #(.bits_in(SUM_WIDTH),.bits_out(WIDTH_OUT+1)) round_sum ( .in(sum), .out(sum_round));
+ localparam ERR_WIDTH = WIDTH_IN - WIDTH_OUT + 1;
- reg [WIDTH_IN-1:0] in_del;
- always @(posedge clk)
- in_del <= in;
-
- assign err = in_del - {sum_round,{SUM_WIDTH-WIDTH_OUT-1{1'b0}}};
+ wire [ERR_WIDTH-1:0] err;
+ wire [WIDTH_IN-1:0] err_ext, sum;
+
+ sign_extend #(.bits_in(ERR_WIDTH),.bits_out(WIDTH_IN)) ext_err (.in(err), .out(err_ext));
- clip #(.bits_in(WIDTH_OUT+1),.bits_out(WIDTH_OUT)) clip (.in(sum_round), .out(out));
-
- sign_extend #(.bits_in(ERR_WIDTH),.bits_out(ACC_WIDTH)) ext_err (.in(err), .out(err_ext));
+ add2_and_clip_reg #(.WIDTH(WIDTH_IN)) add2_and_clip_reg
+ (.clk(clk), .rst(reset), .in1(in), .in2(err_ext), .sum(sum));
- always @(posedge clk)
- if(reset)
- acc <= 0;
- else
- acc <= acc + err_ext;
+ round #(.bits_in(WIDTH_IN),.bits_out(WIDTH_OUT)) round_sum (.in(sum), .out(out), .err(err));
-endmodule // rx_dcoffset
+endmodule // round_sd
diff --git a/usrp2/sdr_lib/round_sd_tb.v b/usrp2/sdr_lib/round_sd_tb.v
index df9f58421..80b3707dc 100644
--- a/usrp2/sdr_lib/round_sd_tb.v
+++ b/usrp2/sdr_lib/round_sd_tb.v
@@ -30,15 +30,17 @@ module round_sd_tb();
$write("-%d\t",-adc_out);
else
$write("%d\t",adc_out);
- $write("%f\t",adc_in_del/factor);
- $write("%f\n",adc_in_del/factor-adc_out);
+ $write("\n");
+
+ //$write("%f\t",adc_in_del/factor);
+ //$write("%f\n",adc_in_del/factor-adc_out);
end
round_sd #(.WIDTH_IN(WIDTH_IN),.WIDTH_OUT(WIDTH_OUT))
round_sd(.clk(clk),.reset(rst), .in(adc_in),.out(adc_out));
always @(posedge clk)
- adc_in <= 4734;
+ adc_in <= 14'h1FDF;
//adc_in <= $random % 4739;
always @(posedge clk)