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-rw-r--r--usrp2/opencores/aemb/sim/verilog/CVS/Entries3
-rw-r--r--usrp2/opencores/aemb/sim/verilog/CVS/Repository1
-rw-r--r--usrp2/opencores/aemb/sim/verilog/CVS/Root1
-rw-r--r--usrp2/opencores/aemb/sim/verilog/CVS/Template0
4 files changed, 5 insertions, 0 deletions
diff --git a/usrp2/opencores/aemb/sim/verilog/CVS/Entries b/usrp2/opencores/aemb/sim/verilog/CVS/Entries
new file mode 100644
index 000000000..34e896e80
--- /dev/null
+++ b/usrp2/opencores/aemb/sim/verilog/CVS/Entries
@@ -0,0 +1,3 @@
+/aemb2.v/1.3/Tue Jan 15 18:38:57 2008//
+/edk32.v/1.12/Tue Jan 15 18:38:57 2008//
+D
diff --git a/usrp2/opencores/aemb/sim/verilog/CVS/Repository b/usrp2/opencores/aemb/sim/verilog/CVS/Repository
new file mode 100644
index 000000000..ff3eabf2d
--- /dev/null
+++ b/usrp2/opencores/aemb/sim/verilog/CVS/Repository
@@ -0,0 +1 @@
+aemb/sim/verilog
diff --git a/usrp2/opencores/aemb/sim/verilog/CVS/Root b/usrp2/opencores/aemb/sim/verilog/CVS/Root
new file mode 100644
index 000000000..44b2aa23b
--- /dev/null
+++ b/usrp2/opencores/aemb/sim/verilog/CVS/Root
@@ -0,0 +1 @@
+:pserver:anonymous@cvs.opencores.org:/cvsroot/anonymous
diff --git a/usrp2/opencores/aemb/sim/verilog/CVS/Template b/usrp2/opencores/aemb/sim/verilog/CVS/Template
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/usrp2/opencores/aemb/sim/verilog/CVS/Template