3 files changed, 35 insertions, 22 deletions

diff --git a/usrp2/gpmc/fifo_to_gpmc_async.v b/usrp2/gpmc/fifo_to_gpmc_async.v
index 4f253e1b5..5ac8b19bd 100644
--- a/usrp2/gpmc/fifo_to_gpmc_async.v
+++ b/usrp2/gpmc/fifo_to_gpmc_async.v
@@ -8,7 +8,7 @@ module fifo_to_gpmc_async
   (input clk, input reset, input clear,
    input [17:0] data_i, input src_rdy_i, output dst_rdy_o,
    output [15:0] EM_D, input EM_NCS, input EM_NOE,
-   input [15:0] frame_len, output reg bus_error);
+   input [15:0] frame_len);
 
    // Synchronize the async control signals
    reg [1:0] 	cs_del, oe_del;
@@ -35,11 +35,4 @@ module fifo_to_gpmc_async
 
    assign dst_rdy_o = do_read;
 
-   always @(posedge clk)
-     if(reset)
-       bus_error <= 0;
-     else if(dst_rdy_o & ~src_rdy_i)
-       bus_error <= 1;
-   
-
 endmodule // fifo_to_gpmc_async
diff --git a/usrp2/gpmc/fifo_watcher.v b/usrp2/gpmc/fifo_watcher.v
index 8b8f1abfb..da2051b04 100644
--- a/usrp2/gpmc/fifo_watcher.v
+++ b/usrp2/gpmc/fifo_watcher.v
@@ -2,25 +2,47 @@
 
 module fifo_watcher
   (input clk, input reset, input clear,
-   input src_rdy, input dst_rdy, input sof, input eof,
-   output have_packet, output [15:0] length, input next);
+   input src_rdy1, input dst_rdy1, input sof1, input eof1,
+   input src_rdy2, input dst_rdy2, input sof2, input eof2,
+   output have_packet, output [15:0] length, output reg bus_error);
 
-   wire   write = src_rdy & dst_rdy & eof;
+   wire   write = src_rdy1 & dst_rdy1 & eof1;
+   wire   read = src_rdy2 & dst_rdy2 & eof2;
+   wire   have_packet_int;
+   reg [15:0] counter;
    
    fifo_short #(.WIDTH(16)) frame_lengths
      (.clk(clk), .reset(reset), .clear(clear),
       .datain(counter), .src_rdy_i(write), .dst_rdy_o(),
-      .dataout(length), .src_rdy_o(have_packet), .dst_rdy_i(next) );
+      .dataout(length), .src_rdy_o(have_packet_int), .dst_rdy_i(read) );
 
-   reg [15:0] counter;
    always @(posedge clk)
      if(reset | clear)
        counter <= 1;   // Start at 1
-     else if(src_rdy & dst_rdy)
-       if(eof)
+     else if(src_rdy1 & dst_rdy1)
+       if(eof1)
 	 counter <= 1;
        else
 	 counter <= counter + 1;
-   
 
+   always @(posedge clk)
+     if(reset | clear)
+       bus_error <= 0;
+     else if(dst_rdy2 & ~src_rdy2)
+       bus_error <= 1;
+     else if(read & ~have_packet_int)
+       bus_error <= 1;
+
+   reg 	      in_packet;
+   assign have_packet = have_packet_int & ~in_packet;
+   
+   always @(posedge clk)
+     if(reset | clear)
+       in_packet <= 0;
+     else if(src_rdy2 & dst_rdy2)
+       if(eof2)
+	 in_packet <= 0;
+       else
+	 in_packet <= 1;
+   
 endmodule // fifo_watcher
diff --git a/usrp2/gpmc/gpmc_async.v b/usrp2/gpmc/gpmc_async.v
index c4cf0ef89..22e56cc89 100644
--- a/usrp2/gpmc/gpmc_async.v
+++ b/usrp2/gpmc/gpmc_async.v
@@ -67,7 +67,6 @@ module gpmc_async
    wire [17:0] 	rx18_data, rx18b_data;
    wire 	rx18_src_rdy, rx18_dst_rdy, rx18b_src_rdy, rx18b_dst_rdy;
    wire [15:0] 	rx_fifo_space, rx_frame_len;
-   assign rx_frame_len = tx_frame_len;
    
    fifo36_to_fifo18 f18_to_f36
      (.clk(fifo_clk), .reset(fifo_rst), .clear(0),
@@ -83,15 +82,14 @@ module gpmc_async
      (.clk(fifo_clk), .reset(fifo_rst), .clear(0),
       .data_i(rx18b_data), .src_rdy_i(rx18b_src_rdy), .dst_rdy_o(rx18b_dst_rdy),
       .EM_D(EM_D_fifo), .EM_NCS(EM_NCS4), .EM_NOE(EM_NOE),
-      .frame_len(rx_frame_len), .bus_error(bus_error_rx) );
+      .frame_len(rx_frame_len) );
 
    fifo_watcher fifo_watcher
      (.clk(fifo_clk), .reset(fifo_rst), .clear(0),
-      .src_rdy(rx18_src_rdy), .dst_rdy(rx18_dst_rdy), .sof(rx18_data[16]), .eof(rx18_data[17]),
-      .have_packet(), .length(), .next() );
+      .src_rdy1(rx18_src_rdy), .dst_rdy1(rx18_dst_rdy), .sof1(rx18_data[16]), .eof1(rx18_data[17]),
+      .src_rdy2(rx18b_src_rdy), .dst_rdy2(rx18b_dst_rdy), .sof2(rx18b_data[16]), .eof2(rx18b_data[17]),
+      .have_packet(rx_have_data), .length(rx_frame_len), .bus_error(bus_error_rx) );
 
-   assign rx_have_data = 0;
-   
    // ////////////////////////////////////////////
    // Control path on CS6