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-rw-r--r--mpm/python/usrp_mpm/periph_manager/base.py5
-rw-r--r--mpm/python/usrp_mpm/periph_manager/n310.py13
2 files changed, 13 insertions, 5 deletions
diff --git a/mpm/python/usrp_mpm/periph_manager/base.py b/mpm/python/usrp_mpm/periph_manager/base.py
index 25f635c68..ea2a145a8 100644
--- a/mpm/python/usrp_mpm/periph_manager/base.py
+++ b/mpm/python/usrp_mpm/periph_manager/base.py
@@ -21,7 +21,6 @@ Mboard implementation base class
import os
from six import iteritems
from ..mpmlog import get_logger
-from logging import getLogger
from ..types import EEPROM
from .. import dboard_manager
from .udev import get_eeprom_path
@@ -68,7 +67,7 @@ class PeriphManagerBase(object):
# spi_devices = get_spidev_nodes(self.dboard_spimaster_addrs.get(dboard_slot))
# dboard = dboard_manager.HW_PIDS.get(hw_pid, dboard_manager.unknown)
# self.dboards.update({dboard_slot: dboard(spi_devices, eeprom_data)})
- dboard_slot = "A"
+ dboard_slot = 0
self.log.debug("Adding dboard for slot {0}".format(dboard_slot))
spi_devices = []
# I know EEPROM adresses for my dboard slots
@@ -80,7 +79,7 @@ class PeriphManagerBase(object):
spi_devices = sorted(get_spidev_nodes("e0006000.spi"))
self.log.debug("Found spidev nodes: {0}".format(spi_devices))
dboard = dboard_manager.HW_PIDS.get(hw_pid, dboard_manager.unknown)
- self.dboards.update({dboard_slot: dboard(spi_devices, eeprom_data)})
+ self.dboards.update({dboard_slot: dboard(0, spi_devices, eeprom_data)})
def safe_list_updateable_components(self):
"""
diff --git a/mpm/python/usrp_mpm/periph_manager/n310.py b/mpm/python/usrp_mpm/periph_manager/n310.py
index 0aff6dd9b..56dba2ca8 100644
--- a/mpm/python/usrp_mpm/periph_manager/n310.py
+++ b/mpm/python/usrp_mpm/periph_manager/n310.py
@@ -20,6 +20,7 @@ N310 implementation module
from __future__ import print_function
import struct
import netaddr
+from six import iteritems
from .base import PeriphManagerBase
from .net import get_iface_addrs
from .net import byte_to_mac
@@ -137,8 +138,9 @@ class n310(PeriphManagerBase):
# if header.get("dataversion", 0) == 1:
# Initialize our daughterboards:
- self.log.debug("Initializing A-side dboard")
- self.dboards['A'].init_device()
+ self.log.debug("Initializing dboards...")
+ for k, dboard in iteritems(self.dboards):
+ dboard.init_device()
def _read_eeprom_v1(self, data):
"""
@@ -247,4 +249,11 @@ class n310(PeriphManagerBase):
else: # external
self._gpios.reset("CLK-MAINREF-SEL0")
self._gpios.reset("CLK-MAINREF-SEL1")
+ self._clock_source = clock_source
+ ref_clk_freq = self.get_clock_freq()
+ for slot, dboard in iteritems(self.dboards):
+ if hasattr(dboard, 'update_ref_clock_freq'):
+ self.log.trace(
+ "Updating reference clock on dboard `{}' to {} MHz...".format(slot, ref_clk_freq/1e6)
+ )