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-rw-r--r--mpm/python/usrp_mpm/periph_manager/n3xx_periphs.py24
1 files changed, 12 insertions, 12 deletions
diff --git a/mpm/python/usrp_mpm/periph_manager/n3xx_periphs.py b/mpm/python/usrp_mpm/periph_manager/n3xx_periphs.py
index 756f0f788..009eb123b 100644
--- a/mpm/python/usrp_mpm/periph_manager/n3xx_periphs.py
+++ b/mpm/python/usrp_mpm/periph_manager/n3xx_periphs.py
@@ -204,7 +204,7 @@ class MboardRegsControl(object):
The return is a tuple of
2 numbers: (major compat number, minor compat number )
"""
- with self.regs.open():
+ with self.regs:
compat_number = self.peek32(self.M_COMPAT_NUM)
minor = compat_number & 0xff
major = (compat_number>>16) & 0xff
@@ -215,7 +215,7 @@ class MboardRegsControl(object):
Arguments:
value {unsigned} -- value is a single bit bit mask of 12 pins GPIO
"""
- with self.regs.open():
+ with self.regs:
return self.poke32(self.MB_GPIO_MASTER, value)
def get_fp_gpio_master(self):
@@ -224,7 +224,7 @@ class MboardRegsControl(object):
0: means the pin is driven by PL
1: means the pin is driven by PS
"""
- with self.regs.open():
+ with self.regs:
return self.peek32(self.MB_GPIO_MASTER) & 0xfff
def set_fp_gpio_radio_src(self, value):
@@ -236,7 +236,7 @@ class MboardRegsControl(object):
10: means the pin is driven by radio 2
11: means the pin is driven by radio 3
"""
- with self.regs.open():
+ with self.regs:
return self.poke32(self.MB_GPIO_RADIO_SRC, value)
def get_fp_gpio_radio_src(self):
@@ -247,7 +247,7 @@ class MboardRegsControl(object):
10: means the pin is driven by radio 2
11: means the pin is driven by radio 3
"""
- with self.regs.open():
+ with self.regs:
return self.peek32(self.MB_GPIO_RADIO_SRC) & 0xffffff
def get_build_timestamp(self):
@@ -256,7 +256,7 @@ class MboardRegsControl(object):
The return is datetime string with the ISO 8601 format
(YYYY-MM-DD HH:MM:SS.mmmmmm)
"""
- with self.regs.open():
+ with self.regs:
datestamp_rb = self.peek32(self.MB_DATESTAMP)
if datestamp_rb > 0:
dt_str = datetime.datetime(
@@ -278,7 +278,7 @@ class MboardRegsControl(object):
The return is a tuple of
2 numbers: (short git hash, bool: is the tree dirty?)
"""
- with self.regs.open():
+ with self.regs:
git_hash_rb = self.peek32(self.MB_GIT_HASH)
git_hash = git_hash_rb & 0x0FFFFFFF
tree_dirty = ((git_hash_rb & 0xF0000000) > 0)
@@ -317,7 +317,7 @@ class MboardRegsControl(object):
else:
assert False
- with self.regs.open():
+ with self.regs:
reg_val = self.peek32(self.MB_CLOCK_CTRL) & 0xFFFFFF90
# prevent glitches by writing a cleared value first, then the final value.
self.poke32(self.MB_CLOCK_CTRL, reg_val)
@@ -332,7 +332,7 @@ class MboardRegsControl(object):
self.log.trace("%s PPS/Trig output!",
"Enabling" if enable else "Disabling")
mask = 0xFFFFFFFF ^ (0b1 << self.MB_CLOCK_CTRL_PPS_OUT_EN)
- with self.regs.open():
+ with self.regs:
# mask the bit to clear it:
reg_val = self.peek32(self.MB_CLOCK_CTRL) & mask
if enable:
@@ -348,7 +348,7 @@ class MboardRegsControl(object):
self.log.trace("%s measurement clock MMCM reset...",
"Asserting" if reset else "Clearing")
mask = 0xFFFFFFFF ^ (0b1 << self.MB_CLOCK_CTRL_MEAS_CLK_RESET)
- with self.regs.open():
+ with self.regs:
# mask the bit to clear it
reg_val = self.peek32(self.MB_CLOCK_CTRL) & mask
if reset:
@@ -362,7 +362,7 @@ class MboardRegsControl(object):
Check the status of the MMCM for the measurement clock in the FPGA TDC.
"""
mask = 0b1 << self.MB_CLOCK_CTRL_MEAS_CLK_LOCKED
- with self.regs.open():
+ with self.regs:
reg_val = self.peek32(self.MB_CLOCK_CTRL)
locked = (reg_val & mask) > 0
if not locked:
@@ -377,7 +377,7 @@ class MboardRegsControl(object):
Reads the type of the FPGA image currently loaded
Returns a string with the type (ie HG, XG, AA, etc.)
"""
- with self.regs.open():
+ with self.regs:
sfp0_info_rb = self.peek32(self.MB_SFP0_INFO)
sfp1_info_rb = self.peek32(self.MB_SFP1_INFO)
# Print the registers values as 32-bit hex values