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-rw-r--r--mpm/python/usrp_mpm/dboard_manager/mg_init.py5
1 files changed, 3 insertions, 2 deletions
diff --git a/mpm/python/usrp_mpm/dboard_manager/mg_init.py b/mpm/python/usrp_mpm/dboard_manager/mg_init.py
index 99caf6d46..62cc27a4f 100644
--- a/mpm/python/usrp_mpm/dboard_manager/mg_init.py
+++ b/mpm/python/usrp_mpm/dboard_manager/mg_init.py
@@ -551,8 +551,9 @@ class MagnesiumInitManager(object):
self.log.debug(
"Sample Clocks and Phase DAC Configured Successfully!")
# Clocks and PPS are now fully active!
- self.mykonos.set_master_clock_rate(master_clock_rate)
- self.init_jesd(jesdcore, master_clock_rate, args)
+ if args.get('skip_rfic', None) == None:
+ self.mykonos.set_master_clock_rate(master_clock_rate)
+ self.init_jesd(jesdcore, master_clock_rate, args)
jesdcore = None # Help with garbage collection
# That's all that requires access to the dboard regs!
return True