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-rw-r--r--mpm/python/usrp_mpm/dboard_manager/lmk_eiscat.py11
1 files changed, 9 insertions, 2 deletions
diff --git a/mpm/python/usrp_mpm/dboard_manager/lmk_eiscat.py b/mpm/python/usrp_mpm/dboard_manager/lmk_eiscat.py
index c2f35232d..509d65be0 100644
--- a/mpm/python/usrp_mpm/dboard_manager/lmk_eiscat.py
+++ b/mpm/python/usrp_mpm/dboard_manager/lmk_eiscat.py
@@ -14,8 +14,8 @@ class LMK04828EISCAT(LMK04828):
"""
LMK04828 controls for EISCAT daughterboard
"""
- def __init__(self, regs_iface, ref_clock_freq, slot=None):
- LMK04828.__init__(self, regs_iface, slot)
+ def __init__(self, regs_iface, ref_clock_freq, slot=None, log=None):
+ LMK04828.__init__(self, regs_iface, log)
self.log.trace("Using reference clock frequency {} MHz".format(ref_clock_freq/1e6))
if ref_clock_freq != 10e6:
error_msg = "Invalid reference clock frequency: {} MHz. " \
@@ -26,6 +26,13 @@ class LMK04828EISCAT(LMK04828):
self.init()
self.config()
+
+ def get_vco_freq(self):
+ """
+ Return the hard coded VCO frequency in the LMK PLL2.
+ """
+ return 2.496e9
+
def init(self):
"""
Basic init. Turns it on. Let's us read SPI.