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-rw-r--r--mpm/python/usrp_mpm/cores/__init__.py4
-rw-r--r--mpm/python/usrp_mpm/cores/nijesdcore.py4
-rw-r--r--mpm/python/usrp_mpm/cores/tdc_sync.py4
3 files changed, 6 insertions, 6 deletions
diff --git a/mpm/python/usrp_mpm/cores/__init__.py b/mpm/python/usrp_mpm/cores/__init__.py
index 15f016feb..0cd2bc0c7 100644
--- a/mpm/python/usrp_mpm/cores/__init__.py
+++ b/mpm/python/usrp_mpm/cores/__init__.py
@@ -1,7 +1,7 @@
#
-# Copyright 2017 Ettus Research, National Instruments Company
+# Copyright 2017 Ettus Research, a National Instruments Company
#
-# SPDX-License-Identifier: GPL-3.0
+# SPDX-License-Identifier: GPL-3.0-or-later
#
"""
Cores submodule
diff --git a/mpm/python/usrp_mpm/cores/nijesdcore.py b/mpm/python/usrp_mpm/cores/nijesdcore.py
index 5d1f4e264..bf2bde6e9 100644
--- a/mpm/python/usrp_mpm/cores/nijesdcore.py
+++ b/mpm/python/usrp_mpm/cores/nijesdcore.py
@@ -1,7 +1,7 @@
#
-# Copyright 2017 Ettus Research, National Instruments Company
+# Copyright 2017 Ettus Research, a National Instruments Company
#
-# SPDX-License-Identifier: GPL-3.0
+# SPDX-License-Identifier: GPL-3.0-or-later
#
"""
JESD FPGA Core Interface
diff --git a/mpm/python/usrp_mpm/cores/tdc_sync.py b/mpm/python/usrp_mpm/cores/tdc_sync.py
index f58234e2d..1ded38fef 100644
--- a/mpm/python/usrp_mpm/cores/tdc_sync.py
+++ b/mpm/python/usrp_mpm/cores/tdc_sync.py
@@ -1,7 +1,7 @@
#
-# Copyright 2017 Ettus Research, National Instruments Company
+# Copyright 2017 Ettus Research, a National Instruments Company
#
-# SPDX-License-Identifier: GPL-3.0
+# SPDX-License-Identifier: GPL-3.0-or-later
#
"""
TDC clock synchronization