diff options
Diffstat (limited to 'mpm/include')
| -rw-r--r-- | mpm/include/mpm/CMakeLists.txt | 2 | ||||
| -rw-r--r-- | mpm/include/mpm/ad9361/CMakeLists.txt | 1 | ||||
| -rw-r--r-- | mpm/include/mpm/ad9361/ad9361_ctrl.hpp | 47 | ||||
| -rw-r--r-- | mpm/include/mpm/ad9361/e31x_defaults.hpp | 45 | ||||
| -rw-r--r-- | mpm/include/mpm/dboards/CMakeLists.txt | 5 | ||||
| -rw-r--r-- | mpm/include/mpm/dboards/e31x_db_manager.hpp | 43 |
6 files changed, 142 insertions, 1 deletions
diff --git a/mpm/include/mpm/CMakeLists.txt b/mpm/include/mpm/CMakeLists.txt index e5b7193c6..f3637c913 100644 --- a/mpm/include/mpm/CMakeLists.txt +++ b/mpm/include/mpm/CMakeLists.txt @@ -11,7 +11,7 @@ install(FILES if(ENABLE_MYKONOS) add_subdirectory(ad937x) -elseif(ENABLE_E320) +elseif(ENABLE_E320 OR ENABLE_E300) add_subdirectory(ad9361) endif(ENABLE_MYKONOS) diff --git a/mpm/include/mpm/ad9361/CMakeLists.txt b/mpm/include/mpm/ad9361/CMakeLists.txt index 94ea655a7..2b2ea03ec 100644 --- a/mpm/include/mpm/ad9361/CMakeLists.txt +++ b/mpm/include/mpm/ad9361/CMakeLists.txt @@ -8,5 +8,6 @@ install(FILES ad9361_ctrl.hpp e320_defaults.hpp + e31x_defaults.hpp DESTINATION ${INCLUDE_DIR}/mpm/catalina ) diff --git a/mpm/include/mpm/ad9361/ad9361_ctrl.hpp b/mpm/include/mpm/ad9361/ad9361_ctrl.hpp index 7673d7460..2405317fd 100644 --- a/mpm/include/mpm/ad9361/ad9361_ctrl.hpp +++ b/mpm/include/mpm/ad9361/ad9361_ctrl.hpp @@ -14,11 +14,16 @@ #include <functional> #include <string> #include <vector> +#include <future> namespace mpm { namespace chips { using uhd::usrp::ad9361_ctrl; }}; // namespace mpm::chips +//! Async calls +std::future<double> handle_tune; +std::future<double> handle_set_clock_rate; + // TODO: pull in filter_info_base #ifdef LIBMPM_PYTHON void export_catalina(py::module& top_module) @@ -58,6 +63,48 @@ void export_catalina(py::module& top_module) .def("_get_filter", &ad9361_ctrl::get_filter) .def("set_filter", &ad9361_ctrl::set_filter) .def("output_digital_test_tone", &ad9361_ctrl::output_digital_test_tone); + + m.def("async__tune", +[]( + ad9361_ctrl& catalina, + const std::string &which, + const double value + ){ + handle_tune = std::async(std::launch::async, + &ad9361_ctrl::tune, + &catalina, + which, + value + ); + }); + m.def("await__tune", +[]( + )->bool{ + if (handle_tune.wait_for(std::chrono::seconds(0)) + == std::future_status::ready){ + handle_tune.get(); + return true; + } + return false; + }); + m.def("async__set_clock_rate", +[]( + ad9361_ctrl& catalina, + const double value + ){ + handle_set_clock_rate = std::async(std::launch::async, + &ad9361_ctrl::set_clock_rate, + &catalina, + value + ); + }); + m.def("await__set_clock_rate", +[]( + )->bool{ + if (handle_set_clock_rate.wait_for(std::chrono::seconds(0)) + == std::future_status::ready){ + handle_set_clock_rate.get(); + return true; + } + return false; + }); + } #endif diff --git a/mpm/include/mpm/ad9361/e31x_defaults.hpp b/mpm/include/mpm/ad9361/e31x_defaults.hpp new file mode 100644 index 000000000..c2188af8b --- /dev/null +++ b/mpm/include/mpm/ad9361/e31x_defaults.hpp @@ -0,0 +1,45 @@ +// +// Copyright 2018 Ettus Research, a National Instruments Company +// +// SPDX-License-Identifier: GPL-3.0-or-later +// + +#ifndef INCLUDED_E31X_DEFAULTS_HPP +#define INCLUDED_E31X_DEFAULTS_HPP + +#include "ad9361_ctrl.hpp" + +namespace mpm { namespace types { namespace e31x { + +using namespace uhd::usrp; + +class e31x_ad9361_client_t : public uhd::usrp::ad9361_params { +public: + ~e31x_ad9361_client_t() {} + double get_band_edge(frequency_band_t band) { + switch (band) { + case AD9361_RX_BAND0: return 1.2e9; + case AD9361_RX_BAND1: return 2.6e9; + case AD9361_TX_BAND0: return 2940.0e6; + default: return 0; + } + } + clocking_mode_t get_clocking_mode() { + return clocking_mode_t::AD9361_XTAL_N_CLK_PATH; + } + digital_interface_mode_t get_digital_interface_mode() { + return AD9361_DDR_FDD_LVCMOS; + } + digital_interface_delays_t get_digital_interface_timing() { + digital_interface_delays_t delays; + delays.rx_clk_delay = 0; + delays.rx_data_delay = 0xF; + delays.tx_clk_delay = 0; + delays.tx_data_delay = 0xF; + return delays; + } +}; + +}}} // namespace + +#endif // INCLUDED_E31X_DEFAULTS_HPP diff --git a/mpm/include/mpm/dboards/CMakeLists.txt b/mpm/include/mpm/dboards/CMakeLists.txt index 03a5404bc..d1dd569d7 100644 --- a/mpm/include/mpm/dboards/CMakeLists.txt +++ b/mpm/include/mpm/dboards/CMakeLists.txt @@ -13,4 +13,9 @@ elseif(ENABLE_E320) neon_manager.hpp DESTINATION ${INCLUDE_DIR}/mpm/dboards ) +elseif(ENABLE_E300) + install(FILES + e31x_db_manager.hpp + DESTINATION ${INCLUDE_DIR}/mpm/dboards + ) endif(ENABLE_MAGNESIUM) diff --git a/mpm/include/mpm/dboards/e31x_db_manager.hpp b/mpm/include/mpm/dboards/e31x_db_manager.hpp new file mode 100644 index 000000000..8777778e9 --- /dev/null +++ b/mpm/include/mpm/dboards/e31x_db_manager.hpp @@ -0,0 +1,43 @@ +// +// Copyright 2018 Ettus Research, a National Instruments Company +// Copyright 2019 Ettus Research, a National Instruments Brand +// +// SPDX-License-Identifier: GPL-3.0-or-later +// + +#pragma once + +#include <mpm/ad9361/ad9361_ctrl.hpp> +#include <mpm/types/lockable.hpp> +#include <mpm/types/regs_iface.hpp> +#include <boost/shared_ptr.hpp> +#include <memory> +#include <mutex> + +namespace mpm { namespace dboards { + class e31x_db_manager + { + public: + e31x_db_manager(const std::string &catalina_spidev); + + /*! Return a reference to the radio chip controls + */ + mpm::chips::ad9361_ctrl::sptr get_radio_ctrl(){ return _catalina_ctrl; } + + private: + mpm::chips::ad9361_ctrl::sptr _catalina_ctrl; + }; + +}}; /* namespace mpm::dboards */ + +#ifdef LIBMPM_PYTHON +void export_e31x_db(py::module& top_module) +{ + using namespace mpm::dboards; + auto m = top_module.def_submodule("dboards"); + + py::class_<mpm::dboards::e31x_db_manager>(m, "e31x_db_manager") + .def(py::init<std::string>()) + .def("get_radio_ctrl", &mpm::dboards::e31x_db_manager::get_radio_ctrl); +} +#endif |