diff options
Diffstat (limited to 'host/lib')
57 files changed, 9450 insertions, 0 deletions
diff --git a/host/lib/CMakeLists.txt b/host/lib/CMakeLists.txt new file mode 100644 index 000000000..7b765b0d3 --- /dev/null +++ b/host/lib/CMakeLists.txt @@ -0,0 +1,120 @@ +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +######################################################################## +# Setup Python +######################################################################## +INCLUDE(FindPythonInterp) + +MACRO(PYTHON_CHECK_MODULE module have) + MESSAGE(STATUS "Checking for python module ${module}") + EXECUTE_PROCESS( + COMMAND ${PYTHON_EXECUTABLE} -c "import ${module}" + RESULT_VARIABLE ${have} + ) + IF(${have} EQUAL 0) + MESSAGE(STATUS "Checking for python module ${module} - found") + SET(${have} TRUE) + ELSE(${have} EQUAL 0) + MESSAGE(STATUS "Checking for python module ${module} - not found") + SET(${have} FALSE) + ENDIF(${have} EQUAL 0) +ENDMACRO(PYTHON_CHECK_MODULE) + +PYTHON_CHECK_MODULE("Cheetah" HAVE_PYTHON_MODULE_CHEETAH) + +IF(NOT HAVE_PYTHON_MODULE_CHEETAH) + MESSAGE(FATAL_ERROR "Error: Cheetah Templates needed for pre-build generation.") +ENDIF(NOT HAVE_PYTHON_MODULE_CHEETAH) + +######################################################################## +# Helpful Macros +######################################################################## +MACRO(LIBUHD_APPEND_SOURCES) + LIST(APPEND libuhd_sources ${ARGV}) +ENDMACRO(LIBUHD_APPEND_SOURCES) + +MACRO(LIBUHD_PYTHON_GEN_SOURCE pyfile outfile) + #ensure that the directory exists for outfile + GET_FILENAME_COMPONENT(outfile_dir ${outfile} PATH) + FILE(MAKE_DIRECTORY ${outfile_dir}) + + #make the outfile depend on the python script + ADD_CUSTOM_COMMAND( + OUTPUT ${outfile} DEPENDS ${pyfile} + COMMAND ${PYTHON_EXECUTABLE} ${pyfile} ${outfile} + COMMENT "Generating ${outfile}" + ) + + #make libuhd depend on the outfile + LIBUHD_APPEND_SOURCES(${outfile}) +ENDMACRO(LIBUHD_PYTHON_GEN_SOURCE) + +######################################################################## +# Include CMakeLists.txt from subdirectories +######################################################################## +INCLUDE(${CMAKE_CURRENT_SOURCE_DIR}/ic_reg_maps/CMakeLists.txt) +INCLUDE(${CMAKE_CURRENT_SOURCE_DIR}/transport/CMakeLists.txt) +INCLUDE(${CMAKE_CURRENT_SOURCE_DIR}/usrp/CMakeLists.txt) +INCLUDE(${CMAKE_CURRENT_SOURCE_DIR}/usrp/dboard/CMakeLists.txt) +INCLUDE(${CMAKE_CURRENT_SOURCE_DIR}/usrp/usrp2/CMakeLists.txt) + +######################################################################## +# Setup defines for module loading +######################################################################## +MESSAGE(STATUS "Configuring module loading...") + +INCLUDE(CheckIncludeFileCXX) +CHECK_INCLUDE_FILE_CXX(dlfcn.h HAVE_DLFCN_H) +CHECK_INCLUDE_FILE_CXX(windows.h HAVE_WINDOWS_H) + +IF(HAVE_DLFCN_H) + MESSAGE(STATUS " Module loading supported through dlopen.") + ADD_DEFINITIONS(-DHAVE_DLFCN_H) +ELSEIF(HAVE_WINDOWS_H) + MESSAGE(STATUS " Module loading supported through LoadLibrary.") + ADD_DEFINITIONS(-DHAVE_WINDOWS_H) +ELSE(HAVE_DLFCN_H) + MESSAGE(STATUS " Module loading not supported.") +ENDIF(HAVE_DLFCN_H) + +######################################################################## +# Append to the list of sources for lib uhd +######################################################################## +LIBUHD_APPEND_SOURCES( + ${CMAKE_CURRENT_SOURCE_DIR}/device.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/gain_handler.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/load_modules.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/types.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/utils.cpp + ${CMAKE_CURRENT_SOURCE_DIR}/wax.cpp +) + +######################################################################## +# Setup libuhd library +######################################################################## +ADD_LIBRARY(uhd SHARED ${libuhd_sources}) + +TARGET_LINK_LIBRARIES(uhd ${Boost_LIBRARIES} ${CMAKE_DL_LIBS}) + +SET_TARGET_PROPERTIES(uhd PROPERTIES DEFINE_SYMBOL "UHD_DLL_EXPORTS") + +INSTALL(TARGETS uhd + LIBRARY DESTINATION ${LIBRARY_DIR} # .so file + ARCHIVE DESTINATION ${LIBRARY_DIR} # .lib file + RUNTIME DESTINATION ${LIBRARY_DIR} # .dll file +) diff --git a/host/lib/device.cpp b/host/lib/device.cpp new file mode 100644 index 000000000..f139ecb20 --- /dev/null +++ b/host/lib/device.cpp @@ -0,0 +1,146 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// asize_t with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include <uhd/device.hpp> +#include <uhd/types/dict.hpp> +#include <uhd/utils/assert.hpp> +#include <uhd/utils/static.hpp> +#include <boost/foreach.hpp> +#include <boost/format.hpp> +#include <boost/weak_ptr.hpp> +#include <boost/functional/hash.hpp> +#include <boost/tuple/tuple.hpp> +#include <stdexcept> +#include <algorithm> + +using namespace uhd; + +/*********************************************************************** + * Helper Functions + **********************************************************************/ +/*! + * Make a device hash that maps 1 to 1 with a device address. + * The hash will be used to identify created devices. + * \param dev_addr the device address + * \return the hash number + */ +static size_t hash_device_addr( + const device_addr_t &dev_addr +){ + //sort the keys of the device address + std::vector<std::string> keys = dev_addr.keys(); + std::sort(keys.begin(), keys.end()); + + //combine the hashes of sorted keys/value pairs + size_t hash = 0; + BOOST_FOREACH(const std::string &key, keys){ + boost::hash_combine(hash, key); + boost::hash_combine(hash, dev_addr[key]); + } + return hash; +} + +/*********************************************************************** + * Registration + **********************************************************************/ +typedef boost::tuple<device::find_t, device::make_t> dev_fcn_reg_t; + +// instantiate the device function registry container +UHD_SINGLETON_FCN(std::vector<dev_fcn_reg_t>, get_dev_fcn_regs) + +void device::register_device( + const find_t &find, + const make_t &make +){ + //std::cout << "registering device" << std::endl; + get_dev_fcn_regs().push_back(dev_fcn_reg_t(find, make)); +} + +/*********************************************************************** + * Discover + **********************************************************************/ +device_addrs_t device::find(const device_addr_t &hint){ + device_addrs_t device_addrs; + + BOOST_FOREACH(const dev_fcn_reg_t &fcn, get_dev_fcn_regs()){ + device_addrs_t discovered_addrs = fcn.get<0>()(hint); + device_addrs.insert( + device_addrs.begin(), + discovered_addrs.begin(), + discovered_addrs.end() + ); + } + + return device_addrs; +} + +/*********************************************************************** + * Make + **********************************************************************/ +device::sptr device::make(const device_addr_t &hint, size_t which){ + typedef boost::tuple<device_addr_t, make_t> dev_addr_make_t; + std::vector<dev_addr_make_t> dev_addr_makers; + + BOOST_FOREACH(const dev_fcn_reg_t &fcn, get_dev_fcn_regs()){ + BOOST_FOREACH(device_addr_t dev_addr, fcn.get<0>()(hint)){ + //append the discovered address and its factory function + dev_addr_makers.push_back(dev_addr_make_t(dev_addr, fcn.get<1>())); + } + } + + //check that we found any devices + if (dev_addr_makers.size() == 0){ + throw std::runtime_error(str( + boost::format("No devices found for ----->\n%s") % hint.to_pp_string() + )); + } + + //check that the which index is valid + if (dev_addr_makers.size() <= which){ + throw std::runtime_error(str( + boost::format("No device at index %d for ----->\n%s") % which % hint.to_pp_string() + )); + } + + //create a unique hash for the device address + device_addr_t dev_addr; make_t maker; + boost::tie(dev_addr, maker) = dev_addr_makers.at(which); + size_t dev_hash = hash_device_addr(dev_addr); + //std::cout << boost::format("Hash: %u") % dev_hash << std::endl; + + //copy keys that were in hint but not in dev_addr + //this way, we can pass additional transport arguments + BOOST_FOREACH(const std::string &key, hint.keys()){ + if (not dev_addr.has_key(key)) dev_addr[key] = hint[key]; + } + + //map device address hash to created devices + static uhd::dict<size_t, boost::weak_ptr<device> > hash_to_device; + + //try to find an existing device + try{ + UHD_ASSERT_THROW(hash_to_device.has_key(dev_hash)); + UHD_ASSERT_THROW(not hash_to_device[dev_hash].expired()); + return hash_to_device[dev_hash].lock(); + } + //create and register a new device + catch(const uhd::assert_error &){ + device::sptr dev = maker(dev_addr); + hash_to_device[dev_hash] = dev; + return dev; + } +} diff --git a/host/lib/gain_handler.cpp b/host/lib/gain_handler.cpp new file mode 100644 index 000000000..36e2e8ed3 --- /dev/null +++ b/host/lib/gain_handler.cpp @@ -0,0 +1,177 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include <uhd/utils/gain_handler.hpp> +#include <uhd/utils/assert.hpp> +#include <uhd/types/ranges.hpp> +#include <uhd/utils/props.hpp> +#include <boost/assign/list_of.hpp> +#include <boost/foreach.hpp> +#include <boost/format.hpp> +#include <cmath> +#include <vector> + +using namespace uhd; + +/*********************************************************************** + * gain handler implementation interface + **********************************************************************/ +class gain_handler_impl : public gain_handler{ +public: + gain_handler_impl( + const wax::obj &link, + const props_t &props, + is_equal_t is_equal + ); + ~gain_handler_impl(void); + bool intercept_get(const wax::obj &key, wax::obj &val); + bool intercept_set(const wax::obj &key, const wax::obj &val); + +private: + wax::obj _link; + props_t _props; + is_equal_t _is_equal; + + prop_names_t get_gain_names(void); + float get_overall_gain_val(void); + gain_range_t get_overall_gain_range(void); + template <class T> T get_named_prop(const wax::obj &prop, const std::string &name){ + return _link[named_prop_t(prop, name)].as<T>(); + } +}; + +/*********************************************************************** + * the make function + **********************************************************************/ +gain_handler::sptr gain_handler::make( + const wax::obj &link, + const props_t &props, + is_equal_t is_equal +){ + return sptr(new gain_handler_impl(link, props, is_equal)); +} + +/*********************************************************************** + * gain handler implementation methods + **********************************************************************/ +gain_handler::props_t::props_t(void){ + /* NOP */ +} + +gain_handler_impl::gain_handler_impl( + const wax::obj &link, + const props_t &props, + is_equal_t is_equal +){ + _link = link; + _props = props; + _is_equal = is_equal; +} + +gain_handler_impl::~gain_handler_impl(void){ + /* NOP */ +} + +prop_names_t gain_handler_impl::get_gain_names(void){ + return _link[_props.names].as<prop_names_t>(); +} + +float gain_handler_impl::get_overall_gain_val(void){ + float gain_val = 0; + BOOST_FOREACH(std::string name, get_gain_names()){ + gain_val += get_named_prop<float>(_props.value, name); + } + return gain_val; +} + +gain_range_t gain_handler_impl::get_overall_gain_range(void){ + float gain_min = 0, gain_max = 0, gain_step = 0; + BOOST_FOREACH(std::string name, get_gain_names()){ + gain_range_t floatmp = get_named_prop<gain_range_t>(_props.range, name); + gain_min += floatmp.min; + gain_max += floatmp.max; + gain_step = std::max(gain_step, floatmp.step); + } + return gain_range_t(gain_min, gain_max, gain_step); +} + +/*********************************************************************** + * gain handler implementation get method + **********************************************************************/ +bool gain_handler_impl::intercept_get(const wax::obj &key_, wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //not a wildcard... dont handle (but check name) + if (name != ""){ + assert_has(get_gain_names(), name, "gain name"); + return false; + } + + if (_is_equal(key, _props.value)){ + val = get_overall_gain_val(); + return true; + } + + if (_is_equal(key, _props.range)){ + val = get_overall_gain_range(); + return true; + } + + return false; //not handled +} + +/*********************************************************************** + * gain handler implementation set method + **********************************************************************/ +bool gain_handler_impl::intercept_set(const wax::obj &key_, const wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //not a gain value key... dont handle + if (not _is_equal(key, _props.value)) return false; + + float gain_val = val.as<float>(); + + //not a wildcard... dont handle (but check name and range) + if (name != ""){ + assert_has(get_gain_names(), name, "gain name"); + gain_range_t gain = get_named_prop<gain_range_t>(_props.range, name); + if (gain_val > gain.max or gain_val < gain.min) throw std::range_error(str( + boost::format("A value of %f for gain %s is out of range of (%f, %f)") + % gain_val % name % gain.min % gain.max + )); + return false; + } + + //set the overall gain + BOOST_FOREACH(std::string name, get_gain_names()){ + //get the min, max, step for this gain name + gain_range_t gain = get_named_prop<gain_range_t>(_props.range, name); + + //clip g to be within the allowed range + float g = std::min(std::max(gain_val, gain.min), gain.max); + //set g to be a multiple of the step size + g -= std::fmod(g, gain.step); + //set g to be the new gain + _link[named_prop_t(_props.value, name)] = g; + //subtract g out of the total gain left to apply + gain_val -= g; + } + + return true; +} diff --git a/host/lib/ic_reg_maps/.gitignore b/host/lib/ic_reg_maps/.gitignore new file mode 100644 index 000000000..a74b07aee --- /dev/null +++ b/host/lib/ic_reg_maps/.gitignore @@ -0,0 +1 @@ +/*.pyc diff --git a/host/lib/ic_reg_maps/CMakeLists.txt b/host/lib/ic_reg_maps/CMakeLists.txt new file mode 100644 index 000000000..63378eb89 --- /dev/null +++ b/host/lib/ic_reg_maps/CMakeLists.txt @@ -0,0 +1,65 @@ +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +#This file will be included by cmake, use absolute paths! + +INCLUDE_DIRECTORIES(${CMAKE_BINARY_DIR}/lib/ic_reg_maps) + +LIBUHD_PYTHON_GEN_SOURCE( + ${CMAKE_SOURCE_DIR}/lib/ic_reg_maps/gen_adf4350_regs.py + ${CMAKE_BINARY_DIR}/lib/ic_reg_maps/adf4350_regs.hpp +) + +LIBUHD_PYTHON_GEN_SOURCE( + ${CMAKE_SOURCE_DIR}/lib/ic_reg_maps/gen_adf4360_regs.py + ${CMAKE_BINARY_DIR}/lib/ic_reg_maps/adf4360_regs.hpp +) + +LIBUHD_PYTHON_GEN_SOURCE( + ${CMAKE_SOURCE_DIR}/lib/ic_reg_maps/gen_ad9510_regs.py + ${CMAKE_BINARY_DIR}/lib/ic_reg_maps/ad9510_regs.hpp +) + +LIBUHD_PYTHON_GEN_SOURCE( + ${CMAKE_SOURCE_DIR}/lib/ic_reg_maps/gen_ad9777_regs.py + ${CMAKE_BINARY_DIR}/lib/ic_reg_maps/ad9777_regs.hpp +) + +LIBUHD_PYTHON_GEN_SOURCE( + ${CMAKE_SOURCE_DIR}/lib/ic_reg_maps/gen_ad5624_regs.py + ${CMAKE_BINARY_DIR}/lib/ic_reg_maps/ad5624_regs.hpp +) + +LIBUHD_PYTHON_GEN_SOURCE( + ${CMAKE_SOURCE_DIR}/lib/ic_reg_maps/gen_ad7922_regs.py + ${CMAKE_BINARY_DIR}/lib/ic_reg_maps/ad7922_regs.hpp +) + +LIBUHD_PYTHON_GEN_SOURCE( + ${CMAKE_SOURCE_DIR}/lib/ic_reg_maps/gen_max2829_regs.py + ${CMAKE_BINARY_DIR}/lib/ic_reg_maps/max2829_regs.hpp +) + +LIBUHD_PYTHON_GEN_SOURCE( + ${CMAKE_SOURCE_DIR}/lib/ic_reg_maps/gen_ad9862_regs.py + ${CMAKE_BINARY_DIR}/lib/ic_reg_maps/ad9862_regs.hpp +) + +LIBUHD_PYTHON_GEN_SOURCE( + ${CMAKE_SOURCE_DIR}/lib/ic_reg_maps/gen_ad9522_regs.py + ${CMAKE_BINARY_DIR}/lib/ic_reg_maps/ad9522_regs.hpp +) diff --git a/host/lib/ic_reg_maps/common.py b/host/lib/ic_reg_maps/common.py new file mode 100644 index 000000000..e27c2816d --- /dev/null +++ b/host/lib/ic_reg_maps/common.py @@ -0,0 +1,147 @@ +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +import re +import sys +import math +from Cheetah.Template import Template + +COMMON_TMPL = """\ +#import time +/*********************************************************************** + * This file was generated by $file on $time.strftime("%c") + **********************************************************************/ + +\#ifndef INCLUDED_$(name.upper())_HPP +\#define INCLUDED_$(name.upper())_HPP + +\#include <uhd/config.hpp> +\#include <boost/cstdint.hpp> +\#include <stdexcept> +\#include <set> + +class $(name)_t{ +public: + #for $reg in $regs + #if $reg.get_enums() + enum $reg.get_type(){ + #for $i, $enum in enumerate($reg.get_enums()) + #set $end_comma = ',' if $i < len($reg.get_enums())-1 else '' + $(reg.get_name().upper())_$(enum[0].upper()) = $enum[1]$end_comma + #end for + }; + #end if + $reg.get_type() $reg.get_name(); + #end for + + $(name)_t(void){ + _state = NULL; + #for $reg in $regs + $reg.get_name() = $reg.get_default(); + #end for + } + + ~$(name)_t(void){ + delete _state; + } + +$body + + void save_state(void){ + if (_state == NULL) _state = new $(name)_t(); + #for $reg in $regs + _state->$reg.get_name() = this->$reg.get_name(); + #end for + } + + template<typename T> std::set<T> get_changed_addrs(void){ + if (_state == NULL) throw std::runtime_error("no saved state"); + //check each register for changes + std::set<T> addrs; + #for $reg in $regs + if(_state->$reg.get_name() != this->$reg.get_name()){ + addrs.insert($reg.get_addr()); + } + #end for + return addrs; + } + +private: + $(name)_t *_state; +}; + +\#endif /* INCLUDED_$(name.upper())_HPP */ +""" + +def parse_tmpl(_tmpl_text, **kwargs): + return str(Template(_tmpl_text, kwargs)) + +def to_num(arg): return eval(arg) + +class reg: + def __init__(self, reg_des): + try: self.parse(reg_des) + except Exception, e: + raise Exception, 'Error parsing register description: "%s"\nWhat: %s'%(reg_des, e) + + def parse(self, reg_des): + x = re.match('^(\w*)\s*(\w*)\[(.*)\]\s*(\w*)\s*(.*)$', reg_des) + name, addr, bit_range, default, enums = x.groups() + + #store variables + self._name = name + self._addr = to_num(addr) + if ':' in bit_range: self._addr_spec = sorted(map(int, bit_range.split(':'))) + else: self._addr_spec = int(bit_range), int(bit_range) + self._default = to_num(default) + + #extract enum + self._enums = list() + if enums: + enum_val = 0 + for enum_str in map(str.strip, enums.split(',')): + if '=' in enum_str: + enum_name, enum_val = enum_str.split('=') + enum_val = to_num(enum_val) + else: enum_name = enum_str + self._enums.append((enum_name, enum_val)) + enum_val += 1 + + def get_addr(self): return self._addr + def get_enums(self): return self._enums + def get_name(self): return self._name + def get_default(self): + for key, val in self.get_enums(): + if val == self._default: return str.upper('%s_%s'%(self.get_name(), key)) + return self._default + def get_type(self): + if self.get_enums(): return '%s_t'%self.get_name() + return 'boost::uint%d_t'%max(2**math.ceil(math.log(self.get_bit_width(), 2)), 8) + def get_shift(self): return self._addr_spec[0] + def get_mask(self): return hex(int('1'*self.get_bit_width(), 2)) + def get_bit_width(self): return self._addr_spec[1] - self._addr_spec[0] + 1 + +def generate(name, regs_tmpl, body_tmpl='', file=__file__): + regs = map(reg, parse_tmpl(regs_tmpl).splitlines()) + body = parse_tmpl(body_tmpl, regs=regs).replace('\n', '\n ').strip() + code = parse_tmpl(COMMON_TMPL, + name=name, + regs=regs, + body=body, + file=file, + ) + open(sys.argv[1], 'w').write(code) diff --git a/host/lib/ic_reg_maps/gen_ad5624_regs.py b/host/lib/ic_reg_maps/gen_ad5624_regs.py new file mode 100755 index 000000000..24401b878 --- /dev/null +++ b/host/lib/ic_reg_maps/gen_ad5624_regs.py @@ -0,0 +1,48 @@ +#!/usr/bin/env python +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +######################################################################## +# Template for raw text data describing registers +# name addr[bit range inclusive] default optional enums +######################################################################## +REGS_TMPL="""\ +data 0[4:15] 0 +addr 0[16:18] 0 DAC_A=0, DAC_B=1, DAC_C=2, DAC_D=3, ALL=7 +cmd 0[19:21] 0 wr_input_n, up_dac_n, wr_input_n_up_all, wr_up_dac_chan_n, power_down, reset, load_ldac +""" + +######################################################################## +# Template for methods in the body of the struct +######################################################################## +BODY_TMPL="""\ +boost::uint32_t get_reg(void){ + boost::uint32_t reg = 0; + #for $reg in filter(lambda r: r.get_addr() == 0, $regs) + reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); + #end for + return reg; +} +""" + +if __name__ == '__main__': + import common; common.generate( + name='ad5624_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/ic_reg_maps/gen_ad7922_regs.py b/host/lib/ic_reg_maps/gen_ad7922_regs.py new file mode 100755 index 000000000..5cec1924a --- /dev/null +++ b/host/lib/ic_reg_maps/gen_ad7922_regs.py @@ -0,0 +1,54 @@ +#!/usr/bin/env python +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +######################################################################## +# Template for raw text data describing registers +# name addr[bit range inclusive] default optional enums +######################################################################## +REGS_TMPL="""\ +result 0[0:11] 0 +mod 0[12] 0 +chn 0[13] 0 +""" + +######################################################################## +# Template for methods in the body of the struct +######################################################################## +BODY_TMPL="""\ +boost::uint16_t get_reg(void){ + boost::uint16_t reg = 0; + #for $reg in filter(lambda r: r.get_addr() == 0, $regs) + reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); + #end for + return reg; +} + +void set_reg(boost::uint16_t reg){ + #for $reg in filter(lambda r: r.get_addr() == 0, $regs) + $reg.get_name() = $(reg.get_type())((reg >> $reg.get_shift()) & $reg.get_mask()); + #end for +} +""" + +if __name__ == '__main__': + import common; common.generate( + name='ad7922_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/ic_reg_maps/gen_ad9510_regs.py b/host/lib/ic_reg_maps/gen_ad9510_regs.py new file mode 100755 index 000000000..83236c921 --- /dev/null +++ b/host/lib/ic_reg_maps/gen_ad9510_regs.py @@ -0,0 +1,139 @@ +#!/usr/bin/env python +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +######################################################################## +# Template for raw text data describing registers +# name addr[bit range inclusive] default optional enums +######################################################################## +REGS_TMPL="""\ +######################################################################## +## serial control port config +######################################################################## +long_instruction 0[4] 1 8bits, 16bits +soft_reset 0[5] 0 +lsb_first 0[6] 0 msb, lsb +sdo_inactive 0[7] 0 active, inactive +######################################################################## +## pll settings +######################################################################## +acounter 4[0:5] 0 +bcounter_msb 5[0:4] 0 +bcounter_lsb 6[0:7] 0 +lor_enable 7[2] 0 enb, dis +lor_ildd 7[5:6] 0 3cyc, 6cyc, 12cyc, 24cyc +charge_pump_mode 8[0:1] 0 3state, pump_up, pump_down, normal +pll_mux_control 8[2:5] 0 off, dld_high, ndiv, dld_low, rdiv, ald_nchan, acounter, prescaler, pfd_up, pfd_down, lor_high, 3state, ald_pchan, lor_lol_high, lor_lol_low, lor_low +pfd_polarity 8[6] 0 neg, pos +reset_all_counters 9[0] 0 +ncounter_reset 9[1] 0 +rcounter_reset 9[2] 0 +cp_current_setting 9[4:6] 0 0_60ma, 1_2ma, 1_8ma, 2_4ma, 3_0ma, 3_6ma, 4_2ma, 4_8ma +pll_power_down 0xA[0:1] 0 normal=0, async_pd=1, sync_pd=3 +prescaler_value 0xA[2:4] 0 div1, div2, 2_3, 4_5, 8_9, 16_17, 32_33, div3 +b_counter_bypass 0xA[6] 0 +ref_counter_msb 0xB[0:5] 0 +ref_counter_lsb 0xC[0:7] 0 +antibacklash_pw 0xD[0:1] 0 1_3ns, 2_9ns, 6_0ns +dld_window 0xD[5] 0 9_5ns, 3_5ns +lock_detect_disable 0xD[6] 0 enb, dis +######################################################################## +## fine delay adjust +######################################################################## +#for $i, $o in ((5, 0), (6, 4)) +delay_control_out$i $hex(0x34+$o)[0] 0 +ramp_current_out$i $hex(0x35+$o)[0:2] 0 200ua, 400ua, 600ua, 800ua, 1000ua, 1200ua, 1400ua, 1600ua +ramp_capacitor_out$i $hex(0x35+$o)[3:5] 0 4caps=0, 3caps=1, 2caps=3, 1cap=7 +delay_fine_adjust_out$i $hex(0x36+$o)[1:5] 0 +#end for +######################################################################## +## outputs +######################################################################## +#for $i, $o in ((0, 0), (1, 1), (2, 2), (3, 3)) +power_down_lvpecl_out$i $hex(0x3C+$o)[0:1] 0 normal, test, safe_pd, total_pd +output_level_lvpecl_out$i $hex(0x3C+$o)[2:3] 2 500mv, 340mv, 810mv, 660mv +#end for +#for $i, $o in ((4, 0), (5, 1), (6, 2), (7, 3)) +power_down_lvds_cmos_out$i $hex(0x40+$o)[0] 0 +output_level_lvds_out$i $hex(0x40+$o)[1:2] 1 1_75ma, 3_5ma, 5_25ma, 7ma +lvds_cmos_select_out$i $hex(0x40+$o)[3] 1 lvds, cmos +inverted_cmos_driver_out$i $hex(0x40+$o)[4] 0 dis, enb +#end for +clock_select 45[0] 1 clk2_drives, clk1_drives +clk1_power_down 45[1] 0 +clk2_power_down 45[2] 0 +prescaler_clock_pd 45[3] 0 +refin_power_down 45[4] 0 +all_clock_inputs_pd 45[5] 0 +######################################################################## +## dividers +######################################################################## +#for $i, $o in ((0, 0), (1, 2), (2, 4), (3, 6), (4, 8), (5, 10), (6, 12), (7, 14)) +divider_high_cycles_out$i $hex(0x48+$o)[0:3] 0 +divider_low_cycles_out$i $hex(0x48+$o)[4:7] 0 +phase_offset_out$i $hex(0x49+$o)[0:3] 0 +start_out$i $hex(0x49+$o)[4] 0 +force_out$i $hex(0x49+$o)[5] 0 +nosync_out$i $hex(0x49+$o)[6] 0 +bypass_divider_out$i $hex(0x49+$o)[7] 0 +#end for +######################################################################## +## function +######################################################################## +sync_detect_enable 58[0] 0 dis, enb +sync_select 58[1] 0 1_to_0_5, 0_5_to_1 +soft_sync 58[2] 0 +dist_power_down 58[3] 0 +sync_power_down 58[4] 0 +function_pin_select 58[5:6] 0 resetb, syncb, test, pdb +update_registers 0x5A[0] 0 +""" + +######################################################################## +# Template for methods in the body of the struct +######################################################################## +BODY_TMPL="""\ +boost::uint8_t get_reg(boost::uint16_t addr){ + boost::uint8_t reg = 0; + switch(addr){ + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); + #end for + break; + #end for + } + return reg; +} + +boost::uint32_t get_write_reg(boost::uint16_t addr){ + return (boost::uint32_t(addr) << 8) | get_reg(addr); +} + +boost::uint32_t get_read_reg(boost::uint16_t addr){ + return (boost::uint32_t(addr) << 8) | (1 << 23); +} +""" + +if __name__ == '__main__': + import common; common.generate( + name='ad9510_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/ic_reg_maps/gen_ad9522_regs.py b/host/lib/ic_reg_maps/gen_ad9522_regs.py new file mode 100755 index 000000000..9da51205b --- /dev/null +++ b/host/lib/ic_reg_maps/gen_ad9522_regs.py @@ -0,0 +1,183 @@ +#!/usr/bin/env python +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +######################################################################## +# Template for raw text data describing registers +# name addr[bit range inclusive] default optional enums +######################################################################## +REGS_TMPL="""\ +sdo_active 0x000[7] 0 sdio, sdo_sdio +lsb_first_addr_incr 0x000[6] 0 msb, lsb +soft_reset 0x000[5] 0 +mirror 0x000[3:0] 0 +readback_active_registers 0x004[0] 0 buffer, active +pfd_polarity 0x010[7] 0 pos, neg +cp_current 0x010[6:4] 7 0_6ma, 1_2ma, 1_8ma, 2_4ma, 3_0ma, 3_6ma, 4_2ma, 4_8ma +cp_mode 0x010[3:2] 3 high_imp, force_source, force_sink, normal +pll_power_down 0x010[1:0] 1 normal=0, async=1, sync=3 +r_counter_lsb 0x011[7:0] 1 +r_counter_msb 0x012[5:0] 0 +a_counter 0x013[5:0] 0 +b_counter_lsb 0x014[7:0] 3 +b_counter_msb 0x015[4:0] 0 +set_cp_pin_to_vcp_2 0x016[7] 0 normal, vcp_2 +reset_r_counter 0x016[6] 0 +reset_a_and_b_counters 0x016[5] 0 +reset_all_counters 0x016[4] 0 +b_counter_bypass 0x016[3] 0 normal, div1 +prescaler_p 0x016[2:0] 6 div1, div2, div2_3, div4_5, div8_9, div16_17, div32_33, div3 +status_pin_control 0x017[7:2] 0 +antibacklash_pulse_width 0x017[1:0] 0 2_9ns, 1_3ns, 6_0ns +enb_cmos_ref_input_dc_off 0x018[7] 0 +lock_detect_counter 0x018[6:5] 0 5cyc, 16cyc, 64cyc, 255cyc +digital_lock_detect_window 0x018[4] 0 high_range, low_range +disable_digital_lock_detect 0x018[3] 0 normal, disabled +vco_calibration_divider 0x018[2:1] 3 div2, div4, div8, div16 +vco_calibration_now 0x018[0] 0 +r_a_b_counters_sync_pin_rst 0x019[7:6] 0 nothing, async, sync +r_path_delay 0x019[5:3] 0 +n_path_delay 0x019[2:0] 0 +enable_status_pin_divider 0x01A[7] 0 +ref_freq_monitor_threshold 0x01A[6] 0 1_02mhz, 6khz +ld_pin_control 0x01A[5:0] 0 +enable_vco_freq_monitor 0x01B[7] 0 +enable_ref2_freq_monitor 0x01B[6] 0 +enable_ref1_freq_monitor 0x01B[5] 0 +refmon_pin_control 0x01B[4:0] 0 +disable_switchover_deglitch 0x01C[7] 0 +select_ref 0x01C[6] 0 ref1, ref2 +use_ref_sel_pin 0x01C[5] 0 register, ref_sel +enb_auto_ref_switchover 0x01C[4] 0 manual, auto +stay_on_ref2 0x01C[3] 0 return_ref1, stay_ref2 +enable_ref2 0x01C[2] 0 +enable_ref1 0x01C[1] 0 +enable_differential_ref 0x01C[0] 0 +enb_stat_eeprom_at_stat_pin 0x01D[7] 1 +enable_xtal_osc 0x01D[6] 0 +enable_clock_doubler 0x01D[5] 0 +disable_pll_status_reg 0x01D[4] 0 +enable_ld_pin_comparator 0x01D[3] 0 +enable_external_holdover 0x01D[1] 0 +enable_holdover 0x01D[0] 0 +external_zero_delay_fcds 0x01E[4:3] 0 +enable_external_zero_delay 0x01E[2] 0 +enable_zero_delay 0x01E[1] 0 +######################################################################## +#for $i in range(12) +#set $addr = ($i + 0x0F0) +out$(i)_format $(addr)[7] 0 lvds, cmos +out$(i)_cmos_configuration $(addr)[6:5] 3 off, a_on, b_on, ab_on +out$(i)_polarity $(addr)[4:3] 0 lvds_a_non_b_inv=0, lvds_a_inv_b_non=1, cmos_ab_non=0, cmos_ab_inv=1, cmos_a_non_b_inv=2, cmos_a_inv_b_non=3 +out$(i)_lvds_diff_voltage $(addr)[2:1] 1 1_75ma, 3_5ma, 5_25ma, 7_0ma +out$(i)_lvds_power_down $(addr)[0] 0 +#end for +######################################################################## +#for $i in reversed(range(8)) +csdld_en_out_$i 0x0FC[$i] 0 ignore, async +#end for +######################################################################## +#for $i in reversed(range(4)) +csdld_en_out_$(8 + $i) 0x0FD[$i] 0 ignore, async +#end for +######################################################################## +#set $default_val = 0x7 +#for $i in range(4) +#set $addr0 = hex($i*3 + 0x190) +#set $addr1 = hex($i*3 + 0x191) +#set $addr2 = hex($i*3 + 0x192) +divider$(i)_low_cycles $(addr0)[7:4] $default_val +divider$(i)_high_cycles $(addr0)[3:0] $default_val +divider$(i)_bypass $(addr1)[7] 0 +divider$(i)_ignore_sync $(addr1)[6] 0 +divider$(i)_force_high $(addr1)[5] 0 +divider$(i)_start_high $(addr1)[4] 0 +divider$(i)_phase_offset $(addr1)[3:0] 0 +channel$(i)_power_down $(addr2)[2] 0 +disable_divider$(i)_ddc $(addr2)[0] 0 +#set $default_val /= 2 +#end for +######################################################################## +vco_divider 0x1E0[2:0] 2 div2, div3, div4, div5, div6, static, div1 +power_down_clock_input_sel 0x1E1[4] 0 +power_down_vco_clock_ifc 0x1E1[3] 0 +power_down_vco_and_clock 0x1E1[2] 0 +select_vco_or_clock 0x1E1[1] 0 external, vco +bypass_vco_divider 0x1E1[0] 0 +disable_power_on_sync 0x230[3] 0 +power_down_sync 0x230[2] 0 +power_down_dist_ref 0x230[1] 0 +soft_sync 0x230[0] 0 +io_update 0x232[0] 0 +soft_eeprom 0xB02[1] 0 +enable_eeprom_write 0xB02[0] 0 +reg2eeprom 0xB03[0] 0 +""" + +######################################################################## +# Template for methods in the body of the struct +######################################################################## +BODY_TMPL="""\ +boost::uint8_t get_reg(boost::uint16_t addr){ + boost::uint8_t reg = 0; + switch(addr){ + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint8_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); + #end for + break; + #end for + } + if (addr == 0){ //mirror 4 bits in register 0 + reg |= ((reg >> 7) & 0x1) << 0; + reg |= ((reg >> 6) & 0x1) << 1; + reg |= ((reg >> 5) & 0x1) << 2; + reg |= ((reg >> 4) & 0x1) << 3; + } + return reg; +} + +void set_reg(boost::uint8_t addr, boost::uint32_t reg){ + switch(addr){ + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + $reg.get_name() = $(reg.get_type())((reg >> $reg.get_shift()) & $reg.get_mask()); + #end for + break; + #end for + } +} + +boost::uint32_t get_write_reg(boost::uint16_t addr){ + return (boost::uint32_t(addr) << 8) | get_reg(addr); +} + +boost::uint32_t get_read_reg(boost::uint16_t addr){ + return (boost::uint32_t(addr) << 8) | (1 << 23); +} + +""" + +if __name__ == '__main__': + import common; common.generate( + name='ad9522_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/ic_reg_maps/gen_ad9777_regs.py b/host/lib/ic_reg_maps/gen_ad9777_regs.py new file mode 100755 index 000000000..690b15e24 --- /dev/null +++ b/host/lib/ic_reg_maps/gen_ad9777_regs.py @@ -0,0 +1,118 @@ +#!/usr/bin/env python +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +######################################################################## +# Template for raw text data describing registers +# name addr[bit range inclusive] default optional enums +######################################################################## +REGS_TMPL="""\ +######################################################################## +## address 0 +######################################################################## +sdio_bidirectional 0[7] 0 input, io +lsb_msb_first 0[6] 0 msb, lsb +soft_reset 0[5] 0 +sleep_mode 0[4] 0 +power_down_mode 0[3] 0 +x_1r_2r_mode 0[2] 0 2r, 1r +pll_lock_indicator 0[1] 0 +######################################################################## +## address 1 +######################################################################## +filter_interp_rate 1[6:7] 0 1x, 2x, 4x, 8x +modulation_mode 1[4:5] 0 none, fs_2, fs_4, fs_8 +zero_stuff_mode 1[3] 0 +mix_mode 1[2] 1 complex, real +modulation_form 1[1] 0 e_minus_jwt, e_plus_jwt +data_clk_pll_lock_sel 1[0] 0 pll_lock, data_clk +######################################################################## +## address 2 +######################################################################## +signed_input_data 2[7] 0 signed, unsigned +two_port_mode 2[6] 0 two_port, one_port +dataclk_driver_strength 2[5] 0 weak, strong +dataclk_invert 2[4] 0 +oneportclk_invert 2[2] 0 +iqsel_invert 2[1] 0 +iq_first 2[0] 0 i_first, q_first +######################################################################## +## address 3 +######################################################################## +data_rate_clock_output 3[7] 0 pll_lock, spi_sdo +pll_divide_ratio 3[0:1] 0 div1, div2, div4, div8 +######################################################################## +## address 4 +######################################################################## +pll_state 4[7] 0 off, on +auto_cp_control 4[6] 0 auto, manual +pll_cp_control 4[0:2] 0 50ua=0, 100ua=1, 200ua=2, 400ua=3, 800ua=7 +######################################################################## +## address 5 and 9 +######################################################################## +idac_fine_gain_adjust 5[0:7] 0 +qdac_fine_gain_adjust 9[0:7] 0 +######################################################################## +## address 6 and A +######################################################################## +idac_coarse_gain_adjust 6[0:3] 0 +qdac_coarse_gain_adjust 0xA[0:3] 0 +######################################################################## +## address 7, 8 and B, C +######################################################################## +idac_offset_adjust_msb 7[0:7] 0 +idac_offset_adjust_lsb 8[0:1] 0 +idac_ioffset_direction 8[7] 0 out_a, out_b +qdac_offset_adjust_msb 0xB[0:7] 0 +qdac_offset_adjust_lsb 0xC[0:1] 0 +qdac_ioffset_direction 0xC[7] 0 out_a, out_b +""" + +######################################################################## +# Template for methods in the body of the struct +######################################################################## +BODY_TMPL="""\ +boost::uint8_t get_reg(boost::uint8_t addr){ + boost::uint8_t reg = 0; + switch(addr){ + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint8_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); + #end for + break; + #end for + } + return reg; +} + +boost::uint16_t get_write_reg(boost::uint8_t addr){ + return (boost::uint16_t(addr) << 8) | get_reg(addr); +} + +boost::uint16_t get_read_reg(boost::uint8_t addr){ + return (boost::uint16_t(addr) << 8) | (1 << 7); +} +""" + +if __name__ == '__main__': + import common; common.generate( + name='ad9777_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/ic_reg_maps/gen_ad9862_regs.py b/host/lib/ic_reg_maps/gen_ad9862_regs.py new file mode 100755 index 000000000..fdbea5828 --- /dev/null +++ b/host/lib/ic_reg_maps/gen_ad9862_regs.py @@ -0,0 +1,246 @@ +#!/usr/bin/env python +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +######################################################################## +# Template for raw text data describing registers +# name addr[bit range inclusive] default optional enums +######################################################################## +REGS_TMPL="""\ +######################################################################## +## General +######################################################################## +sdio_bidir 0[7] 0 sdio_sdo, sdio +lsb_first 0[6] 0 msb, lsb +soft_reset 0[5] 0 +######################################################################## +## Rx Power Down +######################################################################## +pd_vref_diff 1[7] 0 +pd_vref 1[6] 0 +pd_rx_digital 1[5] 0 +pd_rx_channel_b 1[4] 0 +pd_rx_channel_a 1[3] 0 +pd_buffer_b 1[2] 0 +pd_buffer_a 1[1] 0 +pd_all_rx 1[0] 0 +######################################################################## +## Rx A and B +######################################################################## +#for $x, $i in (('a', 2), ('b', 3)) +byp_buffer_$x $(i)[7] 0 +rx_pga_$x $(i)[0:4] 0 +#end for +######################################################################## +## Rx Misc +######################################################################## +hs_duty_cycle 4[2] 0 +shared_ref 4[1] 0 +clk_duty 4[0] 0 +######################################################################## +## RX I/F (INTERFACE) +######################################################################## +three_state 5[4] 0 +rx_retime 5[3] 0 clkout1, clkout2 +rx_twos_comp 5[2] 0 +inv_rxsync 5[1] 0 +mux_out 5[0] 0 rx_mux_mode=1, dual_port_mode=0 +######################################################################## +## RX Digital +######################################################################## +two_channel 6[3] 1 rx_b_dis, both_enb +rx_keep_ve 6[2] 0 pass_pos, pass_neg +rx_hilbert 6[1] 0 dis, enb +decimate 6[0] 0 dis, enb +######################################################################## +## TX Power Down +######################################################################## +alt_timing_mode 8[5] 0 +txoff_enable 8[4] 0 +tx_digital_pd 8[3] 0 +tx_analog_pd 8[0:2] 0 none=0, txb=4, txa=2, both=7 +######################################################################## +## Tx Offset and Gain +######################################################################## +#for $x, $i, $j, $k in (('a', 10, 11, 14), ('b', 12, 13, 15)) +dac_$(x)_offset_1_0 $(i)[6:7] 0 +dac_$(x)_offset_dir $(i)[0] 0 neg_diff, pos_dif +dac_$(x)_offset_9_2 $(j)[0:7] 0 +dac_$(x)_coarse_gain $(k)[6:7] 0 +dac_$(x)_fine_gain $(k)[0:5] 0 +#end for +tx_pga_gain 16[0:7] 0 +######################################################################## +## Tx Misc +######################################################################## +tx_slave_enable 17[1] 0 +tx_pga_mode 17[0] 0 normal, fast +######################################################################## +## Tx IF (INTERFACE) +######################################################################## +tx_retime 18[6] 1 clkout1=1, clkout2=0 +qi_order 18[5] 0 iq, qi +inv_txsync 18[4] 0 +tx_twos_comp 18[3] 0 +inverse_samp 18[2] 0 rise, fall +edges 18[1] 0 normal, both +interleaved 18[0] 0 single, interleaved +######################################################################## +## TX Digital +######################################################################## +two_data_paths 19[4] 0 single, both +tx_keep_ve 19[3] 0 pass_pos, pass_neg +tx_hilbert 19[2] 0 dis, enb +interp 19[0:1] 0 1, 2, 4 +######################################################################## +## TX Modulator +######################################################################## +neg_fine_tune 20[5] 0 pos_shift, neg_shift +fine_mode 20[4] 0 bypass, nco +real_mix_mode 20[3] 0 complex, real +neg_coarse_tune 20[2] 0 pos_shift, neg_shift +coarse_mod 20[0:1] 0 bypass, fdac_4, fdac_8 +######################################################################## +## NCO Tuning Word +######################################################################## +ftw_7_0 21[0:7] 0 +ftw_15_8 22[0:7] 0 +ftw_23_16 23[0:7] 0 +######################################################################## +## DLL +######################################################################## +input_clk_ctrl 24[6] 0 external, internal +adc_div2 24[5] 0 normal, div2 +dll_mult 24[3:4] 0 1, 2, 4 +dll_pd 24[2] 0 +dll_mode 24[0] 0 slow, fast +######################################################################## +## Clock Out +######################################################################## +clkout2_div_factor 25[6:7] 0 1, 2, 4, 8 +inv2 25[5] 0 normal, inverted +inv1 25[1] 0 normal, inverted +dis2 25[4] 0 enb, dis +dis1 25[0] 0 enb, dis +######################################################################## +## Aux ADC +######################################################################## +#for $x, $i in (('a2', 26), ('a1', 28), ('b2', 30), ('b1', 32)) +aux_adc_$(x)_1_0 $(i)[6:7] 0 +aux_adc_$(x)_9_2 $int(1+$i)[0:7] 0 +#end for +######################################################################## +## Aux ADC Control +######################################################################## +aux_spi 34[7] 0 dis, enb +sel_bnota 34[6] 0 adc_a, adc_b +#for $x, $i in (('b', 5), ('a', 2)) +refsel_$(x) 34[$i] 0 external, internal +select_$(x) 34[$int($i-1)] 0 aux_adc2, aux_adc1 +start_$(x) 34[$int($i-2)] 0 +#end for +######################################################################## +## Aux ADC Clock +######################################################################## +clk_4 35[0] 0 1_2, 1_4 +######################################################################## +## Aux DAC +######################################################################## +#for $x, $i in (('a', 36), ('b', 37), ('c', 38)) +aux_dac_$x $(i)[0:7] 0 +#end for +######################################################################## +## Aux DAC Update +######################################################################## +aux_dac_slave_enable 39[7] 0 +aux_dacupdate_c 39[2] 0 +aux_dacupdate_b 39[1] 0 +aux_dacupdate_a 39[0] 0 +######################################################################## +## AUX DAC Power Down +######################################################################## +aux_dac_pd_a 40[2] 0 +aux_dac_pd_b 40[1] 0 +aux_dac_pd_c 40[0] 0 +######################################################################## +## AUX DAC Control +######################################################################## +aux_dac_invert_a 41[2] 0 +aux_dac_invert_b 41[1] 0 +aux_dac_invert_c 41[0] 0 +######################################################################## +## Sig Delt +######################################################################## +sig_delt_3_0 42[4:7] 0 +sig_delt_11_4 43[0:7] 0 +######################################################################## +## ADC Low Power +######################################################################## +rx_low_power_mode_r49 49[0:7] 0 +rx_low_power_mode_r50 50[0:7] 0 +######################################################################## +## Chip ID +######################################################################## +chip_id 63[0:7] 0 +""" + +######################################################################## +# Header and Source templates below +######################################################################## +BODY_TMPL=""" +boost::uint8_t get_reg(boost::uint8_t addr){ + boost::uint8_t reg = 0; + switch(addr){ + #for $addr in range(0, 63+1) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint16_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); + #end for + break; + #end for + } + return reg; +} + +void set_reg(boost::uint8_t addr, boost::uint16_t reg){ + switch(addr){ + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + $reg.get_name() = $(reg.get_type())((reg >> $reg.get_shift()) & $reg.get_mask()); + #end for + break; + #end for + } +} + +boost::uint16_t get_write_reg(boost::uint8_t addr){ + return (boost::uint16_t(addr) << 8) | get_reg(addr); +} + +boost::uint16_t get_read_reg(boost::uint8_t addr){ + return (boost::uint16_t(addr) << 8) | (1 << 7); +} +""" + +if __name__ == '__main__': + import common; common.generate( + name='ad9862_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/ic_reg_maps/gen_adf4350_regs.py b/host/lib/ic_reg_maps/gen_adf4350_regs.py new file mode 100755 index 000000000..e97772843 --- /dev/null +++ b/host/lib/ic_reg_maps/gen_adf4350_regs.py @@ -0,0 +1,121 @@ +#!/usr/bin/env python +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +######################################################################## +# Template for raw text data describing registers +# name addr[bit range inclusive] default optional enums +######################################################################## +REGS_TMPL="""\ +######################################################################## +## address 0 +######################################################################## +frac_12_bit 0[3:14] 0 +int_16_bit 0[15:30] 0x23 +##reserved 0[31] 0 +######################################################################## +## address 1 +######################################################################## +mod_12_bit 1[3:14] 0xfff +phase_12_bit 1[15:26] 0 +prescaler 1[27] 0 4_5, 8_9 +##reserved 1[28:31] 0 +######################################################################## +## address 2 +######################################################################## +counter_reset 2[3] 0 disabled, enabled +cp_three_state 2[4] 0 disabled, enabled +power_down 2[5] 0 disabled, enabled +pd_polarity 2[6] 1 negative, positive +ldp 2[7] 0 10ns, 6ns +ldf 2[8] 0 frac_n, int_n +#set $current_setting_enums = ', '.join(map(lambda x: '_'.join(("%0.2fma"%(round(x*31.27 + 31.27)/100)).split('.')), range(0,16))) +charge_pump_current 2[9:12] 5 $current_setting_enums +double_buffer 2[13] 0 disabled, enabled +r_counter_10_bit 2[14:23] 0 +reference_divide_by_2 2[24] 1 disabled, enabled +reference_doubler 2[25] 0 disabled, enabled +muxout 2[26:28] 1 3state, dvdd, dgnd, rdiv, ndiv, analog_ld, dld, reserved +low_noise_and_spur 2[29:30] 3 low_noise, reserved0, reserved1, low_spur +######################################################################## +## address 3 +######################################################################## +clock_divider_12_bit 3[3:14] 0 +clock_div_mode 3[15:16] 0 clock_divider_off, fast_lock, resync_enable, reserved +##reserved 3[17] 0 +cycle_slip_reduction 3[18] 0 disabled, enabled +##reserved 3[19:20] 0 +##reserved 3[21:31] 0 +######################################################################## +## address 4 +######################################################################## +output_power 4[3:4] 3 m4dbm, m1dbm, 2dbm, 5dbm +rf_output_enable 4[5] 1 disabled, enabled +aux_output_power 4[6:7] 0 m4dbm, m1dbm, 2dbm, 5dbm +aux_output_enable 4[8] 0 disabled, enabled +aux_output_select 4[9] 1 divided, fundamental +mute_till_lock_detect 4[10] 0 mute_disabled, mute_enabled +vco_power_down 4[11] 0 vco_powered_up, vco_powered_down +band_select_clock_div 4[12:19] 0 +rf_divider_select 4[20:22] 0 div1, div2, div4, div8, div16 +feedback_select 4[23] 1 divided, fundamental +##reserved 4[24:31] 0 +######################################################################## +## address 5 +######################################################################## +##reserved 5[3:18] 0 +##reserved 5[19:20] 0 +##reserved 5[21] 0 +ld_pin_mode 5[22:23] 1 low0, dld, low, high +##reserved 5[24:31] 0 +""" + +######################################################################## +# Template for methods in the body of the struct +######################################################################## +BODY_TMPL="""\ +enum addr_t{ + ADDR_R0 = 0, + ADDR_R1 = 1, + ADDR_R2 = 2, + ADDR_R3 = 3, + ADDR_R4 = 4, + ADDR_R5 = 5 +}; + +boost::uint32_t get_reg(boost::uint8_t addr){ + boost::uint32_t reg = addr & 0x7; + switch(addr){ + #for $addr in range(5+1) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); + #end for + break; + #end for + } + return reg; +} +""" + +if __name__ == '__main__': + import common; common.generate( + name='adf4350_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/ic_reg_maps/gen_adf4360_regs.py b/host/lib/ic_reg_maps/gen_adf4360_regs.py new file mode 100755 index 000000000..3fd8707a7 --- /dev/null +++ b/host/lib/ic_reg_maps/gen_adf4360_regs.py @@ -0,0 +1,89 @@ +#!/usr/bin/env python +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +######################################################################## +# Template for raw text data describing registers +# name addr[bit range inclusive] default optional enums +######################################################################## +REGS_TMPL="""\ +######################################################################## +## address 0 +######################################################################## +core_power_level 0[2:3] 0 5ma, 10ma, 15ma, 20ma +counter_operation 0[4] 0 normal, reset +muxout_control 0[5:7] 0 3state, dld, ndiv, dvdd, rdiv, nchan_od_ld, sdo, dgnd +phase_detector_polarity 0[8] 0 neg, pos +charge_pump_output 0[9] 0 normal, 3state +cp_gain_0 0[10] 0 set1, set2 +mute_till_ld 0[11] 0 dis, enb +output_power_level 0[12:13] 0 3_5ma, 5_0ma, 7_5ma, 11_0ma +#set $current_setting_enums = ', '.join(map(lambda x: x+"ma", "0_31 0_62 0_93 1_25 1_56 1_87 2_18 2_50".split())) +current_setting1 0[14:16] 0 $current_setting_enums +current_setting2 0[17:19] 0 $current_setting_enums +power_down 0[20:21] 0 normal_op=0, async_pd=1, sync_pd=3 +prescaler_value 0[22:23] 0 8_9, 16_17, 32_33 +######################################################################## +## address 2 +######################################################################## +a_counter 2[2:6] 0 +b_counter 2[8:20] 0 +cp_gain_1 2[21] 0 set1, set2 +divide_by_2_output 2[22] 0 fund, div2 +divide_by_2_prescaler 2[23] 0 fund, div2 +######################################################################## +## address 1 +######################################################################## +r_counter 1[2:15] 0 +ablpw 1[16:17] 0 3_0ns, 1_3ns, 6_0ns +lock_detect_precision 1[18] 0 3cycles, 5cycles +test_mode_bit 1[19] 0 +band_select_clock_div 1[20:21] 0 1, 2, 4, 8 +""" + +######################################################################## +# Template for methods in the body of the struct +######################################################################## +BODY_TMPL="""\ +enum addr_t{ + ADDR_CONTROL = 0, + ADDR_NCOUNTER = 2, + ADDR_RCOUNTER = 1 +}; + +boost::uint32_t get_reg(addr_t addr){ + boost::uint32_t reg = addr & 0x3; + switch(addr){ + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); + #end for + break; + #end for + } + return reg; +} +""" + +if __name__ == '__main__': + import common; common.generate( + name='adf4360_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/ic_reg_maps/gen_max2829_regs.py b/host/lib/ic_reg_maps/gen_max2829_regs.py new file mode 100755 index 000000000..383131c18 --- /dev/null +++ b/host/lib/ic_reg_maps/gen_max2829_regs.py @@ -0,0 +1,133 @@ +#!/usr/bin/env python +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +######################################################################## +# Template for raw text data describing registers +# name addr[bit range inclusive] default optional enums +######################################################################## +REGS_TMPL="""\ +######################################################################## +## Note: offsets given from perspective of data bits (excludes address) +######################################################################## +## +######################################################################## +## Standby (2) +######################################################################## +_set_to_1_2_0 2[0] 1 +_set_to_1_2_1 2[1] 1 +_set_to_1_2_2 2[2] 1 +pa_bias_dac 2[10] 0 +voltage_ref 2[11] 0 +_set_to_1_2_12 2[12] 1 +mimo_select 2[13] 0 normal, mimo +######################################################################## +## Integer Divider Ratio (3) +######################################################################## +int_div_ratio_word 3[0:7] 0xa2 +frac_div_ratio_lsb 3[12:13] 0 +######################################################################## +## Fractional Divider Ratio (4) +######################################################################## +frac_div_ratio_msb 4[0:13] 0 +######################################################################## +## Band Select and PLL (5) +######################################################################## +band_select 5[0] 0 2_4ghz, 5ghz +ref_divider 5[1:3] 1 +pll_cp_select 5[5] 1 2ma, 4ma +band_select_802_11a 5[6] 0 4_9ghz_to_5_35ghz, 5_47ghz_to_5_875ghz +vco_bandswitch 5[7] 0 disable, automatic +vco_spi_bandswitch 5[8] 0 fsm, spi +vco_sub_band 5[9:10] 0 +_set_to_1_5_11 5[11] 1 +_set_to_1_5_12 5[12] 1 +band_sel_mimo 5[13] 0 normal, mimo +######################################################################## +## Calibration (6) +######################################################################## +rx_cal_mode 6[0] 0 dis, enb +tx_cal_mode 6[1] 0 dis, enb +_set_to_1_6_10 6[10] 1 +iq_cal_gain 6[11:12] 3 8db, 18db, 24db, 34db +######################################################################## +## Lowpass Filter (7) +######################################################################## +rx_lpf_fine_adj 7[0:2] 2 90, 95, 100, 105, 110 +rx_lpf_coarse_adj 7[3:4] 1 7_5mhz, 9_5mhz, 14mhz, 18mhz +tx_lpf_coarse_adj 7[5:6] 1 12mhz=1, 18mhz=2, 24mhz=3 +rssi_high_bw 7[11] 0 2mhz, 6mhz +######################################################################## +## Rx Control/RSSI (8) +######################################################################## +_set_to_1_8_0 8[0] 1 +rx_highpass 8[2] 1 100hz, 30khz +_set_to_1_8_5 8[5] 1 +rssi_pin_fcn 8[8] 0 rssi, temp +rssi_op_mode 8[10] 0 rssi_rxhp, enabled +rssi_output_range 8[11] 0 low, high +rx_vga_gain_spi 8[12] 0 io, spi +######################################################################## +## Tx Linearity/Baseband Gain (9) +######################################################################## +tx_baseband_gain 9[0:1] 0 0db, 2db, 3_5db, 5db +tx_upconv_linearity 9[2:3] 0 50, 63, 78, 100 +tx_vga_linearity 9[6:7] 0 50, 63, 78, 100 +pa_driver_linearity 9[8:9] 2 50, 63, 78, 100 +tx_vga_gain_spi 9[10] 0 io, spi +######################################################################## +## PA Bias DAC (10) +######################################################################## +pa_bias_dac_out_curr 10[0:5] 0 +pa_bias_dac_delay 10[6:9] 0xf +######################################################################## +## Rx Gain (11) +######################################################################## +rx_vga_gain 11[0:4] 0x1f +rx_lna_gain 11[5:6] 3 +######################################################################## +## Tx VGA Gain (12) +######################################################################## +tx_vga_gain 12[0:5] 0 +""" + +######################################################################## +# Template for methods in the body of the struct +######################################################################## +BODY_TMPL="""\ +boost::uint32_t get_reg(boost::uint8_t addr){ + boost::uint16_t reg = 0; + switch(addr){ + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint16_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); + #end for + break; + #end for + } + return (boost::uint32_t(reg) << 4) | (addr & 0xf); +} +""" + +if __name__ == '__main__': + import common; common.generate( + name='max2829_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/load_modules.cpp b/host/lib/load_modules.cpp new file mode 100644 index 000000000..d6bfe1369 --- /dev/null +++ b/host/lib/load_modules.cpp @@ -0,0 +1,146 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include <uhd/utils/static.hpp> +#include <boost/format.hpp> +#include <boost/foreach.hpp> +#include <boost/algorithm/string.hpp> +#include <boost/filesystem.hpp> +#include <boost/program_options.hpp> +#include <iostream> +#include <stdexcept> + +namespace po = boost::program_options; +namespace fs = boost::filesystem; + +/*********************************************************************** + * Module Load Function + **********************************************************************/ +#ifdef HAVE_DLFCN_H +#include <dlfcn.h> +static const std::string env_path_sep = ":"; + +static void load_module(const std::string &file_name){ + if (dlopen(file_name.c_str(), RTLD_LAZY) == NULL){ + throw std::runtime_error(str( + boost::format("dlopen failed to load \"%s\"") % file_name + )); + } +} + +#elif HAVE_WINDOWS_H +#include <windows.h> +static const std::string env_path_sep = ";"; + +static void load_module(const std::string &file_name){ + if (LoadLibrary(file_name.c_str()) == NULL){ + throw std::runtime_error(str( + boost::format("LoadLibrary failed to load \"%s\"") % file_name + )); + } +} + +#else +static const std::string env_path_sep = ":"; + +static void load_module(const std::string &file_name){ + throw std::runtime_error(str( + boost::format("Module loading not supported: Cannot load \"%s\"") % file_name + )); +} + +#endif + +/*********************************************************************** + * Load Modules + **********************************************************************/ +/*! + * Load all modules in a given path. + * This will recurse into sub-directories. + * Does not throw, prints to std error. + * \param path the filesystem path + */ +static void load_path(const fs::path &path){ + if (not fs::exists(path)){ + std::cerr << boost::format("Module path \"%s\" not found.") % path.file_string() << std::endl; + return; + } + + //try to load the files in this path + if (fs::is_directory(path)){ + for( + fs::directory_iterator dir_itr(path); + dir_itr != fs::directory_iterator(); + ++dir_itr + ){ + load_path(dir_itr->path()); + } + return; + } + + //its not a directory, try to load it + try{ + load_module(path.file_string()); + } + catch(const std::exception &err){ + std::cerr << boost::format("Error: %s") % err.what() << std::endl; + } +} + +//! The string constant for the module path environment variable +static const std::string MODULE_PATH_KEY = "UHD_MODULE_PATH"; + +/*! + * Name mapper function for the environment variable parser. + * Map environment variable names (that we use) to option names. + * \param the variable name + * \return the option name or blank string + */ +static std::string name_mapper(const std::string &var_name){ + if (var_name == MODULE_PATH_KEY) return var_name; + return ""; +} + +/*! + * Load all the modules given by the module path enviroment variable. + * The path variable may be several paths split by path separators. + */ +UHD_STATIC_BLOCK(load_modules){ + //register the options + std::string env_module_path; + po::options_description desc("UHD Module Options"); + desc.add_options() + (MODULE_PATH_KEY.c_str(), po::value<std::string>(&env_module_path)->default_value("")) + ; + + //parse environment variables + po::variables_map vm; + po::store(po::parse_environment(desc, &name_mapper), vm); + po::notify(vm); + + if (env_module_path == "") return; + //std::cout << "env_module_path: " << env_module_path << std::endl; + + //split the path at the path separators + std::vector<std::string> module_paths; + boost::split(module_paths, env_module_path, boost::is_any_of(env_path_sep)); + + //load modules in each path + BOOST_FOREACH(const std::string &module_path, module_paths){ + load_path(fs::system_complete(fs::path(module_path))); + } +} diff --git a/host/lib/transport/CMakeLists.txt b/host/lib/transport/CMakeLists.txt new file mode 100644 index 000000000..ed8c35225 --- /dev/null +++ b/host/lib/transport/CMakeLists.txt @@ -0,0 +1,53 @@ +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +#This file will be included by cmake, use absolute paths! + +######################################################################## +# Setup defines for interface address discovery +######################################################################## +MESSAGE(STATUS "Configuring interface address discovery...") + +INCLUDE(CheckIncludeFileCXX) +CHECK_INCLUDE_FILE_CXX(ifaddrs.h HAVE_IFADDRS_H) +CHECK_INCLUDE_FILE_CXX(winsock2.h HAVE_WINSOCK2_H) + +IF(HAVE_IFADDRS_H) + MESSAGE(STATUS " Interface address discovery supported through getifaddrs.") + ADD_DEFINITIONS(-DHAVE_IFADDRS_H) +ELSEIF(HAVE_WINSOCK2_H) + MESSAGE(STATUS " Interface address discovery supported through SIO_GET_INTERFACE_LIST.") + ADD_DEFINITIONS(-DHAVE_WINSOCK2_H) +ELSE(HAVE_IFADDRS_H) + MESSAGE(STATUS " Interface address discovery not supported.") +ENDIF(HAVE_IFADDRS_H) + +######################################################################## +# Append to the list of sources for lib uhd +######################################################################## +LIBUHD_PYTHON_GEN_SOURCE( + ${CMAKE_SOURCE_DIR}/lib/transport/gen_vrt.py + ${CMAKE_BINARY_DIR}/lib/transport/vrt.cpp +) + +LIBUHD_APPEND_SOURCES( + ${CMAKE_SOURCE_DIR}/lib/transport/convert_types.cpp + ${CMAKE_SOURCE_DIR}/lib/transport/if_addrs.cpp + ${CMAKE_SOURCE_DIR}/lib/transport/udp_simple.cpp + ${CMAKE_SOURCE_DIR}/lib/transport/udp_zero_copy_asio.cpp + ${CMAKE_SOURCE_DIR}/lib/transport/vrt_packet_handler.hpp +) diff --git a/host/lib/transport/convert_types.cpp b/host/lib/transport/convert_types.cpp new file mode 100644 index 000000000..510d39454 --- /dev/null +++ b/host/lib/transport/convert_types.cpp @@ -0,0 +1,151 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include <uhd/transport/convert_types.hpp> +#include <uhd/utils/assert.hpp> +#include <boost/asio.hpp> //endianness conversion +#include <boost/cstdint.hpp> +#include <complex> + +using namespace uhd; + +/*********************************************************************** + * Constants + **********************************************************************/ +typedef std::complex<float> fc32_t; + +static const float shorts_per_float = float(1 << 15); +static const float floats_per_short = float(1.0/shorts_per_float); + +#define unrolled_loop(__inst, __len){ \ + size_t __i = 0; \ + for(; __i < (__len & ~0x3); __i+= 4){ \ + __inst(__i+0); __inst(__i+1); \ + __inst(__i+2); __inst(__i+3); \ + } \ + for(; __i < __len; __i++){ \ + __inst(__i); \ + } \ +} + +// set a boolean flag that indicates the endianess +#ifdef HAVE_BIG_ENDIAN +static const bool is_big_endian = true; +#else +static const bool is_big_endian = false; +#endif + +static inline void host_floats_to_usrp2_items( + boost::uint32_t *usrp2_items, + const fc32_t *host_floats, + size_t num_samps +){ + #define host_floats_to_usrp2_items_i(i){ \ + boost::uint16_t real = boost::int16_t(host_floats[i].real()*shorts_per_float); \ + boost::uint16_t imag = boost::int16_t(host_floats[i].imag()*shorts_per_float); \ + usrp2_items[i] = htonl((real << 16) | (imag << 0)); \ + } + unrolled_loop(host_floats_to_usrp2_items_i, num_samps); +} + +static inline void usrp2_items_to_host_floats( + fc32_t *host_floats, + const boost::uint32_t *usrp2_items, + size_t num_samps +){ + #define usrp2_items_to_host_floats_i(i){ \ + boost::uint32_t item = ntohl(usrp2_items[i]); \ + boost::int16_t real = boost::uint16_t(item >> 16); \ + boost::int16_t imag = boost::uint16_t(item >> 0); \ + host_floats[i] = fc32_t(float(real*floats_per_short), float(imag*floats_per_short)); \ + } + unrolled_loop(usrp2_items_to_host_floats_i, num_samps); +} + +static inline void host_items_to_usrp2_items( + boost::uint32_t *usrp2_items, + const boost::uint32_t *host_items, + size_t num_samps +){ + #define host_items_to_usrp2_items_i(i) usrp2_items[i] = htonl(host_items[i]) + if (is_big_endian){ + std::memcpy(usrp2_items, host_items, num_samps*sizeof(boost::uint32_t)); + } + else{ + unrolled_loop(host_items_to_usrp2_items_i, num_samps); + } +} + +static inline void usrp2_items_to_host_items( + boost::uint32_t *host_items, + const boost::uint32_t *usrp2_items, + size_t num_samps +){ + #define usrp2_items_to_host_items_i(i) host_items[i] = ntohl(usrp2_items[i]) + if (is_big_endian){ + std::memcpy(host_items, usrp2_items, num_samps*sizeof(boost::uint32_t)); + } + else{ + unrolled_loop(usrp2_items_to_host_items_i, num_samps); + } +} + +void transport::convert_io_type_to_otw_type( + const void *io_buff, const io_type_t &io_type, + void *otw_buff, const otw_type_t &otw_type, + size_t num_samps +){ + //all we handle for now: + UHD_ASSERT_THROW(otw_type.width == 16 and otw_type.byteorder == otw_type_t::BO_BIG_ENDIAN); + + switch(io_type.tid){ + case io_type_t::COMPLEX_FLOAT32: + host_floats_to_usrp2_items((boost::uint32_t *)otw_buff, (const fc32_t*)io_buff, num_samps); + return; + case io_type_t::COMPLEX_INT16: + host_items_to_usrp2_items((boost::uint32_t *)otw_buff, (const boost::uint32_t*)io_buff, num_samps); + return; + case io_type_t::CUSTOM_TYPE: + std::memcpy(otw_buff, io_buff, num_samps*io_type.size); + return; + default: + throw std::runtime_error(str(boost::format("convert_types: cannot handle type \"%c\"") % io_type.tid)); + } +} + +void transport::convert_otw_type_to_io_type( + const void *otw_buff, const otw_type_t &otw_type, + void *io_buff, const io_type_t &io_type, + size_t num_samps +){ + //all we handle for now: + UHD_ASSERT_THROW(otw_type.width == 16 and otw_type.byteorder == otw_type_t::BO_BIG_ENDIAN); + + switch(io_type.tid){ + case io_type_t::COMPLEX_FLOAT32: + usrp2_items_to_host_floats((fc32_t*)io_buff, (const boost::uint32_t *)otw_buff, num_samps); + return; + case io_type_t::COMPLEX_INT16: + usrp2_items_to_host_items((boost::uint32_t*)io_buff, (const boost::uint32_t *)otw_buff, num_samps); + return; + case io_type_t::CUSTOM_TYPE: + std::memcpy(io_buff, otw_buff, num_samps*io_type.size); + return; + default: + throw std::runtime_error(str(boost::format("convert_types: cannot handle type \"%c\"") % io_type.tid)); + } +} diff --git a/host/lib/transport/gen_vrt.py b/host/lib/transport/gen_vrt.py new file mode 100755 index 000000000..9a57c83c3 --- /dev/null +++ b/host/lib/transport/gen_vrt.py @@ -0,0 +1,210 @@ +#!/usr/bin/env python +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +""" +The vrt packer/unpacker code generator: + +This script will generate the pack and unpack routines that convert +metatdata into vrt headers and vrt headers into metadata. + +The generated code infers jump tables to speed-up the parsing time. +""" + +TMPL_TEXT = """ +#import time + +######################################################################## +## setup predicates +######################################################################## +#set $sid_p = 0b00001 +#set $cid_p = 0b00010 +#set $tsi_p = 0b00100 +#set $tsf_p = 0b01000 +#set $tlr_p = 0b10000 + +/*********************************************************************** + * This file was generated by $file on $time.strftime("%c") + **********************************************************************/ + +\#include <uhd/transport/vrt.hpp> +\#include <boost/asio.hpp> //endianness conversion +\#include <stdexcept> + +using namespace uhd; +using namespace uhd::transport; + +void vrt::pack( + const tx_metadata_t &metadata, //input + boost::uint32_t *header_buff, //output + size_t &num_header_words32, //output + size_t num_payload_words32, //input + size_t &num_packet_words32, //output + size_t packet_count, //input + double tick_rate //input +){ + boost::uint32_t vrt_hdr_flags; + + boost::uint8_t pred = 0; + if (metadata.has_stream_id) pred |= $hex($sid_p); + if (metadata.has_time_spec) pred |= $hex($tsi_p | $tsf_p); + + switch(pred){ + #for $pred in range(2**5) + case $pred: + #set $num_header_words = 1 + #set $flags = 0 + ########## Stream ID ########## + #if $pred & $sid_p + header_buff[$num_header_words] = htonl(metadata.stream_id); + #set $num_header_words += 1 + #set $flags |= (0x1 << 28); + #end if + ########## Class ID ########## + #if $pred & $cid_p + header_buff[$num_header_words] = htonl(0); + #set $num_header_words += 1 + header_buff[$num_header_words] = htonl(0); + #set $num_header_words += 1 + #set $flags |= (0x1 << 27); + #end if + ########## Integer Time ########## + #if $pred & $tsi_p + header_buff[$num_header_words] = htonl(metadata.time_spec.secs); + #set $num_header_words += 1 + #set $flags |= (0x3 << 22); + #end if + ########## Fractional Time ########## + #if $pred & $tsf_p + header_buff[$num_header_words] = htonl(0); + #set $num_header_words += 1 + header_buff[$num_header_words] = htonl(metadata.time_spec.get_ticks(tick_rate)); + #set $num_header_words += 1 + #set $flags |= (0x1 << 20); + #end if + ########## Trailer ########## + #if $pred & $tlr_p + #set $flags |= (0x1 << 26); + #set $num_trailer_words = 1; + #else + #set $num_trailer_words = 0; + #end if + ########## Variables ########## + num_header_words32 = $num_header_words; + num_packet_words32 = $($num_header_words + $num_trailer_words) + num_payload_words32; + vrt_hdr_flags = $hex($flags); + break; + #end for + } + + //set the burst flags + if (metadata.start_of_burst) vrt_hdr_flags |= $hex(0x1 << 25); + if (metadata.end_of_burst) vrt_hdr_flags |= $hex(0x1 << 24); + + //fill in complete header word + header_buff[0] = htonl(vrt_hdr_flags | + ((packet_count & 0xf) << 16) | + (num_packet_words32 & 0xffff) + ); +} + +void vrt::unpack( + rx_metadata_t &metadata, //output + const boost::uint32_t *header_buff, //input + size_t &num_header_words32, //output + size_t &num_payload_words32, //output + size_t num_packet_words32, //input + size_t &packet_count, //output + double tick_rate //input +){ + //clear the metadata + metadata = rx_metadata_t(); + + //extract vrt header + boost::uint32_t vrt_hdr_word = ntohl(header_buff[0]); + size_t packet_words32 = vrt_hdr_word & 0xffff; + packet_count = (vrt_hdr_word >> 16) & 0xf; + + //failure cases + if (packet_words32 == 0 or num_packet_words32 < packet_words32) + throw std::runtime_error("bad vrt header or packet fragment"); + if (vrt_hdr_word & (0x7 << 29)) + throw std::runtime_error("unsupported vrt packet type"); + + boost::uint8_t pred = 0; + if(vrt_hdr_word & $hex(0x1 << 28)) pred |= $hex($sid_p); + if(vrt_hdr_word & $hex(0x1 << 27)) pred |= $hex($cid_p); + if(vrt_hdr_word & $hex(0x3 << 22)) pred |= $hex($tsi_p); + if(vrt_hdr_word & $hex(0x3 << 20)) pred |= $hex($tsf_p); + if(vrt_hdr_word & $hex(0x1 << 26)) pred |= $hex($tlr_p); + + switch(pred){ + #for $pred in range(2**5) + case $pred: + #set $set_has_time_spec = False + #set $num_header_words = 1 + ########## Stream ID ########## + #if $pred & $sid_p + metadata.has_stream_id = true; + metadata.stream_id = ntohl(header_buff[$num_header_words]); + #set $num_header_words += 1 + #end if + ########## Class ID ########## + #if $pred & $cid_p + #set $num_header_words += 1 + #set $num_header_words += 1 + #end if + ########## Integer Time ########## + #if $pred & $tsi_p + metadata.has_time_spec = true; + #set $set_has_time_spec = True + metadata.time_spec.secs = ntohl(header_buff[$num_header_words]); + #set $num_header_words += 1 + #end if + ########## Fractional Time ########## + #if $pred & $tsf_p + #if not $set_has_time_spec + metadata.has_time_spec = true; + #set $set_has_time_spec = True + #end if + #set $num_header_words += 1 + metadata.time_spec.set_ticks(ntohl(header_buff[$num_header_words]), tick_rate); + #set $num_header_words += 1 + #end if + ########## Trailer ########## + #if $pred & $tlr_p + #set $num_trailer_words = 1; + #else + #set $num_trailer_words = 0; + #end if + ########## Variables ########## + num_header_words32 = $num_header_words; + num_payload_words32 = packet_words32 - $($num_header_words + $num_trailer_words); + break; + #end for + } +} +""" + +import sys + +from Cheetah.Template import Template +def parse_tmpl(_tmpl_text, **kwargs): + return str(Template(_tmpl_text, kwargs)) + +if __name__ == '__main__': + open(sys.argv[1], 'w').write(parse_tmpl(TMPL_TEXT, file=__file__)) diff --git a/host/lib/transport/if_addrs.cpp b/host/lib/transport/if_addrs.cpp new file mode 100644 index 000000000..5c8c8a176 --- /dev/null +++ b/host/lib/transport/if_addrs.cpp @@ -0,0 +1,109 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include <uhd/transport/if_addrs.hpp> +#include <boost/asio/ip/address_v4.hpp> +#include <boost/cstdint.hpp> +#include <iostream> + +uhd::transport::if_addrs_t::if_addrs_t(void){ + /* NOP */ +} + +/*********************************************************************** + * Interface address discovery through ifaddrs api + **********************************************************************/ +#ifdef HAVE_IFADDRS_H +#include <ifaddrs.h> + +static boost::asio::ip::address_v4 sockaddr_to_ip_addr(sockaddr *addr){ + return boost::asio::ip::address_v4(ntohl( + reinterpret_cast<sockaddr_in*>(addr)->sin_addr.s_addr + )); +} + +std::vector<uhd::transport::if_addrs_t> uhd::transport::get_if_addrs(void){ + std::vector<if_addrs_t> if_addrs; + struct ifaddrs *ifap; + if (getifaddrs(&ifap) == 0){ + for (struct ifaddrs *iter = ifap; iter != NULL; iter = iter->ifa_next){ + //ensure that the entries are valid + if (iter->ifa_addr->sa_family != AF_INET) continue; + if (iter->ifa_netmask->sa_family != AF_INET) continue; + if (iter->ifa_broadaddr->sa_family != AF_INET) continue; + + //append a new set of interface addresses + if_addrs_t if_addr; + if_addr.inet = sockaddr_to_ip_addr(iter->ifa_addr).to_string(); + if_addr.mask = sockaddr_to_ip_addr(iter->ifa_netmask).to_string(); + if_addr.bcast = sockaddr_to_ip_addr(iter->ifa_broadaddr).to_string(); + if_addrs.push_back(if_addr); + } + freeifaddrs(ifap); + } + return if_addrs; +} + +/*********************************************************************** + * Interface address discovery through windows api (TODO) + **********************************************************************/ +#elif HAVE_WINSOCK2_H +#include <winsock2.h> + +std::vector<uhd::transport::if_addrs_t> uhd::transport::get_if_addrs(void){ + std::vector<if_addrs_t> if_addrs; + SOCKET sd = WSASocket(AF_INET, SOCK_DGRAM, 0, 0, 0, 0); + if (sd == SOCKET_ERROR) { + std::cerr << "Failed to get a socket. Error " << WSAGetLastError() << + std::endl; return if_addrs; + } + + INTERFACE_INFO InterfaceList[20]; + unsigned long nBytesReturned; + if (WSAIoctl(sd, SIO_GET_INTERFACE_LIST, 0, 0, &InterfaceList, + sizeof(InterfaceList), &nBytesReturned, 0, 0) == SOCKET_ERROR) { + std::cerr << "Failed calling WSAIoctl: error " << WSAGetLastError() << + std::endl; + return if_addrs; + } + + int nNumInterfaces = nBytesReturned / sizeof(INTERFACE_INFO); + for (int i = 0; i < nNumInterfaces; ++i) { + boost::uint32_t iiAddress = ntohl(reinterpret_cast<sockaddr_in&>(InterfaceList[i].iiAddress).sin_addr.s_addr); + boost::uint32_t iiNetmask = ntohl(reinterpret_cast<sockaddr_in&>(InterfaceList[i].iiNetmask).sin_addr.s_addr); + boost::uint32_t iiBroadcastAddress = (iiAddress & iiNetmask) | ~iiNetmask; + + if_addrs_t if_addr; + if_addr.inet = boost::asio::ip::address_v4(iiAddress).to_string(); + if_addr.mask = boost::asio::ip::address_v4(iiNetmask).to_string(); + if_addr.bcast = boost::asio::ip::address_v4(iiBroadcastAddress).to_string(); + if_addrs.push_back(if_addr); + } + + return if_addrs; +} + +/*********************************************************************** + * Interface address discovery not included + **********************************************************************/ +#else /* HAVE_IFADDRS_H */ + +std::vector<uhd::transport::if_addrs_t> uhd::transport::get_if_addrs(void){ + return std::vector<if_addrs_t>(); +} + +#endif /* HAVE_IFADDRS_H */ diff --git a/host/lib/transport/udp_simple.cpp b/host/lib/transport/udp_simple.cpp new file mode 100644 index 000000000..f339127ad --- /dev/null +++ b/host/lib/transport/udp_simple.cpp @@ -0,0 +1,159 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include <uhd/transport/udp_simple.hpp> +#include <boost/asio.hpp> +#include <boost/thread.hpp> +#include <boost/format.hpp> +#include <iostream> + +using namespace uhd::transport; + +/*********************************************************************** + * Helper Functions + **********************************************************************/ +/*! + * A receive timeout for a socket: + * + * It seems that asio cannot have timeouts with synchronous io. + * However, we can implement a polling loop that will timeout. + * This is okay bacause this is the slow-path implementation. + * + * \param socket the asio socket + */ +static void reasonable_recv_timeout( + boost::asio::ip::udp::socket &socket +){ + boost::asio::deadline_timer timer(socket.get_io_service()); + timer.expires_from_now(boost::posix_time::milliseconds(100)); + while (not (socket.available() or timer.expires_from_now().is_negative())){ + boost::this_thread::sleep(boost::posix_time::milliseconds(1)); + } +} + +/*********************************************************************** + * UDP connected implementation class + **********************************************************************/ +class udp_connected_impl : public udp_simple{ +public: + //structors + udp_connected_impl(const std::string &addr, const std::string &port); + ~udp_connected_impl(void); + + //send/recv + size_t send(const boost::asio::const_buffer &buff); + size_t recv(const boost::asio::mutable_buffer &buff); + +private: + boost::asio::ip::udp::socket *_socket; + boost::asio::io_service _io_service; +}; + +udp_connected_impl::udp_connected_impl(const std::string &addr, const std::string &port){ + //std::cout << boost::format("Creating udp transport for %s %s") % addr % port << std::endl; + + // resolve the address + boost::asio::ip::udp::resolver resolver(_io_service); + boost::asio::ip::udp::resolver::query query(boost::asio::ip::udp::v4(), addr, port); + boost::asio::ip::udp::endpoint receiver_endpoint = *resolver.resolve(query); + + // Create, open, and connect the socket + _socket = new boost::asio::ip::udp::socket(_io_service); + _socket->open(boost::asio::ip::udp::v4()); + _socket->connect(receiver_endpoint); +} + +udp_connected_impl::~udp_connected_impl(void){ + delete _socket; +} + +size_t udp_connected_impl::send(const boost::asio::const_buffer &buff){ + return _socket->send(boost::asio::buffer(buff)); +} + +size_t udp_connected_impl::recv(const boost::asio::mutable_buffer &buff){ + reasonable_recv_timeout(*_socket); + if (not _socket->available()) return 0; + return _socket->receive(boost::asio::buffer(buff)); +} + +/*********************************************************************** + * UDP broadcast implementation class + **********************************************************************/ +class udp_broadcast_impl : public udp_simple{ +public: + //structors + udp_broadcast_impl(const std::string &addr, const std::string &port); + ~udp_broadcast_impl(void); + + //send/recv + size_t send(const boost::asio::const_buffer &buff); + size_t recv(const boost::asio::mutable_buffer &buff); + +private: + boost::asio::ip::udp::socket *_socket; + boost::asio::ip::udp::endpoint _receiver_endpoint; + boost::asio::io_service _io_service; +}; + +udp_broadcast_impl::udp_broadcast_impl(const std::string &addr, const std::string &port){ + //std::cout << boost::format("Creating udp transport for %s %s") % addr % port << std::endl; + + // resolve the address + boost::asio::ip::udp::resolver resolver(_io_service); + boost::asio::ip::udp::resolver::query query(boost::asio::ip::udp::v4(), addr, port); + _receiver_endpoint = *resolver.resolve(query); + + // Create and open the socket + _socket = new boost::asio::ip::udp::socket(_io_service); + _socket->open(boost::asio::ip::udp::v4()); + + // Allow broadcasting + boost::asio::socket_base::broadcast option(true); + _socket->set_option(option); + +} + +udp_broadcast_impl::~udp_broadcast_impl(void){ + delete _socket; +} + +size_t udp_broadcast_impl::send(const boost::asio::const_buffer &buff){ + return _socket->send_to(boost::asio::buffer(buff), _receiver_endpoint); +} + +size_t udp_broadcast_impl::recv(const boost::asio::mutable_buffer &buff){ + reasonable_recv_timeout(*_socket); + if (not _socket->available()) return 0; + boost::asio::ip::udp::endpoint sender_endpoint; + return _socket->receive_from(boost::asio::buffer(buff), sender_endpoint); +} + +/*********************************************************************** + * UDP public make functions + **********************************************************************/ +udp_simple::sptr udp_simple::make_connected( + const std::string &addr, const std::string &port +){ + return sptr(new udp_connected_impl(addr, port)); +} + +udp_simple::sptr udp_simple::make_broadcast( + const std::string &addr, const std::string &port +){ + return sptr(new udp_broadcast_impl(addr, port)); +} diff --git a/host/lib/transport/udp_zero_copy_asio.cpp b/host/lib/transport/udp_zero_copy_asio.cpp new file mode 100644 index 000000000..56ba391d3 --- /dev/null +++ b/host/lib/transport/udp_zero_copy_asio.cpp @@ -0,0 +1,210 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include <uhd/transport/udp_zero_copy.hpp> +#include <uhd/utils/assert.hpp> +#include <boost/cstdint.hpp> +#include <boost/asio.hpp> +#include <boost/format.hpp> +#include <iostream> + +using namespace uhd::transport; + +/*********************************************************************** + * Managed receive buffer implementation for udp zero-copy asio: + **********************************************************************/ +class managed_recv_buffer_impl : public managed_recv_buffer{ +public: + managed_recv_buffer_impl(const boost::asio::const_buffer &buff) : _buff(buff){ + /* NOP */ + } + + ~managed_recv_buffer_impl(void){ + /* NOP */ + } + + void done(void){ + /* NOP */ + } + +private: + const boost::asio::const_buffer &get(void) const{ + return _buff; + } + + const boost::asio::const_buffer _buff; +}; + +/*********************************************************************** + * Managed send buffer implementation for udp zero-copy asio: + **********************************************************************/ +class managed_send_buffer_impl : public managed_send_buffer{ +public: + managed_send_buffer_impl( + const boost::asio::mutable_buffer &buff, + boost::asio::ip::udp::socket *socket + ) : _buff(buff), _socket(socket){ + /* NOP */ + } + + ~managed_send_buffer_impl(void){ + /* NOP */ + } + + void done(size_t num_bytes){ + _socket->send(boost::asio::buffer(_buff, num_bytes)); + } + +private: + const boost::asio::mutable_buffer &get(void) const{ + return _buff; + } + + const boost::asio::mutable_buffer _buff; + boost::asio::ip::udp::socket *_socket; +}; + +/*********************************************************************** + * Zero Copy UDP implementation with ASIO: + * This is the portable zero copy implementation for systems + * where a faster, platform specific solution is not available. + * However, it is not a true zero copy implementation as each + * send and recv requires a copy operation to/from userspace. + **********************************************************************/ +static const size_t max_buff_size = 2000; //assume max size on send and recv + +class udp_zero_copy_impl : public udp_zero_copy{ +public: + typedef boost::shared_ptr<udp_zero_copy_impl> sptr; + + //structors + udp_zero_copy_impl(const std::string &addr, const std::string &port); + ~udp_zero_copy_impl(void); + + //send/recv + managed_recv_buffer::sptr get_recv_buff(void); + managed_send_buffer::sptr get_send_buff(void); + + //manage buffer + template <typename Opt> size_t get_buff_size(void){ + Opt option; + _socket->get_option(option); + return option.value(); + } + + template <typename Opt> size_t resize_buff(size_t num_bytes){ + Opt option(num_bytes); + _socket->set_option(option); + return get_buff_size<Opt>(); + } + +private: + boost::asio::ip::udp::socket *_socket; + boost::asio::io_service _io_service; + + //send and recv buffer memory (allocated once) + boost::uint8_t _send_mem[max_buff_size], _recv_mem[max_buff_size]; + + managed_send_buffer::sptr _send_buff; +}; + +udp_zero_copy_impl::udp_zero_copy_impl(const std::string &addr, const std::string &port){ + //std::cout << boost::format("Creating udp transport for %s %s") % addr % port << std::endl; + + // resolve the address + boost::asio::ip::udp::resolver resolver(_io_service); + boost::asio::ip::udp::resolver::query query(boost::asio::ip::udp::v4(), addr, port); + boost::asio::ip::udp::endpoint receiver_endpoint = *resolver.resolve(query); + + // create, open, and connect the socket + _socket = new boost::asio::ip::udp::socket(_io_service); + _socket->open(boost::asio::ip::udp::v4()); + _socket->connect(receiver_endpoint); + + // create the managed send buff (just once) + _send_buff = managed_send_buffer::sptr(new managed_send_buffer_impl( + boost::asio::buffer(_send_mem, max_buff_size), _socket + )); + + // set recv timeout + timeval tv; + tv.tv_sec = 0; + tv.tv_usec = 100*1000; //100 ms + UHD_ASSERT_THROW(setsockopt( + _socket->native(), + SOL_SOCKET, SO_RCVTIMEO, + (const char *)&tv, sizeof(timeval) + ) == 0); +} + +udp_zero_copy_impl::~udp_zero_copy_impl(void){ + delete _socket; +} + +managed_recv_buffer::sptr udp_zero_copy_impl::get_recv_buff(void){ + //call recv() with timeout option + size_t num_bytes = _socket->receive(boost::asio::buffer(_recv_mem, max_buff_size)); + + //create a new managed buffer to house the data + return managed_recv_buffer::sptr( + new managed_recv_buffer_impl(boost::asio::buffer(_recv_mem, num_bytes)) + ); +} + +managed_send_buffer::sptr udp_zero_copy_impl::get_send_buff(void){ + return _send_buff; +} + +/*********************************************************************** + * UDP zero copy make function + **********************************************************************/ +template<typename Opt> static inline void resize_buff_helper( + udp_zero_copy_impl::sptr udp_trans, + size_t target_size, + const std::string &name +){ + static const size_t min_buff_size = size_t(100e3); + + //resize the buffer if size was provided + if (target_size > 0){ + size_t actual_size = udp_trans->resize_buff<Opt>(target_size); + if (target_size != actual_size) std::cout << boost::format( + "Target %s buffer size: %d\n" + "Actual %s byffer size: %d" + ) % name % target_size % name % actual_size << std::endl; + } + + //otherwise, ensure that the buffer is at least the minimum size + else if (udp_trans->get_buff_size<Opt>() < min_buff_size){ + resize_buff_helper<Opt>(udp_trans, min_buff_size, name); + } +} + +udp_zero_copy::sptr udp_zero_copy::make( + const std::string &addr, + const std::string &port, + size_t recv_buff_size, + size_t send_buff_size +){ + udp_zero_copy_impl::sptr udp_trans(new udp_zero_copy_impl(addr, port)); + + //call the helper to resize send and recv buffers + resize_buff_helper<boost::asio::socket_base::receive_buffer_size>(udp_trans, recv_buff_size, "recv"); + resize_buff_helper<boost::asio::socket_base::send_buffer_size> (udp_trans, send_buff_size, "send"); + + return udp_trans; +} diff --git a/host/lib/transport/vrt_packet_handler.hpp b/host/lib/transport/vrt_packet_handler.hpp new file mode 100644 index 000000000..5b73c82bf --- /dev/null +++ b/host/lib/transport/vrt_packet_handler.hpp @@ -0,0 +1,363 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#ifndef INCLUDED_LIBUHD_TRANSPORT_VRT_PACKET_HANDLER_HPP +#define INCLUDED_LIBUHD_TRANSPORT_VRT_PACKET_HANDLER_HPP + +#include <uhd/config.hpp> +#include <uhd/device.hpp> +#include <uhd/types/io_type.hpp> +#include <uhd/types/otw_type.hpp> +#include <uhd/types/metadata.hpp> +#include <uhd/transport/vrt.hpp> +#include <uhd/transport/convert_types.hpp> +#include <uhd/transport/zero_copy.hpp> +#include <boost/asio/buffer.hpp> +#include <boost/function.hpp> +#include <stdexcept> +#include <iostream> + +namespace vrt_packet_handler{ + +/*********************************************************************** + * vrt packet handler for recv + **********************************************************************/ + struct recv_state{ + //init the expected seq number + size_t next_packet_seq; + + //state variables to handle fragments + uhd::transport::managed_recv_buffer::sptr managed_buff; + boost::asio::const_buffer copy_buff; + size_t fragment_offset_in_samps; + + recv_state(void){ + //first expected seq is zero + next_packet_seq = 0; + + //initially empty copy buffer + copy_buff = boost::asio::buffer("", 0); + } + }; + + typedef boost::function<void(uhd::transport::managed_recv_buffer::sptr)> recv_cb_t; + + static UHD_INLINE void recv_cb_nop(uhd::transport::managed_recv_buffer::sptr){ + /* NOP */ + } + + /******************************************************************* + * Unpack a received vrt header and set the copy buffer. + * - helper function for vrt_packet_handler::_recv1 + ******************************************************************/ + static UHD_INLINE void _recv1_helper( + recv_state &state, + uhd::rx_metadata_t &metadata, + double tick_rate, + size_t vrt_header_offset_words32 + ){ + size_t num_packet_words32 = state.managed_buff->size()/sizeof(boost::uint32_t); + if (num_packet_words32 <= vrt_header_offset_words32){ + state.copy_buff = boost::asio::buffer("", 0); + return; //must exit here after setting the buffer + } + const boost::uint32_t *vrt_hdr = state.managed_buff->cast<const boost::uint32_t *>() + vrt_header_offset_words32; + size_t num_header_words32_out, num_payload_words32_out, packet_count_out; + uhd::transport::vrt::unpack( + metadata, //output + vrt_hdr, //input + num_header_words32_out, //output + num_payload_words32_out, //output + num_packet_words32, //input + packet_count_out, //output + tick_rate + ); + + //handle the packet count / sequence number + if (packet_count_out != state.next_packet_seq){ + std::cerr << "S" << (packet_count_out - state.next_packet_seq)%16; + } + state.next_packet_seq = (packet_count_out+1)%16; + + //setup the buffer to point to the data + state.copy_buff = boost::asio::buffer( + vrt_hdr + num_header_words32_out, + num_payload_words32_out*sizeof(boost::uint32_t) + ); + } + + /******************************************************************* + * Recv data, unpack a vrt header, and copy-convert the data. + * - helper function for vrt_packet_handler::recv + ******************************************************************/ + static UHD_INLINE size_t _recv1( + recv_state &state, + void *recv_mem, + size_t total_samps, + uhd::rx_metadata_t &metadata, + const uhd::io_type_t &io_type, + const uhd::otw_type_t &otw_type, + double tick_rate, + uhd::transport::zero_copy_if::sptr zc_iface, + //use these two params to handle a layer above vrt + size_t vrt_header_offset_words32, + const recv_cb_t& recv_cb + ){ + //perform a receive if no rx data is waiting to be copied + if (boost::asio::buffer_size(state.copy_buff) == 0){ + state.fragment_offset_in_samps = 0; + state.managed_buff = zc_iface->get_recv_buff(); + recv_cb(state.managed_buff); //callback before vrt unpack + _recv1_helper( + state, metadata, tick_rate, vrt_header_offset_words32 + ); + } + + //extract the number of samples available to copy + size_t bytes_per_item = otw_type.get_sample_size(); + size_t bytes_available = boost::asio::buffer_size(state.copy_buff); + size_t num_samps = std::min(total_samps, bytes_available/bytes_per_item); + + //setup the fragment flags and offset + metadata.more_fragments = total_samps < num_samps; + metadata.fragment_offset = state.fragment_offset_in_samps; + state.fragment_offset_in_samps += num_samps; //set for next call + + //copy-convert the samples from the recv buffer + uhd::transport::convert_otw_type_to_io_type( + boost::asio::buffer_cast<const void*>(state.copy_buff), otw_type, + recv_mem, io_type, num_samps + ); + + //update the rx copy buffer to reflect the bytes copied + size_t bytes_copied = num_samps*bytes_per_item; + state.copy_buff = boost::asio::buffer( + boost::asio::buffer_cast<const boost::uint8_t*>(state.copy_buff) + bytes_copied, + bytes_available - bytes_copied + ); + + return num_samps; + } + + /******************************************************************* + * Recv vrt packets and copy convert the samples into the buffer. + ******************************************************************/ + static UHD_INLINE size_t recv( + recv_state &state, + const boost::asio::mutable_buffer &buff, + uhd::rx_metadata_t &metadata, + uhd::device::recv_mode_t recv_mode, + const uhd::io_type_t &io_type, + const uhd::otw_type_t &otw_type, + double tick_rate, + uhd::transport::zero_copy_if::sptr zc_iface, + //use these two params to handle a layer above vrt + size_t vrt_header_offset_words32 = 0, + const recv_cb_t& recv_cb = &recv_cb_nop + ){ + metadata = uhd::rx_metadata_t(); //init the metadata + const size_t total_num_samps = boost::asio::buffer_size(buff)/io_type.size; + + switch(recv_mode){ + + //////////////////////////////////////////////////////////////// + case uhd::device::RECV_MODE_ONE_PACKET:{ + //////////////////////////////////////////////////////////////// + return _recv1( + state, + boost::asio::buffer_cast<void *>(buff), + total_num_samps, + metadata, + io_type, otw_type, + tick_rate, + zc_iface, + vrt_header_offset_words32, + recv_cb + ); + } + + //////////////////////////////////////////////////////////////// + case uhd::device::RECV_MODE_FULL_BUFF:{ + //////////////////////////////////////////////////////////////// + size_t num_samps = 0; + uhd::rx_metadata_t tmp_md; + while(num_samps < total_num_samps){ + num_samps += _recv1( + state, + boost::asio::buffer_cast<boost::uint8_t *>(buff) + (num_samps*io_type.size), + total_num_samps - num_samps, + (num_samps == 0)? metadata : tmp_md, //only the first metadata gets kept + io_type, otw_type, + tick_rate, + zc_iface, + vrt_header_offset_words32, + recv_cb + ); + } + return total_num_samps; + } + + default: throw std::runtime_error("unknown recv mode"); + }//switch(recv_mode) + } + +/*********************************************************************** + * vrt packet handler for send + **********************************************************************/ + struct send_state{ + //init the expected seq number + size_t next_packet_seq; + + send_state(void){ + next_packet_seq = 0; + } + }; + + typedef boost::function<void(uhd::transport::managed_send_buffer::sptr)> send_cb_t; + + static UHD_INLINE void send_cb_nop(uhd::transport::managed_send_buffer::sptr){ + /* NOP */ + } + + /******************************************************************* + * Pack a vrt header, copy-convert the data, and send it. + * - helper function for vrt_packet_handler::send + ******************************************************************/ + static UHD_INLINE void _send1( + send_state &state, + const void *send_mem, + size_t num_samps, + const uhd::tx_metadata_t &metadata, + const uhd::io_type_t &io_type, + const uhd::otw_type_t &otw_type, + double tick_rate, + uhd::transport::zero_copy_if::sptr zc_iface, + size_t vrt_header_offset_words32, + const send_cb_t& send_cb + ){ + //get a new managed send buffer + uhd::transport::managed_send_buffer::sptr send_buff = zc_iface->get_send_buff(); + boost::uint32_t *tx_mem = send_buff->cast<boost::uint32_t *>() + vrt_header_offset_words32; + + size_t num_header_words32, num_packet_words32; + size_t packet_count = state.next_packet_seq++; + + //pack metadata into a vrt header + uhd::transport::vrt::pack( + metadata, //input + tx_mem, //output + num_header_words32, //output + num_samps, //input + num_packet_words32, //output + packet_count, //input + tick_rate + ); + + //copy-convert the samples into the send buffer + uhd::transport::convert_io_type_to_otw_type( + send_mem, io_type, + tx_mem + num_header_words32, otw_type, + num_samps + ); + + send_cb(send_buff); //callback after memory filled + + //commit the samples to the zero-copy interface + send_buff->done(num_packet_words32*sizeof(boost::uint32_t)); + } + + /******************************************************************* + * Send vrt packets and copy convert the samples into the buffer. + ******************************************************************/ + static UHD_INLINE size_t send( + send_state &state, + const boost::asio::const_buffer &buff, + const uhd::tx_metadata_t &metadata, + uhd::device::send_mode_t send_mode, + const uhd::io_type_t &io_type, + const uhd::otw_type_t &otw_type, + double tick_rate, + uhd::transport::zero_copy_if::sptr zc_iface, + size_t max_samples_per_packet, + //use these two params to handle a layer above vrt + size_t vrt_header_offset_words32 = 0, + const send_cb_t& send_cb = &send_cb_nop + ){ + const size_t total_num_samps = boost::asio::buffer_size(buff)/io_type.size; + switch(send_mode){ + + //////////////////////////////////////////////////////////////// + case uhd::device::SEND_MODE_ONE_PACKET:{ + //////////////////////////////////////////////////////////////// + size_t num_samps = std::min(total_num_samps, max_samples_per_packet); + _send1( + state, + boost::asio::buffer_cast<const void *>(buff), + num_samps, + metadata, + io_type, otw_type, + tick_rate, + zc_iface, + vrt_header_offset_words32, + send_cb + ); + return num_samps; + } + + //////////////////////////////////////////////////////////////// + case uhd::device::SEND_MODE_FULL_BUFF:{ + //////////////////////////////////////////////////////////////// + //calculate constants for fragmentation + const size_t final_packet_samps = total_num_samps%max_samples_per_packet; + const size_t num_fragments = (total_num_samps+max_samples_per_packet-1)/max_samples_per_packet; + static const size_t first_fragment_index = 0; + const size_t final_fragment_index = num_fragments-1; + + //make a rw copy of the metadata to re-flag below + uhd::tx_metadata_t md(metadata); + + //loop through the following fragment indexes + for (size_t n = first_fragment_index; n <= final_fragment_index; n++){ + + //calculate new flags for the fragments + md.has_time_spec = md.has_time_spec and (n == first_fragment_index); + md.start_of_burst = md.start_of_burst and (n == first_fragment_index); + md.end_of_burst = md.end_of_burst and (n == final_fragment_index); + + //send the fragment with the helper function + _send1( + state, + boost::asio::buffer_cast<const boost::uint8_t *>(buff) + (n*max_samples_per_packet*io_type.size), + (n == final_fragment_index)?final_packet_samps:max_samples_per_packet, + md, + io_type, otw_type, + tick_rate, + zc_iface, + vrt_header_offset_words32, + send_cb + ); + } + return total_num_samps; + } + + default: throw std::runtime_error("unknown send mode"); + }//switch(send_mode) + } + +} //namespace vrt_packet_handler + +#endif /* INCLUDED_LIBUHD_TRANSPORT_VRT_PACKET_HANDLER_HPP */ diff --git a/host/lib/types.cpp b/host/lib/types.cpp new file mode 100644 index 000000000..daf3be7f7 --- /dev/null +++ b/host/lib/types.cpp @@ -0,0 +1,307 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include <uhd/utils/assert.hpp> +#include <uhd/types/ranges.hpp> +#include <uhd/types/tune_result.hpp> +#include <uhd/types/clock_config.hpp> +#include <uhd/types/stream_cmd.hpp> +#include <uhd/types/metadata.hpp> +#include <uhd/types/time_spec.hpp> +#include <uhd/types/device_addr.hpp> +#include <uhd/types/mac_addr.hpp> +#include <uhd/types/otw_type.hpp> +#include <uhd/types/io_type.hpp> +#include <uhd/types/serial.hpp> +#include <boost/algorithm/string.hpp> +#include <boost/math/special_functions/round.hpp> +#include <boost/foreach.hpp> +#include <boost/format.hpp> +#include <boost/cstdint.hpp> +#include <boost/assign/list_of.hpp> +#include <boost/thread.hpp> +#include <stdexcept> +#include <complex> + +using namespace uhd; + +/*********************************************************************** + * ranges + **********************************************************************/ +gain_range_t::gain_range_t(float min, float max, float step): + min(min), + max(max), + step(step) +{ + /* NOP */ +} + +freq_range_t::freq_range_t(double min, double max): + min(min), + max(max) +{ + /* NOP */ +} + +/*********************************************************************** + * tune result + **********************************************************************/ +tune_result_t::tune_result_t(void): + target_inter_freq(0.0), + actual_inter_freq(0.0), + target_dsp_freq(0.0), + actual_dsp_freq(0.0), + spectrum_inverted(false) +{ + /* NOP */ +} + +/*********************************************************************** + * clock config + **********************************************************************/ +clock_config_t::clock_config_t(void): + ref_source(REF_INT), + pps_source(PPS_INT), + pps_polarity(PPS_NEG) +{ + /* NOP */ +} + +/*********************************************************************** + * stream command + **********************************************************************/ +stream_cmd_t::stream_cmd_t(const stream_mode_t &stream_mode): + stream_mode(stream_mode), + num_samps(0), + stream_now(true) +{ + /* NOP */ +} + +/*********************************************************************** + * metadata + **********************************************************************/ +rx_metadata_t::rx_metadata_t(void): + has_stream_id(false), + stream_id(0), + has_time_spec(false), + time_spec(time_spec_t()), + more_fragments(false), + fragment_offset(0) +{ + /* NOP */ +} + +tx_metadata_t::tx_metadata_t(void): + has_stream_id(false), + stream_id(0), + has_time_spec(false), + time_spec(time_spec_t()), + start_of_burst(false), + end_of_burst(false) +{ + /* NOP */ +} + +/*********************************************************************** + * time spec + **********************************************************************/ +time_spec_t::time_spec_t(boost::uint32_t secs, double nsecs): + secs(secs), + nsecs(nsecs) +{ + /* NOP */ +} + +boost::uint32_t time_spec_t::get_ticks(double tick_rate) const{ + return boost::math::iround(nsecs*tick_rate*1e-9); +} + +void time_spec_t::set_ticks(boost::uint32_t ticks, double tick_rate){ + nsecs = double(ticks)*1e9/tick_rate; +} + +/*********************************************************************** + * device addr + **********************************************************************/ +static const std::string arg_delim = ","; +static const std::string pair_delim = "="; + +static std::string trim(const std::string &in){ + return boost::algorithm::trim_copy(in); +} + +device_addr_t::device_addr_t(const std::string &args){ + //split the args at the semi-colons + std::vector<std::string> pairs; + boost::split(pairs, args, boost::is_any_of(arg_delim)); + BOOST_FOREACH(const std::string &pair, pairs){ + if (trim(pair) == "") continue; + + //split the key value pairs at the equals + std::vector<std::string> key_val; + boost::split(key_val, pair, boost::is_any_of(pair_delim)); + if (key_val.size() != 2) throw std::runtime_error("invalid args string: "+args); + (*this)[trim(key_val[0])] = trim(key_val[1]); + } +} + +std::string device_addr_t::to_pp_string(void) const{ + if (this->size() == 0) return "Empty Device Address"; + + std::stringstream ss; + BOOST_FOREACH(std::string key, this->keys()){ + ss << boost::format("%s: %s") % key % (*this)[key] << std::endl; + } + return ss.str(); +} + +std::string device_addr_t::to_string(void) const{ + std::string args_str; + BOOST_FOREACH(const std::string &key, this->keys()){ + args_str += key + pair_delim + (*this)[key] + arg_delim; + } + return args_str; +} + +/*********************************************************************** + * mac addr + **********************************************************************/ +mac_addr_t::mac_addr_t(const byte_vector_t &bytes) : _bytes(bytes){ + UHD_ASSERT_THROW(_bytes.size() == 6); +} + +mac_addr_t mac_addr_t::from_bytes(const byte_vector_t &bytes){ + return mac_addr_t(bytes); +} + +mac_addr_t mac_addr_t::from_string(const std::string &mac_addr_str){ + + byte_vector_t bytes = boost::assign::list_of + (0x00)(0x50)(0xC2)(0x85)(0x30)(0x00); // Matt's IAB + + try{ + //only allow patterns of xx:xx or xx:xx:xx:xx:xx:xx + //the IAB above will fill in for the shorter pattern + if (mac_addr_str.size() != 5 and mac_addr_str.size() != 17) + throw std::runtime_error("expected exactly 5 or 17 characters"); + + //split the mac addr hex string at the colons + std::vector<std::string> hex_strs; + boost::split(hex_strs, mac_addr_str, boost::is_any_of(":")); + for (size_t i = 0; i < hex_strs.size(); i++){ + int hex_num; + std::istringstream iss(hex_strs[i]); + iss >> std::hex >> hex_num; + bytes[i] = boost::uint8_t(hex_num); + } + + } + catch(std::exception const& e){ + throw std::runtime_error(str( + boost::format("Invalid mac address: %s\n\t%s") % mac_addr_str % e.what() + )); + } + + return mac_addr_t::from_bytes(bytes); +} + +byte_vector_t mac_addr_t::to_bytes(void) const{ + return _bytes; +} + +std::string mac_addr_t::to_string(void) const{ + std::string addr = ""; + BOOST_FOREACH(boost::uint8_t byte, this->to_bytes()){ + addr += str(boost::format("%s%02x") % ((addr == "")?"":":") % int(byte)); + } + return addr; +} + +/*********************************************************************** + * otw type + **********************************************************************/ +size_t otw_type_t::get_sample_size(void) const{ + return (this->width * 2) / 8; +} + +otw_type_t::otw_type_t(void): + width(0), + shift(0), + byteorder(BO_NATIVE) +{ + /* NOP */ +} + +/*********************************************************************** + * io type + **********************************************************************/ +static size_t tid_to_size(io_type_t::tid_t tid){ + switch(tid){ + case io_type_t::COMPLEX_FLOAT32: return sizeof(std::complex<float>); + case io_type_t::COMPLEX_INT16: return sizeof(std::complex<boost::int16_t>); + case io_type_t::COMPLEX_INT8: return sizeof(std::complex<boost::int8_t>); + default: throw std::runtime_error("unknown io type tid"); + } +} + +io_type_t::io_type_t(tid_t tid) +: size(tid_to_size(tid)), tid(tid){ + /* NOP */ +} + +io_type_t::io_type_t(size_t size) +: size(size), tid(CUSTOM_TYPE){ + /* NOP */ +} + +/*********************************************************************** + * serial + **********************************************************************/ +spi_config_t::spi_config_t(edge_t edge): + mosi_edge(edge), + miso_edge(edge) +{ + /* NOP */ +} + +void i2c_iface::write_eeprom( + boost::uint8_t addr, + boost::uint8_t offset, + const byte_vector_t &bytes +){ + for (size_t i = 0; i < bytes.size(); i++){ + //write a byte at a time, its easy that way + byte_vector_t cmd = boost::assign::list_of(offset+i)(bytes[i]); + this->write_i2c(addr, cmd); + boost::this_thread::sleep(boost::posix_time::milliseconds(10)); //worst case write + } +} + +byte_vector_t i2c_iface::read_eeprom( + boost::uint8_t addr, + boost::uint8_t offset, + size_t num_bytes +){ + byte_vector_t bytes; + for (size_t i = 0; i < num_bytes; i++){ + //do a zero byte write to start read cycle + this->write_i2c(addr, byte_vector_t(1, offset+i)); + bytes.push_back(this->read_i2c(addr, 1).at(0)); + } + return bytes; +} diff --git a/host/lib/usrp/CMakeLists.txt b/host/lib/usrp/CMakeLists.txt new file mode 100644 index 000000000..39a72ab37 --- /dev/null +++ b/host/lib/usrp/CMakeLists.txt @@ -0,0 +1,27 @@ +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +#This file will be included by cmake, use absolute paths! + +LIBUHD_APPEND_SOURCES( + ${CMAKE_SOURCE_DIR}/lib/usrp/dboard_base.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/dboard_eeprom.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/dboard_id.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/dboard_manager.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/simple_usrp.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/tune_helper.cpp +) diff --git a/host/lib/usrp/dboard/CMakeLists.txt b/host/lib/usrp/dboard/CMakeLists.txt new file mode 100644 index 000000000..3a6c2d84a --- /dev/null +++ b/host/lib/usrp/dboard/CMakeLists.txt @@ -0,0 +1,26 @@ +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +#This file will be included by cmake, use absolute paths! + +LIBUHD_APPEND_SOURCES( + ${CMAKE_SOURCE_DIR}/lib/usrp/dboard/db_basic_and_lf.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/dboard/db_rfx.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/dboard/db_xcvr2450.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/dboard/db_wbx.cpp +) + diff --git a/host/lib/usrp/dboard/db_basic_and_lf.cpp b/host/lib/usrp/dboard/db_basic_and_lf.cpp new file mode 100644 index 000000000..23ac98872 --- /dev/null +++ b/host/lib/usrp/dboard/db_basic_and_lf.cpp @@ -0,0 +1,284 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include <uhd/usrp/subdev_props.hpp> +#include <uhd/types/ranges.hpp> +#include <uhd/utils/assert.hpp> +#include <uhd/utils/static.hpp> +#include <uhd/usrp/dboard_base.hpp> +#include <uhd/usrp/dboard_manager.hpp> +#include <boost/assign/list_of.hpp> +#include <boost/format.hpp> + +using namespace uhd; +using namespace uhd::usrp; +using namespace boost::assign; + +/*********************************************************************** + * The basic and lf boards: + * They share a common class because only the frequency bounds differ. + **********************************************************************/ +class basic_rx : public rx_dboard_base{ +public: + basic_rx(ctor_args_t args, double max_freq); + ~basic_rx(void); + + void rx_get(const wax::obj &key, wax::obj &val); + void rx_set(const wax::obj &key, const wax::obj &val); + +private: + double _max_freq; +}; + +class basic_tx : public tx_dboard_base{ +public: + basic_tx(ctor_args_t args, double max_freq); + ~basic_tx(void); + + void tx_get(const wax::obj &key, wax::obj &val); + void tx_set(const wax::obj &key, const wax::obj &val); + +private: + double _max_freq; +}; + +/*********************************************************************** + * Register the basic and LF dboards + **********************************************************************/ +static dboard_base::sptr make_basic_rx(dboard_base::ctor_args_t args){ + return dboard_base::sptr(new basic_rx(args, 90e9)); +} + +static dboard_base::sptr make_basic_tx(dboard_base::ctor_args_t args){ + return dboard_base::sptr(new basic_tx(args, 90e9)); +} + +static dboard_base::sptr make_lf_rx(dboard_base::ctor_args_t args){ + return dboard_base::sptr(new basic_rx(args, 32e6)); +} + +static dboard_base::sptr make_lf_tx(dboard_base::ctor_args_t args){ + return dboard_base::sptr(new basic_tx(args, 32e6)); +} + +UHD_STATIC_BLOCK(reg_basic_and_lf_dboards){ + dboard_manager::register_dboard(0x0000, &make_basic_tx, "Basic TX"); + dboard_manager::register_dboard(0x0001, &make_basic_rx, "Basic RX", list_of("AB")("A")("B")); + dboard_manager::register_dboard(0x000e, &make_lf_tx, "LF TX"); + dboard_manager::register_dboard(0x000f, &make_lf_rx, "LF RX", list_of("AB")("A")("B")); +} + +/*********************************************************************** + * Basic and LF RX dboard + **********************************************************************/ +basic_rx::basic_rx(ctor_args_t args, double max_freq) : rx_dboard_base(args){ + _max_freq = max_freq; +} + +basic_rx::~basic_rx(void){ + /* NOP */ +} + +void basic_rx::rx_get(const wax::obj &key_, wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<subdev_prop_t>()){ + case SUBDEV_PROP_NAME: + val = std::string(str(boost::format("%s - %s") + % get_rx_id().to_pp_string() + % get_subdev_name() + )); + return; + + case SUBDEV_PROP_OTHERS: + val = prop_names_t(); //empty + return; + + case SUBDEV_PROP_GAIN: + val = float(0); + return; + + case SUBDEV_PROP_GAIN_RANGE: + val = gain_range_t(0, 0, 0); + return; + + case SUBDEV_PROP_GAIN_NAMES: + val = prop_names_t(); //empty + return; + + case SUBDEV_PROP_FREQ: + val = double(0); + return; + + case SUBDEV_PROP_FREQ_RANGE: + val = freq_range_t(+_max_freq, -_max_freq); + return; + + case SUBDEV_PROP_ANTENNA: + val = std::string(""); + return; + + case SUBDEV_PROP_ANTENNA_NAMES: + val = prop_names_t(1, ""); //vector of 1 empty string + return; + + case SUBDEV_PROP_QUADRATURE: + val = (get_subdev_name() == "AB"); //only quadrature in ab mode + return; + + case SUBDEV_PROP_IQ_SWAPPED: + val = false; + return; + + case SUBDEV_PROP_SPECTRUM_INVERTED: + val = false; + return; + + case SUBDEV_PROP_USE_LO_OFFSET: + val = false; + return; + + case SUBDEV_PROP_LO_LOCKED: + val = true; //there is no LO, so it must be true! + return; + + default: UHD_THROW_PROP_GET_ERROR(); + } +} + +void basic_rx::rx_set(const wax::obj &key_, const wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<subdev_prop_t>()){ + + case SUBDEV_PROP_GAIN: + UHD_ASSERT_THROW(val.as<float>() == float(0)); + return; + + case SUBDEV_PROP_ANTENNA: + UHD_ASSERT_THROW(val.as<std::string>() == std::string("")); + return; + + case SUBDEV_PROP_FREQ: + return; // it wont do you much good, but you can set it + + default: UHD_THROW_PROP_SET_ERROR(); + } +} + +/*********************************************************************** + * Basic and LF TX dboard + **********************************************************************/ +basic_tx::basic_tx(ctor_args_t args, double max_freq) : tx_dboard_base(args){ + _max_freq = max_freq; +} + +basic_tx::~basic_tx(void){ + /* NOP */ +} + +void basic_tx::tx_get(const wax::obj &key_, wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<subdev_prop_t>()){ + case SUBDEV_PROP_NAME: + val = get_tx_id().to_pp_string(); + return; + + case SUBDEV_PROP_OTHERS: + val = prop_names_t(); //empty + return; + + case SUBDEV_PROP_GAIN: + val = float(0); + return; + + case SUBDEV_PROP_GAIN_RANGE: + val = gain_range_t(0, 0, 0); + return; + + case SUBDEV_PROP_GAIN_NAMES: + val = prop_names_t(); //empty + return; + + case SUBDEV_PROP_FREQ: + val = double(0); + return; + + case SUBDEV_PROP_FREQ_RANGE: + val = freq_range_t(+_max_freq, -_max_freq); + return; + + case SUBDEV_PROP_ANTENNA: + val = std::string(""); + return; + + case SUBDEV_PROP_ANTENNA_NAMES: + val = prop_names_t(1, ""); //vector of 1 empty string + return; + + case SUBDEV_PROP_QUADRATURE: + val = true; + return; + + case SUBDEV_PROP_IQ_SWAPPED: + val = false; + return; + + case SUBDEV_PROP_SPECTRUM_INVERTED: + val = false; + return; + + case SUBDEV_PROP_USE_LO_OFFSET: + val = false; + return; + + case SUBDEV_PROP_LO_LOCKED: + val = true; //there is no LO, so it must be true! + return; + + default: UHD_THROW_PROP_GET_ERROR(); + } +} + +void basic_tx::tx_set(const wax::obj &key_, const wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<subdev_prop_t>()){ + + case SUBDEV_PROP_GAIN: + UHD_ASSERT_THROW(val.as<float>() == float(0)); + return; + + case SUBDEV_PROP_ANTENNA: + UHD_ASSERT_THROW(val.as<std::string>() == std::string("")); + return; + + case SUBDEV_PROP_FREQ: + return; // it wont do you much good, but you can set it + + default: UHD_THROW_PROP_SET_ERROR(); + } +} diff --git a/host/lib/usrp/dboard/db_rfx.cpp b/host/lib/usrp/dboard/db_rfx.cpp new file mode 100644 index 000000000..bbc9716b1 --- /dev/null +++ b/host/lib/usrp/dboard/db_rfx.cpp @@ -0,0 +1,532 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +static const bool rfx_debug = false; + +// IO Pin functions +#define POWER_IO (1 << 7) // Low enables power supply +#define ANTSW_IO (1 << 6) // On TX DB, 0 = TX, 1 = RX, on RX DB 0 = main ant, 1 = RX2 +#define MIXER_IO (1 << 5) // Enable appropriate mixer +#define LOCKDET_MASK (1 << 2) // Input pin + +// Mixer constants +#define MIXER_ENB MIXER_IO +#define MIXER_DIS 0 + +// Power constants +#define POWER_UP 0 +#define POWER_DOWN POWER_IO + +// Antenna constants +#define ANT_TX 0 //the tx line is transmitting +#define ANT_RX ANTSW_IO //the tx line is receiving +#define ANT_TXRX 0 //the rx line is on txrx +#define ANT_RX2 ANTSW_IO //the rx line in on rx2 +#define ANT_XX 0 //dont care how the antenna is set + +#include "adf4360_regs.hpp" +#include <uhd/types/dict.hpp> +#include <uhd/usrp/subdev_props.hpp> +#include <uhd/types/ranges.hpp> +#include <uhd/utils/assert.hpp> +#include <uhd/utils/static.hpp> +#include <uhd/utils/algorithm.hpp> +#include <uhd/usrp/dboard_base.hpp> +#include <uhd/usrp/dboard_manager.hpp> +#include <boost/assign/list_of.hpp> +#include <boost/format.hpp> +#include <boost/math/special_functions/round.hpp> + +using namespace uhd; +using namespace uhd::usrp; +using namespace boost::assign; + +/*********************************************************************** + * The RFX series of dboards + **********************************************************************/ +static const float _max_rx_pga0_gain = 45; + +class rfx_xcvr : public xcvr_dboard_base{ +public: + rfx_xcvr( + ctor_args_t args, + const freq_range_t &freq_range, + bool rx_div2, bool tx_div2 + ); + ~rfx_xcvr(void); + + void rx_get(const wax::obj &key, wax::obj &val); + void rx_set(const wax::obj &key, const wax::obj &val); + + void tx_get(const wax::obj &key, wax::obj &val); + void tx_set(const wax::obj &key, const wax::obj &val); + +private: + freq_range_t _freq_range; + uhd::dict<dboard_iface::unit_t, bool> _div2; + double _rx_lo_freq, _tx_lo_freq; + std::string _rx_ant; + float _rx_pga0_gain; + + void set_rx_lo_freq(double freq); + void set_tx_lo_freq(double freq); + void set_rx_ant(const std::string &ant); + void set_rx_pga0_gain(float gain); + + /*! + * Set the LO frequency for the particular dboard unit. + * \param unit which unit rx or tx + * \param target_freq the desired frequency in Hz + * \return the actual frequency in Hz + */ + double set_lo_freq(dboard_iface::unit_t unit, double target_freq); + + /*! + * Get the lock detect status of the LO. + * \param unit which unit rx or tx + * \return true for locked + */ + bool get_locked(dboard_iface::unit_t unit){ + return (this->get_iface()->read_gpio(unit) & LOCKDET_MASK) != 0; + } +}; + +/*********************************************************************** + * Register the RFX dboards (min freq, max freq, rx div2, tx div2) + **********************************************************************/ +static dboard_base::sptr make_rfx_flex400(dboard_base::ctor_args_t args){ + return dboard_base::sptr(new rfx_xcvr(args, freq_range_t(400e6, 500e6), false, true)); +} + +static dboard_base::sptr make_rfx_flex900(dboard_base::ctor_args_t args){ + return dboard_base::sptr(new rfx_xcvr(args, freq_range_t(750e6, 1050e6), true, true)); +} + +static dboard_base::sptr make_rfx_flex1800(dboard_base::ctor_args_t args){ + return dboard_base::sptr(new rfx_xcvr(args, freq_range_t(1500e6, 2100e6), false, false)); +} + +static dboard_base::sptr make_rfx_flex1200(dboard_base::ctor_args_t args){ + return dboard_base::sptr(new rfx_xcvr(args, freq_range_t(1150e6, 1450e6), true, true)); +} + +static dboard_base::sptr make_rfx_flex2400(dboard_base::ctor_args_t args){ + return dboard_base::sptr(new rfx_xcvr(args, freq_range_t(2300e6, 2900e6), false, false)); +} + +UHD_STATIC_BLOCK(reg_rfx_dboards){ + dboard_manager::register_dboard(0x0024, &make_rfx_flex400, "Flex 400 Rx MIMO B"); + dboard_manager::register_dboard(0x0028, &make_rfx_flex400, "Flex 400 Tx MIMO B"); + + dboard_manager::register_dboard(0x0025, &make_rfx_flex900, "Flex 900 Rx MIMO B"); + dboard_manager::register_dboard(0x0029, &make_rfx_flex900, "Flex 900 Tx MIMO B"); + + dboard_manager::register_dboard(0x0034, &make_rfx_flex1800, "Flex 1800 Rx MIMO B"); + dboard_manager::register_dboard(0x0035, &make_rfx_flex1800, "Flex 1800 Tx MIMO B"); + + dboard_manager::register_dboard(0x0026, &make_rfx_flex1200, "Flex 1200 Rx MIMO B"); + dboard_manager::register_dboard(0x002a, &make_rfx_flex1200, "Flex 1200 Tx MIMO B"); + + dboard_manager::register_dboard(0x0027, &make_rfx_flex2400, "Flex 2400 Rx MIMO B"); + dboard_manager::register_dboard(0x002b, &make_rfx_flex2400, "Flex 2400 Tx MIMO B"); +} + +/*********************************************************************** + * Structors + **********************************************************************/ +rfx_xcvr::rfx_xcvr( + ctor_args_t args, + const freq_range_t &freq_range, + bool rx_div2, bool tx_div2 +) : xcvr_dboard_base(args){ + _freq_range = freq_range; + _div2[dboard_iface::UNIT_RX] = rx_div2; + _div2[dboard_iface::UNIT_TX] = tx_div2; + + //enable the clocks that we need + this->get_iface()->set_clock_enabled(dboard_iface::UNIT_TX, true); + this->get_iface()->set_clock_enabled(dboard_iface::UNIT_RX, true); + + //set the gpio directions + boost::uint16_t output_enables = POWER_IO | ANTSW_IO | MIXER_IO; + this->get_iface()->set_gpio_ddr(dboard_iface::UNIT_TX, output_enables); + this->get_iface()->set_gpio_ddr(dboard_iface::UNIT_RX, output_enables); + + //setup the tx atr (this does not change with antenna) + this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_IDLE, POWER_UP | ANT_XX | MIXER_DIS); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_RX_ONLY, POWER_UP | ANT_RX | MIXER_DIS); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY, POWER_UP | ANT_TX | MIXER_ENB); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, POWER_UP | ANT_TX | MIXER_ENB); + + //setup the rx atr (this does not change with antenna) + this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE, POWER_UP | ANT_XX | MIXER_DIS); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY, POWER_UP | ANT_XX | MIXER_DIS); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, POWER_UP | ANT_RX2| MIXER_ENB); + + //set some default values + set_rx_lo_freq((_freq_range.min + _freq_range.max)/2.0); + set_tx_lo_freq((_freq_range.min + _freq_range.max)/2.0); + set_rx_ant("RX2"); + set_rx_pga0_gain(0); +} + +rfx_xcvr::~rfx_xcvr(void){ + /* NOP */ +} + +/*********************************************************************** + * Helper Methods + **********************************************************************/ +void rfx_xcvr::set_rx_lo_freq(double freq){ + _rx_lo_freq = set_lo_freq(dboard_iface::UNIT_RX, freq); +} + +void rfx_xcvr::set_tx_lo_freq(double freq){ + _tx_lo_freq = set_lo_freq(dboard_iface::UNIT_TX, freq); +} + +void rfx_xcvr::set_rx_ant(const std::string &ant){ + //validate input + UHD_ASSERT_THROW(ant == "TX/RX" or ant == "RX2"); + + //set the rx atr regs that change with antenna setting + this->get_iface()->set_atr_reg( + dboard_iface::UNIT_RX, dboard_iface::ATR_REG_RX_ONLY, + POWER_UP | MIXER_ENB | ((ant == "TX/RX")? ANT_TXRX : ANT_RX2) + ); + + //shadow the setting + _rx_ant = ant; +} + +void rfx_xcvr::set_rx_pga0_gain(float gain){ + //clip the input + gain = std::clip<float>(gain, 0, _max_rx_pga0_gain); + + //voltage level constants + static const float max_volts = float(.2), min_volts = float(1.2); + static const float slope = (max_volts-min_volts)/_max_rx_pga0_gain; + + //calculate the voltage for the aux dac + float dac_volts = gain*slope + min_volts; + + //write the new voltage to the aux dac + this->get_iface()->write_aux_dac(dboard_iface::UNIT_RX, 1, dac_volts); + + //shadow the setting (does not account for precision loss) + _rx_pga0_gain = gain; +} + +double rfx_xcvr::set_lo_freq( + dboard_iface::unit_t unit, + double target_freq +){ + if (rfx_debug) std::cerr << boost::format( + "RFX tune: target frequency %f Mhz" + ) % (target_freq/1e6) << std::endl; + + //clip the input + target_freq = std::clip(target_freq, _freq_range.min, _freq_range.max); + if (_div2[unit]) target_freq *= 2; + + //map prescalers to the register enums + static const uhd::dict<int, adf4360_regs_t::prescaler_value_t> prescaler_to_enum = map_list_of + (8, adf4360_regs_t::PRESCALER_VALUE_8_9) + (16, adf4360_regs_t::PRESCALER_VALUE_16_17) + (32, adf4360_regs_t::PRESCALER_VALUE_32_33) + ; + + //map band select clock dividers to enums + static const uhd::dict<int, adf4360_regs_t::band_select_clock_div_t> bandsel_to_enum = map_list_of + (1, adf4360_regs_t::BAND_SELECT_CLOCK_DIV_1) + (2, adf4360_regs_t::BAND_SELECT_CLOCK_DIV_2) + (4, adf4360_regs_t::BAND_SELECT_CLOCK_DIV_4) + (8, adf4360_regs_t::BAND_SELECT_CLOCK_DIV_8) + ; + + double actual_freq, ref_freq = this->get_iface()->get_clock_rate(unit); + int R, BS, P, B, A; + + /* + * The goal here to to loop though possible R dividers, + * band select clock dividers, and prescaler values. + * Calculate the A and B counters for each set of values. + * The loop exists when it meets all of the constraints. + * The resulting loop values are loaded into the registers. + * + * fvco = [P*B + A] * fref/R + * fvco*R/fref = P*B + A = N + */ + for(R = 2; R <= 32; R+=2){ + BOOST_FOREACH(BS, bandsel_to_enum.keys()){ + if (ref_freq/R/BS > 1e6) continue; //constraint on band select clock + BOOST_FOREACH(P, prescaler_to_enum.keys()){ + //calculate B and A from N + double N = target_freq*R/ref_freq; + B = int(std::floor(N/P)); + A = boost::math::iround(N - P*B); + if (B < A or B > 8191 or B < 3 or A > 31) continue; //constraints on A, B + //calculate the actual frequency + actual_freq = double(P*B + A)*ref_freq/R; + if (actual_freq/P > 300e6) continue; //constraint on prescaler output + //constraints met: exit loop + goto done_loop; + } + } + } done_loop: + + if (rfx_debug) std::cerr << boost::format( + "RFX tune: R=%d, BS=%d, P=%d, B=%d, A=%d" + ) % R % BS % P % B % A << std::endl; + + //load the register values + adf4360_regs_t regs; + regs.core_power_level = adf4360_regs_t::CORE_POWER_LEVEL_10MA; + regs.counter_operation = adf4360_regs_t::COUNTER_OPERATION_NORMAL; + regs.muxout_control = adf4360_regs_t::MUXOUT_CONTROL_DLD; + regs.phase_detector_polarity = adf4360_regs_t::PHASE_DETECTOR_POLARITY_POS; + regs.charge_pump_output = adf4360_regs_t::CHARGE_PUMP_OUTPUT_NORMAL; + regs.cp_gain_0 = adf4360_regs_t::CP_GAIN_0_SET1; + regs.mute_till_ld = adf4360_regs_t::MUTE_TILL_LD_ENB; + regs.output_power_level = adf4360_regs_t::OUTPUT_POWER_LEVEL_3_5MA; + regs.current_setting1 = adf4360_regs_t::CURRENT_SETTING1_0_31MA; + regs.current_setting2 = adf4360_regs_t::CURRENT_SETTING2_0_31MA; + regs.power_down = adf4360_regs_t::POWER_DOWN_NORMAL_OP; + regs.prescaler_value = prescaler_to_enum[P]; + regs.a_counter = A; + regs.b_counter = B; + regs.cp_gain_1 = adf4360_regs_t::CP_GAIN_1_SET1; + regs.divide_by_2_output = (_div2[unit])? + adf4360_regs_t::DIVIDE_BY_2_OUTPUT_DIV2 : + adf4360_regs_t::DIVIDE_BY_2_OUTPUT_FUND ; + regs.divide_by_2_prescaler = adf4360_regs_t::DIVIDE_BY_2_PRESCALER_FUND; + regs.r_counter = R; + regs.ablpw = adf4360_regs_t::ABLPW_3_0NS; + regs.lock_detect_precision = adf4360_regs_t::LOCK_DETECT_PRECISION_5CYCLES; + regs.test_mode_bit = 0; + regs.band_select_clock_div = bandsel_to_enum[BS]; + + //write the registers + std::vector<adf4360_regs_t::addr_t> addrs = list_of //correct power-up sequence to write registers (R, C, N) + (adf4360_regs_t::ADDR_RCOUNTER) + (adf4360_regs_t::ADDR_CONTROL) + (adf4360_regs_t::ADDR_NCOUNTER) + ; + BOOST_FOREACH(adf4360_regs_t::addr_t addr, addrs){ + this->get_iface()->write_spi( + unit, spi_config_t::EDGE_RISE, + regs.get_reg(addr), 24 + ); + } + + //return the actual frequency + if (_div2[unit]) actual_freq /= 2; + if (rfx_debug) std::cerr << boost::format( + "RFX tune: actual frequency %f Mhz" + ) % (actual_freq/1e6) << std::endl; + return actual_freq; +} + +/*********************************************************************** + * RX Get and Set + **********************************************************************/ +void rfx_xcvr::rx_get(const wax::obj &key_, wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<subdev_prop_t>()){ + case SUBDEV_PROP_NAME: + val = get_rx_id().to_pp_string(); + return; + + case SUBDEV_PROP_OTHERS: + val = prop_names_t(); //empty + return; + + case SUBDEV_PROP_GAIN: + UHD_ASSERT_THROW(name == "PGA0"); + val = _rx_pga0_gain; + return; + + case SUBDEV_PROP_GAIN_RANGE: + UHD_ASSERT_THROW(name == "PGA0"); + val = gain_range_t(0, _max_rx_pga0_gain, float(0.022)); + return; + + case SUBDEV_PROP_GAIN_NAMES: + val = prop_names_t(1, "PGA0"); + return; + + case SUBDEV_PROP_FREQ: + val = _rx_lo_freq; + return; + + case SUBDEV_PROP_FREQ_RANGE: + val = _freq_range; + return; + + case SUBDEV_PROP_ANTENNA: + val = _rx_ant; + return; + + case SUBDEV_PROP_ANTENNA_NAMES:{ + prop_names_t ants = list_of("TX/RX")("RX2"); + val = ants; + } + return; + + case SUBDEV_PROP_QUADRATURE: + val = true; + return; + + case SUBDEV_PROP_IQ_SWAPPED: + val = true; + return; + + case SUBDEV_PROP_SPECTRUM_INVERTED: + val = false; + return; + + case SUBDEV_PROP_USE_LO_OFFSET: + val = false; + return; + + case SUBDEV_PROP_LO_LOCKED: + val = this->get_locked(dboard_iface::UNIT_RX); + return; + + default: UHD_THROW_PROP_GET_ERROR(); + } +} + +void rfx_xcvr::rx_set(const wax::obj &key_, const wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<subdev_prop_t>()){ + + case SUBDEV_PROP_FREQ: + set_rx_lo_freq(val.as<double>()); + return; + + case SUBDEV_PROP_GAIN: + UHD_ASSERT_THROW(name == "PGA0"); + set_rx_pga0_gain(val.as<float>()); + return; + + case SUBDEV_PROP_ANTENNA: + set_rx_ant(val.as<std::string>()); + return; + + default: UHD_THROW_PROP_SET_ERROR(); + } +} + +/*********************************************************************** + * TX Get and Set + **********************************************************************/ +void rfx_xcvr::tx_get(const wax::obj &key_, wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<subdev_prop_t>()){ + case SUBDEV_PROP_NAME: + val = get_tx_id().to_pp_string(); + return; + + case SUBDEV_PROP_OTHERS: + val = prop_names_t(); //empty + return; + + case SUBDEV_PROP_GAIN: + val = float(0); + return; + + case SUBDEV_PROP_GAIN_RANGE: + val = gain_range_t(0, 0, 0); + return; + + case SUBDEV_PROP_GAIN_NAMES: + val = prop_names_t(); //empty + return; + + case SUBDEV_PROP_FREQ: + val = _tx_lo_freq; + return; + + case SUBDEV_PROP_FREQ_RANGE: + val = _freq_range; + return; + + case SUBDEV_PROP_ANTENNA: + val = std::string("TX/RX"); + return; + + case SUBDEV_PROP_ANTENNA_NAMES: + val = prop_names_t(1, "TX/RX"); + return; + + case SUBDEV_PROP_QUADRATURE: + val = true; + return; + + case SUBDEV_PROP_IQ_SWAPPED: + val = false; + return; + + case SUBDEV_PROP_SPECTRUM_INVERTED: + val = false; + return; + + case SUBDEV_PROP_USE_LO_OFFSET: + val = true; + return; + + case SUBDEV_PROP_LO_LOCKED: + val = this->get_locked(dboard_iface::UNIT_TX); + return; + + default: UHD_THROW_PROP_GET_ERROR(); + } +} + +void rfx_xcvr::tx_set(const wax::obj &key_, const wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<subdev_prop_t>()){ + + case SUBDEV_PROP_FREQ: + set_tx_lo_freq(val.as<double>()); + return; + + case SUBDEV_PROP_GAIN: + //no gains to set! + return; + + case SUBDEV_PROP_ANTENNA: + //its always set to tx/rx, so we only allow this value + UHD_ASSERT_THROW(val.as<std::string>() == "TX/RX"); + return; + + default: UHD_THROW_PROP_SET_ERROR(); + } +} diff --git a/host/lib/usrp/dboard/db_wbx.cpp b/host/lib/usrp/dboard/db_wbx.cpp new file mode 100644 index 000000000..2a8a3a9f2 --- /dev/null +++ b/host/lib/usrp/dboard/db_wbx.cpp @@ -0,0 +1,613 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +static const bool wbx_debug = false; + +// Common IO Pins +#define ANTSW_IO ((1 << 5)|(1 << 15)) // on UNIT_TX, 0 = TX, 1 = RX, on UNIT_RX 0 = main ant, 1 = RX2 +#define ADF4350_CE (1 << 3) +#define ADF4350_PDBRF (1 << 2) +#define ADF4350_MUXOUT (1 << 1) // INPUT!!! +#define LOCKDET_MASK (1 << 0) // INPUT!!! + +// TX IO Pins +#define TX_PUP_5V (1 << 7) // enables 5.0V power supply +#define TX_PUP_3V (1 << 6) // enables 3.3V supply +#define TXMOD_EN (1 << 4) // on UNIT_TX, 1 enables TX Modulator + +// RX IO Pins +#define RX_PUP_5V (1 << 7) // enables 5.0V power supply +#define RX_PUP_3V (1 << 6) // enables 3.3V supply +#define RXBB_PDB (1 << 4) // on UNIT_RX, 1 powers up RX baseband + +// RX Attenuator Pins +#define RX_ATTN_SHIFT 8 // lsb of RX Attenuator Control +#define RX_ATTN_MASK (63 << RX_ATTN_SHIFT) // valid bits of RX Attenuator Control + +// Mixer functions +#define TX_MIXER_ENB (TXMOD_EN|ADF4350_PDBRF) +#define TX_MIXER_DIS 0 + +#define RX_MIXER_ENB (RXBB_PDB|ADF4350_PDBRF) +#define RX_MIXER_DIS 0 + +// Pin functions +#define TX_POWER_IO (TX_PUP_5V|TX_PUP_3V) // high enables power supply +#define TXIO_MASK (TX_POWER_IO|ANTSW_IO|ADF4350_CE|ADF4350_PDBRF|TXMOD_EN) + +#define RX_POWER_IO (RX_PUP_5V|RX_PUP_3V) // high enables power supply +#define RXIO_MASK (RX_POWER_IO|ANTSW_IO|ADF4350_CE|ADF4350_PDBRF|RXBB_PDB|RX_ATTN_MASK) + +// Power functions +#define TX_POWER_UP (TX_POWER_IO|ADF4350_CE) +#define TX_POWER_DOWN 0 + +#define RX_POWER_UP (RX_POWER_IO|ADF4350_CE) +#define RX_POWER_DOWN 0 + +// Antenna constants +#define ANT_TX 0 //the tx line is transmitting +#define ANT_RX ANTSW_IO //the tx line is receiving +#define ANT_TXRX 0 //the rx line is on txrx +#define ANT_RX2 ANTSW_IO //the rx line in on rx2 +#define ANT_XX 0 //dont care how the antenna is set + +#include "adf4350_regs.hpp" +#include <uhd/types/dict.hpp> +#include <uhd/usrp/subdev_props.hpp> +#include <uhd/types/ranges.hpp> +#include <uhd/utils/assert.hpp> +#include <uhd/utils/static.hpp> +#include <uhd/utils/algorithm.hpp> +#include <uhd/usrp/dboard_base.hpp> +#include <uhd/usrp/dboard_manager.hpp> +#include <boost/assign/list_of.hpp> +#include <boost/format.hpp> +#include <boost/math/special_functions/round.hpp> + +using namespace uhd; +using namespace uhd::usrp; +using namespace boost::assign; + +/*********************************************************************** + * The WBX dboard + **********************************************************************/ +static const float _max_rx_pga0_gain = 31.5; +static const float _max_tx_pga0_gain = 25; + +class wbx_xcvr : public xcvr_dboard_base{ +public: + wbx_xcvr( + ctor_args_t args, + const freq_range_t &freq_range + ); + ~wbx_xcvr(void); + + void rx_get(const wax::obj &key, wax::obj &val); + void rx_set(const wax::obj &key, const wax::obj &val); + + void tx_get(const wax::obj &key, wax::obj &val); + void tx_set(const wax::obj &key, const wax::obj &val); + +private: + freq_range_t _freq_range; + uhd::dict<dboard_iface::unit_t, bool> _div2; + double _rx_lo_freq, _tx_lo_freq; + std::string _rx_ant; + int _rx_pga0_attn_iobits; + float _rx_pga0_gain; + float _tx_pga0_gain; + + void set_rx_lo_freq(double freq); + void set_tx_lo_freq(double freq); + void set_rx_ant(const std::string &ant); + void set_rx_pga0_gain(float gain); + void set_rx_pga0_attn(float attn); + void set_tx_pga0_gain(float gain); + + void update_atr(void); + + /*! + * Set the LO frequency for the particular dboard unit. + * \param unit which unit rx or tx + * \param target_freq the desired frequency in Hz + * \return the actual frequency in Hz + */ + double set_lo_freq(dboard_iface::unit_t unit, double target_freq); + + /*! + * Get the lock detect status of the LO. + * \param unit which unit rx or tx + * \return true for locked + */ + bool get_locked(dboard_iface::unit_t unit){ + return (this->get_iface()->read_gpio(unit) & LOCKDET_MASK) != 0; + } +}; + +/*********************************************************************** + * Register the WBX dboard (min freq, max freq, rx div2, tx div2) + **********************************************************************/ +static dboard_base::sptr make_wbx(dboard_base::ctor_args_t args){ + return dboard_base::sptr(new wbx_xcvr(args, freq_range_t(50e6, 2220e6))); +} + +UHD_STATIC_BLOCK(reg_wbx_dboards){ + dboard_manager::register_dboard(0x0052, &make_wbx, "WBX RX"); + dboard_manager::register_dboard(0x0053, &make_wbx, "WBX TX"); +} + +/*********************************************************************** + * Structors + **********************************************************************/ +wbx_xcvr::wbx_xcvr( + ctor_args_t args, + const freq_range_t &freq_range +) : xcvr_dboard_base(args){ + _freq_range = freq_range; + + //enable the clocks that we need + this->get_iface()->set_clock_enabled(dboard_iface::UNIT_TX, true); + this->get_iface()->set_clock_enabled(dboard_iface::UNIT_RX, true); + + //set the gpio directions + this->get_iface()->set_gpio_ddr(dboard_iface::UNIT_TX, TXIO_MASK); + this->get_iface()->set_gpio_ddr(dboard_iface::UNIT_RX, RXIO_MASK); + if (wbx_debug) std::cerr << boost::format( + "WBX GPIO Direction: RX: 0x%08x, TX: 0x%08x" + ) % RXIO_MASK % TXIO_MASK << std::endl; + + //set some default values + set_rx_lo_freq((_freq_range.min + _freq_range.max)/2.0); + set_tx_lo_freq((_freq_range.min + _freq_range.max)/2.0); + set_rx_ant("RX2"); + set_rx_pga0_gain(0); + set_tx_pga0_gain(0); +} + +wbx_xcvr::~wbx_xcvr(void){ + /* NOP */ +} + +/*********************************************************************** + * Helper Methods + **********************************************************************/ +void wbx_xcvr::update_atr(void){ + //calculate atr pins + + //setup the tx atr (this does not change with antenna) + this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_IDLE, TX_POWER_UP | ANT_XX | TX_MIXER_DIS); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_RX_ONLY, TX_POWER_UP | ANT_RX | TX_MIXER_DIS); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY, TX_POWER_UP | ANT_TX | TX_MIXER_ENB); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, TX_POWER_UP | ANT_TX | TX_MIXER_ENB); + + //setup the rx atr (this does not change with antenna) + this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE, + _rx_pga0_attn_iobits | RX_POWER_UP | ANT_XX | RX_MIXER_DIS); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY, + _rx_pga0_attn_iobits | RX_POWER_UP | ANT_XX | RX_MIXER_DIS); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, + _rx_pga0_attn_iobits | RX_POWER_UP | ANT_RX2| RX_MIXER_ENB); + + //set the rx atr regs that change with antenna setting + this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_RX_ONLY, + _rx_pga0_attn_iobits | RX_POWER_UP | RX_MIXER_ENB | ((_rx_ant == "TX/RX")? ANT_TXRX : ANT_RX2)); + if (wbx_debug) std::cerr << boost::format( + "WBX RXONLY ATR REG: 0x%08x" + ) % (_rx_pga0_attn_iobits | RX_POWER_UP | RX_MIXER_ENB | ((_rx_ant == "TX/RX")? ANT_TXRX : ANT_RX2)) << std::endl; +} + +void wbx_xcvr::set_rx_lo_freq(double freq){ + _rx_lo_freq = set_lo_freq(dboard_iface::UNIT_RX, freq); +} + +void wbx_xcvr::set_tx_lo_freq(double freq){ + _tx_lo_freq = set_lo_freq(dboard_iface::UNIT_TX, freq); +} + +void wbx_xcvr::set_rx_ant(const std::string &ant){ + //validate input + UHD_ASSERT_THROW(ant == "TX/RX" or ant == "RX2"); + + //shadow the setting + _rx_ant = ant; + + //write the new antenna setting to atr regs + update_atr(); +} + +void wbx_xcvr::set_rx_pga0_gain(float gain){ + //clip the input + gain = std::clip<float>(gain, 0, _max_rx_pga0_gain); + + //shadow the setting (does not account for precision loss) + _rx_pga0_gain = gain; + + //convert to attenuation and update iobits for atr + set_rx_pga0_attn(_max_rx_pga0_gain - gain); + + //write the new gain to atr regs + update_atr(); +} + +void wbx_xcvr::set_rx_pga0_attn(float attn) +{ + int attn_code = int(floor(attn*2)); + _rx_pga0_attn_iobits = ((~attn_code) << RX_ATTN_SHIFT) & RX_ATTN_MASK; + if (wbx_debug) std::cerr << boost::format( + "WBX Attenuation: %f dB, Code: %d, IO Bits %x, Mask: %x" + ) % attn % attn_code % (_rx_pga0_attn_iobits & RX_ATTN_MASK) % RX_ATTN_MASK << std::endl; +} + +void wbx_xcvr::set_tx_pga0_gain(float gain){ + //clip the input + gain = std::clip<float>(gain, 0, _max_tx_pga0_gain); + + //voltage level constants + static const float max_volts = float(0.5), min_volts = float(1.4); + static const float slope = (max_volts-min_volts)/_max_rx_pga0_gain; + + //calculate the voltage for the aux dac + float dac_volts = gain*slope + min_volts; + + if (wbx_debug) std::cerr << boost::format( + "WBX TX Gain: %f dB, dac_volts: %f V" + ) % gain % dac_volts << std::endl; + + //write the new voltage to the aux dac + this->get_iface()->write_aux_dac(dboard_iface::UNIT_TX, 0, dac_volts); + + //shadow the setting (does not account for precision loss) + _tx_pga0_gain = gain; +} + +double wbx_xcvr::set_lo_freq( + dboard_iface::unit_t unit, + double target_freq +){ + if (wbx_debug) std::cerr << boost::format( + "WBX tune: target frequency %f Mhz" + ) % (target_freq/1e6) << std::endl; + + //clip the input + target_freq = std::clip(target_freq, _freq_range.min, _freq_range.max); + + //map prescaler setting to mininmum integer divider (N) values (pg.18 prescaler) + static const uhd::dict<int, int> prescaler_to_min_int_div = map_list_of + (0,23) //adf4350_regs_t::PRESCALER_4_5 + (1,75) //adf4350_regs_t::PRESCALER_8_9 + ; + + //map rf divider select output dividers to enums + static const uhd::dict<int, adf4350_regs_t::rf_divider_select_t> rfdivsel_to_enum = map_list_of + (1, adf4350_regs_t::RF_DIVIDER_SELECT_DIV1) + (2, adf4350_regs_t::RF_DIVIDER_SELECT_DIV2) + (4, adf4350_regs_t::RF_DIVIDER_SELECT_DIV4) + (8, adf4350_regs_t::RF_DIVIDER_SELECT_DIV8) + (16, adf4350_regs_t::RF_DIVIDER_SELECT_DIV16) + ; + + double actual_freq, pfd_freq; + double ref_freq = this->get_iface()->get_clock_rate(unit); + int R, BS, N, FRAC, MOD; + int RFdiv = 1; + adf4350_regs_t::reference_divide_by_2_t T = adf4350_regs_t::REFERENCE_DIVIDE_BY_2_DISABLED; + adf4350_regs_t::reference_doubler_t D = adf4350_regs_t::REFERENCE_DOUBLER_DISABLED; + + //Reference doubler for 50% duty cycle + // if ref_freq < 12.5MHz enable regs.reference_divide_by_2 + if(ref_freq <= 12.5e6) D = adf4350_regs_t::REFERENCE_DOUBLER_ENABLED; + + //increase RF divider until acceptable VCO frequency + //start with target_freq*2 because mixer has divide by 2 + double vco_freq = target_freq*2; + while (vco_freq < 2.2e9) { + vco_freq *= 2; + RFdiv *= 2; + } + + //use 8/9 prescaler for vco_freq > 3 GHz (pg.18 prescaler) + adf4350_regs_t::prescaler_t prescaler = vco_freq > 3e9 ? adf4350_regs_t::PRESCALER_8_9 : adf4350_regs_t::PRESCALER_4_5; + + /* + * The goal here is to loop though possible R dividers, + * band select clock dividers, N (int) dividers, and FRAC + * (frac) dividers. + * + * Calculate the N and F dividers for each set of values. + * The loop exists when it meets all of the constraints. + * The resulting loop values are loaded into the registers. + * + * from pg.21 + * + * f_pfd = f_ref*(1+D)/(R*(1+T)) + * f_vco = (N + (FRAC/MOD))*f_pfd + * N = f_vco/f_pfd - FRAC/MOD = f_vco*((R*(T+1))/(f_ref*(1+D))) - FRAC/MOD + * f_rf = f_vco/RFdiv) + * f_actual = f_rf/2 + */ + for(R = 1; R <= 1023; R+=1){ + //PFD input frequency = f_ref/R ... ignoring Reference doubler/divide-by-2 (D & T) + pfd_freq = ref_freq*(1+D)/(R*(1+T)); + + //keep the PFD frequency at or below 25MHz (Loop Filter Bandwidth) + if (pfd_freq > 25e6) continue; + + //ignore fractional part of tuning + N = int(std::floor(vco_freq/pfd_freq)); + + //keep N > minimum int divider requirement + if (N < prescaler_to_min_int_div[prescaler]) continue; + + for(BS=1; BS <= 255; BS+=1){ + //keep the band select frequency at or below 100KHz + //constraint on band select clock + if (pfd_freq/BS > 100e3) continue; + goto done_loop; + } + } done_loop: + + //Fractional-N calculation + MOD = 4095; //max fractional accuracy + FRAC = int((vco_freq/pfd_freq - N)*MOD); + + //Reference divide-by-2 for 50% duty cycle + // if R even, move one divide by 2 to to regs.reference_divide_by_2 + if(R % 2 == 0){ + T = adf4350_regs_t::REFERENCE_DIVIDE_BY_2_ENABLED; + R /= 2; + } + + //actual frequency calculation + actual_freq = double((N + (double(FRAC)/double(MOD)))*ref_freq*(1+int(D))/(R*(1+int(T)))/RFdiv/2); + + + if (wbx_debug) { + std::cerr << boost::format("WBX Intermediates: ref=%0.2f, outdiv=%f, fbdiv=%f") % (ref_freq*(1+int(D))/(R*(1+int(T)))) % double(RFdiv*2) % double(N + double(FRAC)/double(MOD)) << std::endl; + + std::cerr << boost::format("WBX tune: R=%d, BS=%d, N=%d, FRAC=%d, MOD=%d, T=%d, D=%d, RFdiv=%d, LD=%d" + ) % R % BS % N % FRAC % MOD % T % D % RFdiv % get_locked(unit)<< std::endl + << boost::format("WBX Frequencies (MHz): REQ=%0.2f, ACT=%0.2f, VCO=%0.2f, PFD=%0.2f, BAND=%0.2f" + ) % (target_freq/1e6) % (actual_freq/1e6) % (vco_freq/1e6) % (pfd_freq/1e6) % (pfd_freq/BS/1e6) << std::endl; + } + + //load the register values + adf4350_regs_t regs; + + regs.frac_12_bit = FRAC; + regs.int_16_bit = N; + regs.mod_12_bit = MOD; + regs.prescaler = prescaler; + regs.r_counter_10_bit = R; + regs.reference_divide_by_2 = T; + regs.reference_doubler = D; + regs.band_select_clock_div = BS; + regs.rf_divider_select = rfdivsel_to_enum[RFdiv]; + + //write the registers + //correct power-up sequence to write registers (5, 4, 3, 2, 1, 0) + int addr; + + for(addr=5; addr>=0; addr--){ + if (wbx_debug) std::cerr << boost::format( + "WBX SPI Reg (0x%02x): 0x%08x" + ) % addr % regs.get_reg(addr) << std::endl; + this->get_iface()->write_spi( + unit, spi_config_t::EDGE_RISE, + regs.get_reg(addr), 32 + ); + } + + //return the actual frequency + if (wbx_debug) std::cerr << boost::format( + "WBX tune: actual frequency %f Mhz" + ) % (actual_freq/1e6) << std::endl; + return actual_freq; +} + +/*********************************************************************** + * RX Get and Set + **********************************************************************/ +void wbx_xcvr::rx_get(const wax::obj &key_, wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<subdev_prop_t>()){ + case SUBDEV_PROP_NAME: + val = get_rx_id().to_pp_string(); + return; + + case SUBDEV_PROP_OTHERS: + val = prop_names_t(); //empty + return; + + case SUBDEV_PROP_GAIN: + UHD_ASSERT_THROW(name == "PGA0"); + val = _rx_pga0_gain; + return; + + case SUBDEV_PROP_GAIN_RANGE: + UHD_ASSERT_THROW(name == "PGA0"); + val = gain_range_t(0, _max_rx_pga0_gain, float(0.5)); + return; + + case SUBDEV_PROP_GAIN_NAMES: + val = prop_names_t(1, "PGA0"); + return; + + case SUBDEV_PROP_FREQ: + val = _rx_lo_freq; + return; + + case SUBDEV_PROP_FREQ_RANGE: + val = _freq_range; + return; + + case SUBDEV_PROP_ANTENNA: + val = _rx_ant; + return; + + case SUBDEV_PROP_ANTENNA_NAMES:{ + prop_names_t ants = list_of("TX/RX")("RX2"); + val = ants; + } + return; + + case SUBDEV_PROP_QUADRATURE: + val = true; + return; + + case SUBDEV_PROP_IQ_SWAPPED: + val = false; + return; + + case SUBDEV_PROP_SPECTRUM_INVERTED: + val = false; + return; + + case SUBDEV_PROP_USE_LO_OFFSET: + val = false; + return; + + case SUBDEV_PROP_LO_LOCKED: + val = this->get_locked(dboard_iface::UNIT_RX); + return; + + default: UHD_THROW_PROP_GET_ERROR(); + } +} + +void wbx_xcvr::rx_set(const wax::obj &key_, const wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<subdev_prop_t>()){ + + case SUBDEV_PROP_FREQ: + set_rx_lo_freq(val.as<double>()); + return; + + case SUBDEV_PROP_GAIN: + UHD_ASSERT_THROW(name == "PGA0"); + set_rx_pga0_gain(val.as<float>()); + return; + + case SUBDEV_PROP_ANTENNA: + set_rx_ant(val.as<std::string>()); + return; + + default: UHD_THROW_PROP_SET_ERROR(); + } +} + +/*********************************************************************** + * TX Get and Set + **********************************************************************/ +void wbx_xcvr::tx_get(const wax::obj &key_, wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<subdev_prop_t>()){ + case SUBDEV_PROP_NAME: + val = get_tx_id().to_pp_string(); + return; + + case SUBDEV_PROP_OTHERS: + val = prop_names_t(); //empty + return; + + case SUBDEV_PROP_GAIN: + UHD_ASSERT_THROW(name == "PGA0"); + val = _tx_pga0_gain; + return; + + case SUBDEV_PROP_GAIN_RANGE: + UHD_ASSERT_THROW(name == "PGA0"); + val = gain_range_t(0, _max_tx_pga0_gain, float(0.05)); + return; + + case SUBDEV_PROP_GAIN_NAMES: + val = prop_names_t(1, "PGA0"); + return; + + case SUBDEV_PROP_FREQ: + val = _tx_lo_freq; + return; + + case SUBDEV_PROP_FREQ_RANGE: + val = _freq_range; + return; + + case SUBDEV_PROP_ANTENNA: + val = std::string("TX/RX"); + return; + + case SUBDEV_PROP_ANTENNA_NAMES: + val = prop_names_t(1, "TX/RX"); + return; + + case SUBDEV_PROP_QUADRATURE: + val = true; + return; + + case SUBDEV_PROP_IQ_SWAPPED: + val = false; + return; + + case SUBDEV_PROP_SPECTRUM_INVERTED: + val = false; + return; + + case SUBDEV_PROP_USE_LO_OFFSET: + val = false; + return; + + case SUBDEV_PROP_LO_LOCKED: + val = this->get_locked(dboard_iface::UNIT_TX); + return; + + default: UHD_THROW_PROP_GET_ERROR(); + } +} + +void wbx_xcvr::tx_set(const wax::obj &key_, const wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<subdev_prop_t>()){ + + case SUBDEV_PROP_FREQ: + set_tx_lo_freq(val.as<double>()); + return; + + case SUBDEV_PROP_GAIN: + UHD_ASSERT_THROW(name == "PGA0"); + set_tx_pga0_gain(val.as<float>()); + return; + + case SUBDEV_PROP_ANTENNA: + //its always set to tx/rx, so we only allow this value + UHD_ASSERT_THROW(val.as<std::string>() == "TX/RX"); + return; + + default: UHD_THROW_PROP_SET_ERROR(); + } +} diff --git a/host/lib/usrp/dboard/db_xcvr2450.cpp b/host/lib/usrp/dboard/db_xcvr2450.cpp new file mode 100644 index 000000000..3472229f4 --- /dev/null +++ b/host/lib/usrp/dboard/db_xcvr2450.cpp @@ -0,0 +1,626 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +// TX IO Pins +#define HB_PA_OFF_TXIO (1 << 15) // 5GHz PA, 1 = off, 0 = on +#define LB_PA_OFF_TXIO (1 << 14) // 2.4GHz PA, 1 = off, 0 = on +#define ANTSEL_TX1_RX2_TXIO (1 << 13) // 1 = Ant 1 to TX, Ant 2 to RX +#define ANTSEL_TX2_RX1_TXIO (1 << 12) // 1 = Ant 2 to TX, Ant 1 to RX +#define TX_EN_TXIO (1 << 11) // 1 = TX on, 0 = TX off +#define AD9515DIV_TXIO (1 << 4) // 1 = Div by 3, 0 = Div by 2 + +#define TXIO_MASK (HB_PA_OFF_TXIO | LB_PA_OFF_TXIO | ANTSEL_TX1_RX2_TXIO | ANTSEL_TX2_RX1_TXIO | TX_EN_TXIO | AD9515DIV_TXIO) + +// TX IO Functions +#define HB_PA_TXIO LB_PA_OFF_TXIO +#define LB_PA_TXIO HB_PA_OFF_TXIO +#define TX_ENB_TXIO TX_EN_TXIO +#define TX_DIS_TXIO 0 +#define AD9515DIV_3_TXIO AD9515DIV_TXIO +#define AD9515DIV_2_TXIO 0 + +// RX IO Pins +#define LOCKDET_RXIO (1 << 15) // This is an INPUT!!! +#define POWER_RXIO (1 << 14) // 1 = power on, 0 = shutdown +#define RX_EN_RXIO (1 << 13) // 1 = RX on, 0 = RX off +#define RX_HP_RXIO (1 << 12) // 0 = Fc set by rx_hpf, 1 = 600 KHz + +#define RXIO_MASK (POWER_RXIO | RX_EN_RXIO | RX_HP_RXIO) + +// RX IO Functions +#define POWER_UP_RXIO POWER_RXIO +#define POWER_DOWN_RXIO 0 +#define RX_ENB_RXIO RX_EN_RXIO +#define RX_DIS_RXIO 0 + +#include "max2829_regs.hpp" +#include <uhd/utils/static.hpp> +#include <uhd/utils/assert.hpp> +#include <uhd/utils/algorithm.hpp> +#include <uhd/types/ranges.hpp> +#include <uhd/types/dict.hpp> +#include <uhd/usrp/subdev_props.hpp> +#include <uhd/usrp/dboard_base.hpp> +#include <uhd/usrp/dboard_manager.hpp> +#include <boost/assign/list_of.hpp> +#include <boost/format.hpp> +#include <boost/thread.hpp> +#include <boost/math/special_functions/round.hpp> +#include <utility> + +using namespace uhd; +using namespace uhd::usrp; +using namespace boost::assign; + +/*********************************************************************** + * The XCVR 2450 constants + **********************************************************************/ +static const bool xcvr2450_debug = false; + +static const freq_range_t xcvr_freq_range(2.4e9, 6.0e9); + +static const prop_names_t xcvr_antennas = list_of("J1")("J2"); + +static const uhd::dict<std::string, gain_range_t> xcvr_tx_gain_ranges = map_list_of + ("VGA", gain_range_t(0, 30, 0.5)) + ("BB", gain_range_t(0, 5, 1.5)) +; +static const uhd::dict<std::string, gain_range_t> xcvr_rx_gain_ranges = map_list_of + ("LNA", gain_range_t(0, 30.5, 15)) + ("VGA", gain_range_t(0, 62, 2.0)) +; + +/*********************************************************************** + * The XCVR 2450 dboard class + **********************************************************************/ +class xcvr2450 : public xcvr_dboard_base{ +public: + xcvr2450(ctor_args_t args); + ~xcvr2450(void); + + void rx_get(const wax::obj &key, wax::obj &val); + void rx_set(const wax::obj &key, const wax::obj &val); + + void tx_get(const wax::obj &key, wax::obj &val); + void tx_set(const wax::obj &key, const wax::obj &val); + +private: + double _lo_freq; + uhd::dict<std::string, float> _tx_gains, _rx_gains; + std::string _tx_ant, _rx_ant; + int _ad9515div; + max2829_regs_t _max2829_regs; + + void set_lo_freq(double target_freq); + void set_tx_ant(const std::string &ant); + void set_rx_ant(const std::string &ant); + void set_tx_gain(float gain, const std::string &name); + void set_rx_gain(float gain, const std::string &name); + + void update_atr(void); + void spi_reset(void); + void send_reg(boost::uint8_t addr){ + boost::uint32_t value = _max2829_regs.get_reg(addr); + if(xcvr2450_debug) std::cerr << boost::format( + "XCVR2450: send reg 0x%02x, value 0x%05x" + ) % int(addr) % value << std::endl; + this->get_iface()->write_spi( + dboard_iface::UNIT_RX, + spi_config_t::EDGE_RISE, + value, 24 + ); + } + + static bool is_highband(double freq){return freq > 3e9;} + + /*! + * Is the LO locked? + * \return true for locked + */ + bool get_locked(void){ + return (this->get_iface()->read_gpio(dboard_iface::UNIT_RX) & LOCKDET_RXIO) != 0; + } + + /*! + * Read the RSSI from the aux adc + * \return the rssi in dB + */ + float get_rssi(void){ + //constants for the rssi calculation + static const float min_v = float(0.5), max_v = float(2.5); + static const float rssi_dyn_range = 60; + //calculate the rssi from the voltage + float voltage = this->get_iface()->read_aux_adc(dboard_iface::UNIT_RX, 1); + return rssi_dyn_range*(voltage - min_v)/(max_v - min_v); + } +}; + +/*********************************************************************** + * Register the XCVR 2450 dboard + **********************************************************************/ +static dboard_base::sptr make_xcvr2450(dboard_base::ctor_args_t args){ + return dboard_base::sptr(new xcvr2450(args)); +} + +UHD_STATIC_BLOCK(reg_xcvr2450_dboard){ + //register the factory function for the rx and tx dbids + dboard_manager::register_dboard(0x0060, &make_xcvr2450, "XCVR2450 TX"); + dboard_manager::register_dboard(0x0061, &make_xcvr2450, "XCVR2450 RX"); +} + +/*********************************************************************** + * Structors + **********************************************************************/ +xcvr2450::xcvr2450(ctor_args_t args) : xcvr_dboard_base(args){ + //enable only the clocks we need + this->get_iface()->set_clock_enabled(dboard_iface::UNIT_TX, true); + + //set the gpio directions + this->get_iface()->set_gpio_ddr(dboard_iface::UNIT_TX, TXIO_MASK); + this->get_iface()->set_gpio_ddr(dboard_iface::UNIT_RX, RXIO_MASK); + + spi_reset(); //prepare the spi + + //setup the misc max2829 registers + _max2829_regs.mimo_select = max2829_regs_t::MIMO_SELECT_MIMO; + _max2829_regs.band_sel_mimo = max2829_regs_t::BAND_SEL_MIMO_MIMO; + _max2829_regs.pll_cp_select = max2829_regs_t::PLL_CP_SELECT_4MA; + _max2829_regs.rssi_high_bw = max2829_regs_t::RSSI_HIGH_BW_6MHZ; + _max2829_regs.tx_lpf_coarse_adj = max2829_regs_t::TX_LPF_COARSE_ADJ_12MHZ; + _max2829_regs.rx_lpf_coarse_adj = max2829_regs_t::RX_LPF_COARSE_ADJ_9_5MHZ; + _max2829_regs.rx_lpf_fine_adj = max2829_regs_t::RX_LPF_FINE_ADJ_95; + _max2829_regs.rx_vga_gain_spi = max2829_regs_t::RX_VGA_GAIN_SPI_SPI; + _max2829_regs.rssi_output_range = max2829_regs_t::RSSI_OUTPUT_RANGE_HIGH; + _max2829_regs.rssi_op_mode = max2829_regs_t::RSSI_OP_MODE_ENABLED; + _max2829_regs.rssi_pin_fcn = max2829_regs_t::RSSI_PIN_FCN_RSSI; + _max2829_regs.rx_highpass = max2829_regs_t::RX_HIGHPASS_100HZ; + _max2829_regs.tx_vga_gain_spi = max2829_regs_t::TX_VGA_GAIN_SPI_SPI; + _max2829_regs.pa_driver_linearity = max2829_regs_t::PA_DRIVER_LINEARITY_78; + _max2829_regs.tx_vga_linearity = max2829_regs_t::TX_VGA_LINEARITY_78; + _max2829_regs.tx_upconv_linearity = max2829_regs_t::TX_UPCONV_LINEARITY_78; + + //send initial register settings + for(boost::uint8_t reg = 0x2; reg <= 0xC; reg++){ + this->send_reg(reg); + } + + //set defaults for LO, gains, antennas + set_lo_freq(2.45e9); + set_rx_ant(xcvr_antennas.at(0)); + set_tx_ant(xcvr_antennas.at(1)); + BOOST_FOREACH(const std::string &name, xcvr_tx_gain_ranges.keys()){ + set_tx_gain(xcvr_tx_gain_ranges[name].min, name); + } + BOOST_FOREACH(const std::string &name, xcvr_rx_gain_ranges.keys()){ + set_rx_gain(xcvr_rx_gain_ranges[name].min, name); + } +} + +xcvr2450::~xcvr2450(void){ + spi_reset(); +} + +void xcvr2450::spi_reset(void){ + //spi reset mode: global enable = off, tx and rx enable = on + this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_IDLE, TX_ENB_TXIO); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE, RX_ENB_RXIO | POWER_DOWN_RXIO); + boost::this_thread::sleep(boost::posix_time::milliseconds(10)); + + //take it back out of spi reset mode and wait a bit + this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE, RX_DIS_RXIO | POWER_UP_RXIO); + boost::this_thread::sleep(boost::posix_time::milliseconds(10)); +} + +void xcvr2450::update_atr(void){ + //calculate tx atr pins + int band_sel = (xcvr2450::is_highband(_lo_freq))? HB_PA_TXIO : LB_PA_TXIO; + int tx_ant_sel = (_tx_ant == "J1")? ANTSEL_TX1_RX2_TXIO : ANTSEL_TX2_RX1_TXIO; + int rx_ant_sel = (_rx_ant == "J2")? ANTSEL_TX1_RX2_TXIO : ANTSEL_TX2_RX1_TXIO; + int xx_ant_sel = tx_ant_sel; //prefer the tx antenna selection for full duplex (rx will get the other antenna) + int ad9515div = (_ad9515div == 3)? AD9515DIV_3_TXIO : AD9515DIV_2_TXIO; + + //set the tx registers + this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_IDLE, band_sel | ad9515div | TX_DIS_TXIO); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_RX_ONLY, band_sel | ad9515div | TX_DIS_TXIO | rx_ant_sel); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY, band_sel | ad9515div | TX_ENB_TXIO | tx_ant_sel); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, band_sel | ad9515div | TX_ENB_TXIO | xx_ant_sel); + + //set the rx registers + this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE, POWER_UP_RXIO | RX_DIS_RXIO); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_RX_ONLY, POWER_UP_RXIO | RX_ENB_RXIO); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY, POWER_UP_RXIO | RX_DIS_RXIO); + this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, POWER_UP_RXIO | RX_ENB_RXIO); +} + +/*********************************************************************** + * Tuning + **********************************************************************/ +void xcvr2450::set_lo_freq(double target_freq){ + target_freq = std::clip(target_freq, xcvr_freq_range.min, xcvr_freq_range.max); + //TODO: clip for highband and lowband + + //variables used in the calculation below + double scaler = xcvr2450::is_highband(target_freq)? (4.0/5.0) : (4.0/3.0); + double ref_freq = this->get_iface()->get_clock_rate(dboard_iface::UNIT_TX); + int R, intdiv, fracdiv; + + //loop through values until we get a match + for(_ad9515div = 2; _ad9515div <= 3; _ad9515div++){ + for(R = 1; R <= 7; R++){ + double N = (target_freq*scaler*R*_ad9515div)/ref_freq; + intdiv = int(std::floor(N)); + fracdiv = boost::math::iround((N - intdiv)*double(1 << 16)); + //actual minimum is 128, but most chips seems to require higher to lock + if (intdiv < 131 or intdiv > 255) continue; + //constraints met: exit loop + goto done_loop; + } + } done_loop: + + //calculate the actual freq from the values above + double N = double(intdiv) + double(fracdiv)/double(1 << 16); + _lo_freq = (N*ref_freq)/(scaler*R*_ad9515div); + + if (xcvr2450_debug) std::cerr + << boost::format("XCVR2450 tune:\n") + << boost::format(" R=%d, N=%f, ad9515=%d, scaler=%f\n") % R % N % _ad9515div % scaler + << boost::format(" Ref Freq=%fMHz\n") % (ref_freq/1e6) + << boost::format(" Target Freq=%fMHz\n") % (target_freq/1e6) + << boost::format(" Actual Freq=%fMHz\n") % (_lo_freq/1e6) + << std::endl; + + //high-high band or low-high band? + if(_lo_freq > (5.35e9 + 5.47e9)/2.0){ + if (xcvr2450_debug) std::cerr << "XCVR2450 tune: Using high-high band" << std::endl; + _max2829_regs.band_select_802_11a = max2829_regs_t::BAND_SELECT_802_11A_5_47GHZ_TO_5_875GHZ; + }else{ + if (xcvr2450_debug) std::cerr << "XCVR2450 tune: Using low-high band" << std::endl; + _max2829_regs.band_select_802_11a = max2829_regs_t::BAND_SELECT_802_11A_4_9GHZ_TO_5_35GHZ; + } + + //new band select settings and ad9515 divider + this->update_atr(); + + //load new counters into registers + _max2829_regs.int_div_ratio_word = intdiv; + _max2829_regs.frac_div_ratio_lsb = fracdiv & 0x3; + _max2829_regs.frac_div_ratio_msb = fracdiv >> 2; + this->send_reg(0x3); //integer + this->send_reg(0x4); //fractional + + //load the reference divider and band select into registers + //toggle the bandswitch from off to automatic (which really means start) + _max2829_regs.ref_divider = R; + _max2829_regs.band_select = (xcvr2450::is_highband(_lo_freq))? + max2829_regs_t::BAND_SELECT_5GHZ : + max2829_regs_t::BAND_SELECT_2_4GHZ ; + _max2829_regs.vco_bandswitch = max2829_regs_t::VCO_BANDSWITCH_DISABLE; + this->send_reg(0x5); + _max2829_regs.vco_bandswitch = max2829_regs_t::VCO_BANDSWITCH_AUTOMATIC;; + this->send_reg(0x5); +} + +/*********************************************************************** + * Antenna Handling + **********************************************************************/ +void xcvr2450::set_tx_ant(const std::string &ant){ + assert_has(xcvr_antennas, ant, "xcvr antenna name"); + _tx_ant = ant; + this->update_atr(); //sets the atr to the new antenna setting +} + +void xcvr2450::set_rx_ant(const std::string &ant){ + assert_has(xcvr_antennas, ant, "xcvr antenna name"); + _rx_ant = ant; + this->update_atr(); //sets the atr to the new antenna setting +} + +/*********************************************************************** + * Gain Handling + **********************************************************************/ +/*! + * Convert a requested gain for the tx vga into the integer register value. + * The gain passed into the function will be set to the actual value. + * \param gain the requested gain in dB + * \return 6 bit the register value + */ +static int gain_to_tx_vga_reg(float &gain){ + //calculate the register value + int reg = std::clip(boost::math::iround(gain*60/30.0) + 3, 0, 63); + + //calculate the actual gain value + if (reg < 4) gain = 0; + else if (reg < 48) gain = float(reg/2 - 1); + else gain = float(reg/2.0 - 1.5); + + //return register value + return reg; +} + +/*! + * Convert a requested gain for the tx bb into the integer register value. + * The gain passed into the function will be set to the actual value. + * \param gain the requested gain in dB + * \return gain enum value + */ +static max2829_regs_t::tx_baseband_gain_t gain_to_tx_bb_reg(float &gain){ + int reg = std::clip(boost::math::iround(gain*3/5.0), 0, 3); + switch(reg){ + case 0: + gain = 0; + return max2829_regs_t::TX_BASEBAND_GAIN_0DB; + case 1: + gain = 2; + return max2829_regs_t::TX_BASEBAND_GAIN_2DB; + case 2: + gain = 3.5; + return max2829_regs_t::TX_BASEBAND_GAIN_3_5DB; + case 3: + gain = 5; + return max2829_regs_t::TX_BASEBAND_GAIN_5DB; + } + UHD_ASSERT_THROW(false); +} + +/*! + * Convert a requested gain for the rx vga into the integer register value. + * The gain passed into the function will be set to the actual value. + * \param gain the requested gain in dB + * \return 5 bit the register value + */ +static int gain_to_rx_vga_reg(float &gain){ + int reg = std::clip(boost::math::iround(gain/2.0), 0, 31); + gain = float(reg*2); + return reg; +} + +/*! + * Convert a requested gain for the rx lna into the integer register value. + * The gain passed into the function will be set to the actual value. + * \param gain the requested gain in dB + * \return 2 bit the register value + */ +static int gain_to_rx_lna_reg(float &gain){ + int reg = std::clip(boost::math::iround(gain*2/30.5) + 1, 0, 3); + switch(reg){ + case 0: + case 1: gain = 0; break; + case 2: gain = 15; break; + case 3: gain = 30.5; break; + } + return reg; +} + +void xcvr2450::set_tx_gain(float gain, const std::string &name){ + assert_has(xcvr_tx_gain_ranges.keys(), name, "xcvr tx gain name"); + if (name == "VGA"){ + _max2829_regs.tx_vga_gain = gain_to_tx_vga_reg(gain); + send_reg(0xC); + } + else if(name == "BB"){ + _max2829_regs.tx_baseband_gain = gain_to_tx_bb_reg(gain); + send_reg(0x9); + } + else UHD_ASSERT_THROW(false); + _tx_gains[name] = gain; +} + +void xcvr2450::set_rx_gain(float gain, const std::string &name){ + assert_has(xcvr_rx_gain_ranges.keys(), name, "xcvr rx gain name"); + if (name == "VGA"){ + _max2829_regs.rx_vga_gain = gain_to_rx_vga_reg(gain); + send_reg(0xB); + } + else if(name == "LNA"){ + _max2829_regs.rx_lna_gain = gain_to_rx_lna_reg(gain); + send_reg(0xB); + } + else UHD_ASSERT_THROW(false); + _rx_gains[name] = gain; +} + +/*********************************************************************** + * RX Get and Set + **********************************************************************/ +void xcvr2450::rx_get(const wax::obj &key_, wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<subdev_prop_t>()){ + case SUBDEV_PROP_NAME: + val = get_rx_id().to_pp_string(); + return; + + case SUBDEV_PROP_OTHERS: + val = prop_names_t(); //empty + return; + + case SUBDEV_PROP_GAIN: + assert_has(_rx_gains.keys(), name, "xcvr rx gain name"); + val = _rx_gains[name]; + return; + + case SUBDEV_PROP_GAIN_RANGE: + assert_has(xcvr_rx_gain_ranges.keys(), name, "xcvr rx gain name"); + val = xcvr_rx_gain_ranges[name]; + return; + + case SUBDEV_PROP_GAIN_NAMES: + val = prop_names_t(xcvr_rx_gain_ranges.keys()); + return; + + case SUBDEV_PROP_FREQ: + val = _lo_freq; + return; + + case SUBDEV_PROP_FREQ_RANGE: + val = xcvr_freq_range; + return; + + case SUBDEV_PROP_ANTENNA: + val = _rx_ant; + return; + + case SUBDEV_PROP_ANTENNA_NAMES: + val = xcvr_antennas; + return; + + case SUBDEV_PROP_QUADRATURE: + val = true; + return; + + case SUBDEV_PROP_IQ_SWAPPED: + val = false; + return; + + case SUBDEV_PROP_SPECTRUM_INVERTED: + val = false; + return; + + case SUBDEV_PROP_USE_LO_OFFSET: + val = false; + return; + + case SUBDEV_PROP_LO_LOCKED: + val = this->get_locked(); + return; + + case SUBDEV_PROP_RSSI: + val = this->get_rssi(); + return; + + default: UHD_THROW_PROP_GET_ERROR(); + } +} + +void xcvr2450::rx_set(const wax::obj &key_, const wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<subdev_prop_t>()){ + + case SUBDEV_PROP_FREQ: + this->set_lo_freq(val.as<double>()); + return; + + case SUBDEV_PROP_GAIN: + this->set_rx_gain(val.as<float>(), name); + return; + + case SUBDEV_PROP_ANTENNA: + this->set_rx_ant(val.as<std::string>()); + return; + + default: UHD_THROW_PROP_SET_ERROR(); + } +} + +/*********************************************************************** + * TX Get and Set + **********************************************************************/ +void xcvr2450::tx_get(const wax::obj &key_, wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<subdev_prop_t>()){ + case SUBDEV_PROP_NAME: + val = get_tx_id().to_pp_string(); + return; + + case SUBDEV_PROP_OTHERS: + val = prop_names_t(); //empty + return; + + case SUBDEV_PROP_GAIN: + assert_has(_tx_gains.keys(), name, "xcvr tx gain name"); + val = _tx_gains[name]; + return; + + case SUBDEV_PROP_GAIN_RANGE: + assert_has(xcvr_tx_gain_ranges.keys(), name, "xcvr tx gain name"); + val = xcvr_tx_gain_ranges[name]; + return; + + case SUBDEV_PROP_GAIN_NAMES: + val = prop_names_t(xcvr_tx_gain_ranges.keys()); + return; + + case SUBDEV_PROP_FREQ: + val = _lo_freq; + return; + + case SUBDEV_PROP_FREQ_RANGE: + val = xcvr_freq_range; + return; + + case SUBDEV_PROP_ANTENNA: + val = _tx_ant; + return; + + case SUBDEV_PROP_ANTENNA_NAMES: + val = xcvr_antennas; + return; + + case SUBDEV_PROP_QUADRATURE: + val = true; + return; + + case SUBDEV_PROP_IQ_SWAPPED: + val = true; + return; + + case SUBDEV_PROP_SPECTRUM_INVERTED: + val = false; + return; + + case SUBDEV_PROP_USE_LO_OFFSET: + val = false; + return; + + case SUBDEV_PROP_LO_LOCKED: + val = this->get_locked(); + return; + + default: UHD_THROW_PROP_GET_ERROR(); + } +} + +void xcvr2450::tx_set(const wax::obj &key_, const wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<subdev_prop_t>()){ + + case SUBDEV_PROP_FREQ: + set_lo_freq(val.as<double>()); + return; + + case SUBDEV_PROP_GAIN: + this->set_tx_gain(val.as<float>(), name); + return; + + case SUBDEV_PROP_ANTENNA: + this->set_tx_ant(val.as<std::string>()); + return; + + default: UHD_THROW_PROP_SET_ERROR(); + } +} diff --git a/host/lib/usrp/dboard_base.cpp b/host/lib/usrp/dboard_base.cpp new file mode 100644 index 000000000..bd4b37ef3 --- /dev/null +++ b/host/lib/usrp/dboard_base.cpp @@ -0,0 +1,123 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include "dboard_ctor_args.hpp" +#include <uhd/usrp/dboard_base.hpp> +#include <boost/format.hpp> +#include <stdexcept> + +using namespace uhd::usrp; + +/*********************************************************************** + * dboard_base dboard dboard_base class + **********************************************************************/ +struct dboard_base::dboard_base_impl{ + ctor_args_impl args; + dboard_base_impl(ctor_args_t args) : args(*args){} +}; + +dboard_base::dboard_base(ctor_args_t args){ + _impl = new dboard_base_impl(args); +} + +dboard_base::~dboard_base(void){ + delete _impl; +} + +std::string dboard_base::get_subdev_name(void){ + return _impl->args.sd_name; +} + +dboard_iface::sptr dboard_base::get_iface(void){ + return _impl->args.db_iface; +} + +dboard_id_t dboard_base::get_rx_id(void){ + return _impl->args.rx_id; +} + +dboard_id_t dboard_base::get_tx_id(void){ + return _impl->args.tx_id; +} + +/*********************************************************************** + * xcvr dboard dboard_base class + **********************************************************************/ +xcvr_dboard_base::xcvr_dboard_base(ctor_args_t args) : dboard_base(args){ + if (get_rx_id() == dboard_id_t::none()){ + throw std::runtime_error(str(boost::format( + "cannot create xcvr board when the rx id is \"%s\"" + ) % dboard_id_t::none().to_pp_string())); + } + if (get_tx_id() == dboard_id_t::none()){ + throw std::runtime_error(str(boost::format( + "cannot create xcvr board when the tx id is \"%s\"" + ) % dboard_id_t::none().to_pp_string())); + } +} + +xcvr_dboard_base::~xcvr_dboard_base(void){ + /* NOP */ +} + +/*********************************************************************** + * rx dboard dboard_base class + **********************************************************************/ +rx_dboard_base::rx_dboard_base(ctor_args_t args) : dboard_base(args){ + if (get_tx_id() != dboard_id_t::none()){ + throw std::runtime_error(str(boost::format( + "cannot create rx board when the tx id is \"%s\"" + " -> expected a tx id of \"%s\"" + ) % get_tx_id().to_pp_string() % dboard_id_t::none().to_pp_string())); + } +} + +rx_dboard_base::~rx_dboard_base(void){ + /* NOP */ +} + +void rx_dboard_base::tx_get(const wax::obj &, wax::obj &){ + throw std::runtime_error("cannot call tx_get on a rx dboard"); +} + +void rx_dboard_base::tx_set(const wax::obj &, const wax::obj &){ + throw std::runtime_error("cannot call tx_set on a rx dboard"); +} + +/*********************************************************************** + * tx dboard dboard_base class + **********************************************************************/ +tx_dboard_base::tx_dboard_base(ctor_args_t args) : dboard_base(args){ + if (get_rx_id() != dboard_id_t::none()){ + throw std::runtime_error(str(boost::format( + "cannot create tx board when the rx id is \"%s\"" + " -> expected a rx id of \"%s\"" + ) % get_rx_id().to_pp_string() % dboard_id_t::none().to_pp_string())); + } +} + +tx_dboard_base::~tx_dboard_base(void){ + /* NOP */ +} + +void tx_dboard_base::rx_get(const wax::obj &, wax::obj &){ + throw std::runtime_error("cannot call rx_get on a tx dboard"); +} + +void tx_dboard_base::rx_set(const wax::obj &, const wax::obj &){ + throw std::runtime_error("cannot call rx_set on a tx dboard"); +} diff --git a/host/lib/usrp/dboard_ctor_args.hpp b/host/lib/usrp/dboard_ctor_args.hpp new file mode 100644 index 000000000..13abe79e8 --- /dev/null +++ b/host/lib/usrp/dboard_ctor_args.hpp @@ -0,0 +1,32 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#ifndef INCLUDED_DBOARD_CTOR_ARGS_HPP +#define INCLUDED_DBOARD_CTOR_ARGS_HPP + +#include <uhd/usrp/dboard_id.hpp> +#include <uhd/usrp/dboard_base.hpp> +#include <uhd/usrp/dboard_iface.hpp> +#include <string> + +struct uhd::usrp::dboard_base::ctor_args_impl{ + std::string sd_name; + dboard_iface::sptr db_iface; + dboard_id_t rx_id, tx_id; +}; + +#endif /* INCLUDED_DBOARD_CTOR_ARGS_HPP */ diff --git a/host/lib/usrp/dboard_eeprom.cpp b/host/lib/usrp/dboard_eeprom.cpp new file mode 100644 index 000000000..fa3631948 --- /dev/null +++ b/host/lib/usrp/dboard_eeprom.cpp @@ -0,0 +1,103 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include <uhd/usrp/dboard_eeprom.hpp> +#include <uhd/utils/assert.hpp> +#include <boost/format.hpp> +#include <iostream> + +using namespace uhd; +using namespace uhd::usrp; + +static const bool _dboard_eeprom_debug = false; + +//////////////////////////////////////////////////////////////////////// +// format of daughterboard EEPROM +// 00: 0xDB code for ``I'm a daughterboard'' +// 01: .. Daughterboard ID (LSB) +// 02: .. Daughterboard ID (MSB) +// 03: .. io bits 7-0 direction (bit set if it's an output from m'board) +// 04: .. io bits 15-8 direction (bit set if it's an output from m'board) +// 05: .. ADC0 DC offset correction (LSB) +// 06: .. ADC0 DC offset correction (MSB) +// 07: .. ADC1 DC offset correction (LSB) +// 08: .. ADC1 DC offset correction (MSB) +// ... +// 1f: .. negative of the sum of bytes [0x00, 0x1e] + +#define DB_EEPROM_MAGIC 0x00 +#define DB_EEPROM_MAGIC_VALUE 0xDB +#define DB_EEPROM_ID_LSB 0x01 +#define DB_EEPROM_ID_MSB 0x02 +#define DB_EEPROM_OE_LSB 0x03 +#define DB_EEPROM_OE_MSB 0x04 +#define DB_EEPROM_OFFSET_0_LSB 0x05 // offset correction for ADC or DAC 0 +#define DB_EEPROM_OFFSET_0_MSB 0x06 +#define DB_EEPROM_OFFSET_1_LSB 0x07 // offset correction for ADC or DAC 1 +#define DB_EEPROM_OFFSET_1_MSB 0x08 +#define DB_EEPROM_CHKSUM 0x1f + +#define DB_EEPROM_CLEN 0x20 // length of common portion of eeprom + +#define DB_EEPROM_CUSTOM_BASE DB_EEPROM_CLEN // first avail offset for + // daughterboard specific use +//////////////////////////////////////////////////////////////////////// + +//negative sum of bytes excluding checksum byte +static boost::uint8_t checksum(const byte_vector_t &bytes){ + int sum = 0; + for (size_t i = 0; i < std::min(bytes.size(), size_t(DB_EEPROM_CHKSUM)); i++){ + sum -= int(bytes.at(i)); + } + if (_dboard_eeprom_debug) + std::cout << boost::format("sum: 0x%02x") % sum << std::endl; + return boost::uint8_t(sum); +} + +dboard_eeprom_t::dboard_eeprom_t(const byte_vector_t &bytes){ + if (_dboard_eeprom_debug){ + for (size_t i = 0; i < bytes.size(); i++){ + std::cout << boost::format( + "eeprom byte[0x%02x] = 0x%02x") % i % int(bytes.at(i) + ) << std::endl; + } + } + try{ + UHD_ASSERT_THROW(bytes.size() >= DB_EEPROM_CLEN); + UHD_ASSERT_THROW(bytes[DB_EEPROM_MAGIC] == DB_EEPROM_MAGIC_VALUE); + UHD_ASSERT_THROW(bytes[DB_EEPROM_CHKSUM] == checksum(bytes)); + id = dboard_id_t::from_uint16(0 + | (boost::uint16_t(bytes[DB_EEPROM_ID_LSB]) << 0) + | (boost::uint16_t(bytes[DB_EEPROM_ID_MSB]) << 8) + ); + }catch(const uhd::assert_error &){ + id = dboard_id_t::none(); + } +} + +byte_vector_t dboard_eeprom_t::get_eeprom_bytes(void){ + byte_vector_t bytes(DB_EEPROM_CLEN, 0); //defaults to all zeros + bytes[DB_EEPROM_MAGIC] = DB_EEPROM_MAGIC_VALUE; + bytes[DB_EEPROM_ID_LSB] = boost::uint8_t(id.to_uint16() >> 0); + bytes[DB_EEPROM_ID_MSB] = boost::uint8_t(id.to_uint16() >> 8); + bytes[DB_EEPROM_CHKSUM] = checksum(bytes); + return bytes; +} + +size_t dboard_eeprom_t::num_bytes(void){ + return DB_EEPROM_CLEN; +} diff --git a/host/lib/usrp/dboard_id.cpp b/host/lib/usrp/dboard_id.cpp new file mode 100644 index 000000000..3028d2a3b --- /dev/null +++ b/host/lib/usrp/dboard_id.cpp @@ -0,0 +1,68 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include <uhd/usrp/dboard_id.hpp> +#include <boost/lexical_cast.hpp> +#include <boost/format.hpp> +#include <sstream> +#include <iostream> + +using namespace uhd::usrp; + +dboard_id_t::dboard_id_t(boost::uint16_t id){ + _id = id; +} + +dboard_id_t dboard_id_t::none(void){ + return dboard_id_t(); +} + +dboard_id_t dboard_id_t::from_uint16(boost::uint16_t uint16){ + return dboard_id_t(uint16); +} + +boost::uint16_t dboard_id_t::to_uint16(void) const{ + return _id; +} + +//used with lexical cast to parse a hex string +template <class T> struct to_hex{ + T value; + operator T() const {return value;} + friend std::istream& operator>>(std::istream& in, to_hex& out){ + in >> std::hex >> out.value; + return in; + } +}; + +dboard_id_t dboard_id_t::from_string(const std::string &string){ + if (string.substr(0, 2) == "0x"){ + return dboard_id_t::from_uint16(boost::lexical_cast<to_hex<boost::uint16_t> >(string)); + } + return dboard_id_t::from_uint16(boost::lexical_cast<boost::uint16_t>(string)); +} + +std::string dboard_id_t::to_string(void) const{ + return str(boost::format("0x%04x") % this->to_uint16()); +} + +//Note: to_pp_string is implemented in the dboard manager +//because it needs access to the dboard registration table + +bool uhd::usrp::operator==(const dboard_id_t &lhs, const dboard_id_t &rhs){ + return lhs.to_uint16() == rhs.to_uint16(); +} diff --git a/host/lib/usrp/dboard_manager.cpp b/host/lib/usrp/dboard_manager.cpp new file mode 100644 index 000000000..8161727e5 --- /dev/null +++ b/host/lib/usrp/dboard_manager.cpp @@ -0,0 +1,304 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include "dboard_ctor_args.hpp" +#include <uhd/usrp/dboard_manager.hpp> +#include <uhd/usrp/subdev_props.hpp> +#include <uhd/utils/gain_handler.hpp> +#include <uhd/utils/static.hpp> +#include <uhd/utils/assert.hpp> +#include <uhd/types/dict.hpp> +#include <boost/tuple/tuple.hpp> +#include <boost/format.hpp> +#include <boost/bind.hpp> +#include <boost/foreach.hpp> +#include <boost/assign/list_of.hpp> +#include <iostream> + +using namespace uhd; +using namespace uhd::usrp; + +/*********************************************************************** + * storage and registering for dboards + **********************************************************************/ +//dboard registry tuple: dboard constructor, canonical name, subdev names +typedef boost::tuple<dboard_manager::dboard_ctor_t, std::string, prop_names_t> args_t; + +//map a dboard id to a dboard constructor +typedef uhd::dict<dboard_id_t, args_t> id_to_args_map_t; +UHD_SINGLETON_FCN(id_to_args_map_t, get_id_to_args_map) + +void dboard_manager::register_dboard( + dboard_id_t dboard_id, + dboard_ctor_t dboard_ctor, + const std::string &name, + const prop_names_t &subdev_names +){ + //std::cout << "registering: " << name << std::endl; + if (get_id_to_args_map().has_key(dboard_id)){ + throw std::runtime_error(str(boost::format( + "The dboard id %s is already registered to %s." + ) % dboard_id.to_string() % dboard_id.to_pp_string())); + } + get_id_to_args_map()[dboard_id] = args_t(dboard_ctor, name, subdev_names); +} + +std::string dboard_id_t::to_pp_string(void) const{ + std::string name = "unknown"; + if (get_id_to_args_map().has_key(*this)){ + name = get_id_to_args_map()[*this].get<1>(); + } + return str(boost::format("%s (%s)") % name % this->to_string()); +} + +/*********************************************************************** + * internal helper classe + **********************************************************************/ +/*! + * A special wax proxy object that forwards calls to a subdev. + * A sptr to an instance will be used in the properties structure. + */ +class subdev_proxy : boost::noncopyable, public wax::obj{ +public: + typedef boost::shared_ptr<subdev_proxy> sptr; + enum type_t{RX_TYPE, TX_TYPE}; + + //structors + subdev_proxy(dboard_base::sptr subdev, type_t type) + : _subdev(subdev), _type(type){ + //initialize gain props struct + gain_handler::props_t gain_props; + gain_props.value = SUBDEV_PROP_GAIN; + gain_props.range = SUBDEV_PROP_GAIN_RANGE; + gain_props.names = SUBDEV_PROP_GAIN_NAMES; + + //make a new gain handler + _gain_handler = gain_handler::make( + this->get_link(), gain_props, + boost::bind(&gain_handler::is_equal<subdev_prop_t>, _1, _2) + ); + } + + ~subdev_proxy(void){ + /* NOP */ + } + +private: + gain_handler::sptr _gain_handler; + dboard_base::sptr _subdev; + type_t _type; + + //forward the get calls to the rx or tx + void get(const wax::obj &key, wax::obj &val){ + if (_gain_handler->intercept_get(key, val)) return; + switch(_type){ + case RX_TYPE: return _subdev->rx_get(key, val); + case TX_TYPE: return _subdev->tx_get(key, val); + } + } + + //forward the set calls to the rx or tx + void set(const wax::obj &key, const wax::obj &val){ + if (_gain_handler->intercept_set(key, val)) return; + switch(_type){ + case RX_TYPE: return _subdev->rx_set(key, val); + case TX_TYPE: return _subdev->tx_set(key, val); + } + } +}; + +/*********************************************************************** + * dboard manager implementation class + **********************************************************************/ +class dboard_manager_impl : public dboard_manager{ + +public: + dboard_manager_impl( + dboard_id_t rx_dboard_id, + dboard_id_t tx_dboard_id, + dboard_iface::sptr iface + ); + ~dboard_manager_impl(void); + + //dboard_iface + prop_names_t get_rx_subdev_names(void); + prop_names_t get_tx_subdev_names(void); + wax::obj get_rx_subdev(const std::string &subdev_name); + wax::obj get_tx_subdev(const std::string &subdev_name); + +private: + //list of rx and tx dboards in this dboard_manager + //each dboard here is actually a subdevice proxy + //the subdevice proxy is internal to the cpp file + uhd::dict<std::string, subdev_proxy::sptr> _rx_dboards; + uhd::dict<std::string, subdev_proxy::sptr> _tx_dboards; + dboard_iface::sptr _iface; + void set_nice_dboard_if(void); +}; + +/*********************************************************************** + * make routine for dboard manager + **********************************************************************/ +dboard_manager::sptr dboard_manager::make( + dboard_id_t rx_dboard_id, + dboard_id_t tx_dboard_id, + dboard_iface::sptr iface +){ + return dboard_manager::sptr( + new dboard_manager_impl(rx_dboard_id, tx_dboard_id, iface) + ); +} + +/*********************************************************************** + * implementation class methods + **********************************************************************/ +static args_t get_dboard_args( + dboard_iface::unit_t unit, + dboard_id_t dboard_id +){ + //special case, the none id was provided, use the following ids + if (dboard_id == dboard_id_t::none()){ + std::cerr << boost::format( + "Warning: unregistered dboard id: %s" + " -> defaulting to a basic board" + ) % dboard_id.to_pp_string() << std::endl; + UHD_ASSERT_THROW(get_id_to_args_map().has_key(0x0001)); + UHD_ASSERT_THROW(get_id_to_args_map().has_key(0x0000)); + switch(unit){ + case dboard_iface::UNIT_RX: return get_dboard_args(unit, 0x0001); + case dboard_iface::UNIT_TX: return get_dboard_args(unit, 0x0000); + default: UHD_ASSERT_THROW(false); + } + } + + //verify that there is a registered constructor for this id + if (not get_id_to_args_map().has_key(dboard_id)){ + return get_dboard_args(unit, dboard_id_t::none()); + } + + //return the dboard args for this id + return get_id_to_args_map()[dboard_id]; +} + +dboard_manager_impl::dboard_manager_impl( + dboard_id_t rx_dboard_id, + dboard_id_t tx_dboard_id, + dboard_iface::sptr iface +){ + _iface = iface; + + dboard_ctor_t rx_dboard_ctor; std::string rx_name; prop_names_t rx_subdevs; + boost::tie(rx_dboard_ctor, rx_name, rx_subdevs) = get_dboard_args(dboard_iface::UNIT_RX, rx_dboard_id); + + dboard_ctor_t tx_dboard_ctor; std::string tx_name; prop_names_t tx_subdevs; + boost::tie(tx_dboard_ctor, tx_name, tx_subdevs) = get_dboard_args(dboard_iface::UNIT_TX, tx_dboard_id); + + //initialize the gpio pins before creating subdevs + set_nice_dboard_if(); + + //dboard constructor args + dboard_base::ctor_args_impl db_ctor_args; + db_ctor_args.db_iface = iface; + + //make xcvr subdevs (make one subdev for both rx and tx dboards) + if (rx_dboard_ctor == tx_dboard_ctor){ + UHD_ASSERT_THROW(rx_subdevs == tx_subdevs); + BOOST_FOREACH(const std::string &subdev, rx_subdevs){ + db_ctor_args.sd_name = subdev; + db_ctor_args.rx_id = rx_dboard_id; + db_ctor_args.tx_id = tx_dboard_id; + dboard_base::sptr xcvr_dboard = rx_dboard_ctor(&db_ctor_args); + //create a rx proxy for this xcvr board + _rx_dboards[subdev] = subdev_proxy::sptr( + new subdev_proxy(xcvr_dboard, subdev_proxy::RX_TYPE) + ); + //create a tx proxy for this xcvr board + _tx_dboards[subdev] = subdev_proxy::sptr( + new subdev_proxy(xcvr_dboard, subdev_proxy::TX_TYPE) + ); + } + } + + //make tx and rx subdevs (separate subdevs for rx and tx dboards) + else{ + //make the rx subdevs + BOOST_FOREACH(const std::string &subdev, rx_subdevs){ + db_ctor_args.sd_name = subdev; + db_ctor_args.rx_id = rx_dboard_id; + db_ctor_args.tx_id = dboard_id_t::none(); + dboard_base::sptr rx_dboard = rx_dboard_ctor(&db_ctor_args); + //create a rx proxy for this rx board + _rx_dboards[subdev] = subdev_proxy::sptr( + new subdev_proxy(rx_dboard, subdev_proxy::RX_TYPE) + ); + } + //make the tx subdevs + BOOST_FOREACH(const std::string &subdev, tx_subdevs){ + db_ctor_args.sd_name = subdev; + db_ctor_args.rx_id = dboard_id_t::none(); + db_ctor_args.tx_id = tx_dboard_id; + dboard_base::sptr tx_dboard = tx_dboard_ctor(&db_ctor_args); + //create a tx proxy for this tx board + _tx_dboards[subdev] = subdev_proxy::sptr( + new subdev_proxy(tx_dboard, subdev_proxy::TX_TYPE) + ); + } + } +} + +dboard_manager_impl::~dboard_manager_impl(void){ + set_nice_dboard_if(); +} + +prop_names_t dboard_manager_impl::get_rx_subdev_names(void){ + return _rx_dboards.keys(); +} + +prop_names_t dboard_manager_impl::get_tx_subdev_names(void){ + return _tx_dboards.keys(); +} + +wax::obj dboard_manager_impl::get_rx_subdev(const std::string &subdev_name){ + if (not _rx_dboards.has_key(subdev_name)) throw std::invalid_argument( + str(boost::format("Unknown rx subdev name %s") % subdev_name) + ); + //get a link to the rx subdev proxy + return _rx_dboards[subdev_name]->get_link(); +} + +wax::obj dboard_manager_impl::get_tx_subdev(const std::string &subdev_name){ + if (not _tx_dboards.has_key(subdev_name)) throw std::invalid_argument( + str(boost::format("Unknown tx subdev name %s") % subdev_name) + ); + //get a link to the tx subdev proxy + return _tx_dboards[subdev_name]->get_link(); +} + +void dboard_manager_impl::set_nice_dboard_if(void){ + //make a list of possible unit types + std::vector<dboard_iface::unit_t> units = boost::assign::list_of + (dboard_iface::UNIT_RX) + (dboard_iface::UNIT_TX) + ; + + //set nice settings on each unit + BOOST_FOREACH(dboard_iface::unit_t unit, units){ + _iface->set_gpio_ddr(unit, 0x0000); //all inputs + _iface->set_atr_reg(unit, dboard_iface::ATR_REG_IDLE, 0x0000); //all low + _iface->set_clock_enabled(unit, false); //clock off + } +} diff --git a/host/lib/usrp/simple_usrp.cpp b/host/lib/usrp/simple_usrp.cpp new file mode 100644 index 000000000..f4aa82669 --- /dev/null +++ b/host/lib/usrp/simple_usrp.cpp @@ -0,0 +1,227 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include <uhd/usrp/simple_usrp.hpp> +#include <uhd/usrp/tune_helper.hpp> +#include <uhd/utils/assert.hpp> +#include <uhd/usrp/subdev_props.hpp> +#include <uhd/usrp/mboard_props.hpp> +#include <uhd/usrp/device_props.hpp> +#include <uhd/usrp/dboard_props.hpp> +#include <uhd/usrp/dsp_props.hpp> +#include <boost/foreach.hpp> +#include <boost/format.hpp> +#include <stdexcept> + +using namespace uhd; +using namespace uhd::usrp; + +/*********************************************************************** + * Simple Device Implementation + **********************************************************************/ +class simple_usrp_impl : public simple_usrp{ +public: + simple_usrp_impl(const device_addr_t &addr){ + _dev = device::make(addr); + _mboard = (*_dev)[DEVICE_PROP_MBOARD]; + _rx_dsp = _mboard[MBOARD_PROP_RX_DSP]; + _tx_dsp = _mboard[MBOARD_PROP_TX_DSP]; + + //extract rx subdevice + _rx_dboard = _mboard[MBOARD_PROP_RX_DBOARD]; + std::string rx_subdev_in_use = _rx_dboard[DBOARD_PROP_USED_SUBDEVS].as<prop_names_t>().at(0); + _rx_subdev = _rx_dboard[named_prop_t(DBOARD_PROP_SUBDEV, rx_subdev_in_use)]; + + //extract tx subdevice + _tx_dboard = _mboard[MBOARD_PROP_TX_DBOARD]; + std::string tx_subdev_in_use = _tx_dboard[DBOARD_PROP_USED_SUBDEVS].as<prop_names_t>().at(0); + _tx_subdev = _tx_dboard[named_prop_t(DBOARD_PROP_SUBDEV, tx_subdev_in_use)]; + } + + ~simple_usrp_impl(void){ + /* NOP */ + } + + device::sptr get_device(void){ + return _dev; + } + + std::string get_name(void){ + return str(boost::format( + "Simple USRP:\n" + " Device: %s\n" + " Mboard: %s\n" + " RX DSP: %s\n" + " RX Dboard: %s\n" + " RX Subdev: %s\n" + " TX DSP: %s\n" + " TX Dboard: %s\n" + " TX Subdev: %s\n" + ) + % (*_dev)[DEVICE_PROP_NAME].as<std::string>() + % _mboard[MBOARD_PROP_NAME].as<std::string>() + % _rx_dsp[DSP_PROP_NAME].as<std::string>() + % _rx_dboard[DBOARD_PROP_NAME].as<std::string>() + % _rx_subdev[SUBDEV_PROP_NAME].as<std::string>() + % _tx_dsp[DSP_PROP_NAME].as<std::string>() + % _tx_dboard[DBOARD_PROP_NAME].as<std::string>() + % _tx_subdev[SUBDEV_PROP_NAME].as<std::string>() + ); + } + + /******************************************************************* + * Misc + ******************************************************************/ + void set_time_now(const time_spec_t &time_spec){ + _mboard[MBOARD_PROP_TIME_NOW] = time_spec; + } + + void set_time_next_pps(const time_spec_t &time_spec){ + _mboard[MBOARD_PROP_TIME_NEXT_PPS] = time_spec; + } + + void issue_stream_cmd(const stream_cmd_t &stream_cmd){ + _mboard[MBOARD_PROP_STREAM_CMD] = stream_cmd; + } + + void set_clock_config(const clock_config_t &clock_config){ + _mboard[MBOARD_PROP_CLOCK_CONFIG] = clock_config; + } + + float read_rssi(void){ + return _rx_subdev[SUBDEV_PROP_RSSI].as<float>(); + } + + /******************************************************************* + * RX methods + ******************************************************************/ + void set_rx_rate(double rate){ + _rx_dsp[DSP_PROP_HOST_RATE] = rate; + } + + double get_rx_rate(void){ + return _rx_dsp[DSP_PROP_HOST_RATE].as<double>(); + } + + tune_result_t set_rx_freq(double target_freq){ + return tune_rx_subdev_and_ddc(_rx_subdev, _rx_dsp, target_freq); + } + + tune_result_t set_rx_freq(double target_freq, double lo_off){ + return tune_rx_subdev_and_ddc(_rx_subdev, _rx_dsp, target_freq, lo_off); + } + + freq_range_t get_rx_freq_range(void){ + return _rx_subdev[SUBDEV_PROP_FREQ_RANGE].as<freq_range_t>(); + } + + void set_rx_gain(float gain){ + _rx_subdev[SUBDEV_PROP_GAIN] = gain; + } + + float get_rx_gain(void){ + return _rx_subdev[SUBDEV_PROP_GAIN].as<float>(); + } + + gain_range_t get_rx_gain_range(void){ + return _rx_subdev[SUBDEV_PROP_GAIN_RANGE].as<gain_range_t>(); + } + + void set_rx_antenna(const std::string &ant){ + _rx_subdev[SUBDEV_PROP_ANTENNA] = ant; + } + + std::string get_rx_antenna(void){ + return _rx_subdev[SUBDEV_PROP_ANTENNA].as<std::string>(); + } + + std::vector<std::string> get_rx_antennas(void){ + return _rx_subdev[SUBDEV_PROP_ANTENNA_NAMES].as<prop_names_t>(); + } + + bool get_rx_lo_locked(void){ + return _rx_subdev[SUBDEV_PROP_LO_LOCKED].as<bool>(); + } + + /******************************************************************* + * TX methods + ******************************************************************/ + void set_tx_rate(double rate){ + _tx_dsp[DSP_PROP_HOST_RATE] = rate; + } + + double get_tx_rate(void){ + return _tx_dsp[DSP_PROP_HOST_RATE].as<double>(); + } + + tune_result_t set_tx_freq(double target_freq){ + return tune_tx_subdev_and_duc(_tx_subdev, _tx_dsp, target_freq); + } + + tune_result_t set_tx_freq(double target_freq, double lo_off){ + return tune_tx_subdev_and_duc(_tx_subdev, _tx_dsp, target_freq, lo_off); + } + + freq_range_t get_tx_freq_range(void){ + return _tx_subdev[SUBDEV_PROP_FREQ_RANGE].as<freq_range_t>(); + } + + void set_tx_gain(float gain){ + _tx_subdev[SUBDEV_PROP_GAIN] = gain; + } + + float get_tx_gain(void){ + return _tx_subdev[SUBDEV_PROP_GAIN].as<float>(); + } + + gain_range_t get_tx_gain_range(void){ + return _tx_subdev[SUBDEV_PROP_GAIN_RANGE].as<gain_range_t>(); + } + + void set_tx_antenna(const std::string &ant){ + _tx_subdev[SUBDEV_PROP_ANTENNA] = ant; + } + + std::string get_tx_antenna(void){ + return _tx_subdev[SUBDEV_PROP_ANTENNA].as<std::string>(); + } + + std::vector<std::string> get_tx_antennas(void){ + return _tx_subdev[SUBDEV_PROP_ANTENNA_NAMES].as<prop_names_t>(); + } + + bool get_tx_lo_locked(void){ + return _tx_subdev[SUBDEV_PROP_LO_LOCKED].as<bool>(); + } + +private: + device::sptr _dev; + wax::obj _mboard; + wax::obj _rx_dsp; + wax::obj _tx_dsp; + wax::obj _rx_dboard; + wax::obj _tx_dboard; + wax::obj _rx_subdev; + wax::obj _tx_subdev; +}; + +/*********************************************************************** + * The Make Function + **********************************************************************/ +simple_usrp::sptr simple_usrp::make(const device_addr_t &dev_addr){ + return sptr(new simple_usrp_impl(dev_addr)); +} diff --git a/host/lib/usrp/tune_helper.cpp b/host/lib/usrp/tune_helper.cpp new file mode 100644 index 000000000..a7d695b4e --- /dev/null +++ b/host/lib/usrp/tune_helper.cpp @@ -0,0 +1,127 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include <uhd/usrp/tune_helper.hpp> +#include <uhd/utils/algorithm.hpp> +#include <uhd/usrp/subdev_props.hpp> +#include <uhd/usrp/dsp_props.hpp> +#include <cmath> + +using namespace uhd; +using namespace uhd::usrp; + +/*********************************************************************** + * Tune Helper Function + **********************************************************************/ +static tune_result_t tune_xx_subdev_and_dxc( + bool is_tx, + wax::obj subdev, wax::obj dxc, + double target_freq, double lo_offset +){ + wax::obj subdev_freq_proxy = subdev[SUBDEV_PROP_FREQ]; + bool subdev_quadrature = subdev[SUBDEV_PROP_QUADRATURE].as<bool>(); + bool subdev_spectrum_inverted = subdev[SUBDEV_PROP_SPECTRUM_INVERTED].as<bool>(); + wax::obj dxc_freq_proxy = dxc[DSP_PROP_FREQ_SHIFT]; + double dxc_sample_rate = dxc[DSP_PROP_CODEC_RATE].as<double>(); + + // Ask the d'board to tune as closely as it can to target_freq+lo_offset + double target_inter_freq = target_freq + lo_offset; + subdev_freq_proxy = target_inter_freq; + double actual_inter_freq = subdev_freq_proxy.as<double>(); + + // Calculate the DDC setting that will downconvert the baseband from the + // daughterboard to our target frequency. + double delta_freq = target_freq - actual_inter_freq; + double delta_sign = std::signum(delta_freq); + delta_freq *= delta_sign; + delta_freq = std::fmod(delta_freq, dxc_sample_rate); + bool inverted = delta_freq > dxc_sample_rate/2.0; + double target_dxc_freq = inverted? (delta_freq - dxc_sample_rate) : (-delta_freq); + target_dxc_freq *= delta_sign; + + // If the spectrum is inverted, and the daughterboard doesn't do + // quadrature downconversion, we can fix the inversion by flipping the + // sign of the dxc_freq... (This only happens using the basic_rx board) + if (subdev_spectrum_inverted){ + inverted = not inverted; + } + if (inverted and not subdev_quadrature){ + target_dxc_freq *= -1.0; + inverted = not inverted; + } + // down conversion versus up conversion, fight! + // your mother is ugly and your going down... + target_dxc_freq *= (is_tx)? -1.0 : +1.0; + + dxc_freq_proxy = target_dxc_freq; + double actual_dxc_freq = dxc_freq_proxy.as<double>(); + + //return some kind of tune result tuple/struct + tune_result_t tune_result; + tune_result.target_inter_freq = target_inter_freq; + tune_result.actual_inter_freq = actual_inter_freq; + tune_result.target_dsp_freq = target_dxc_freq; + tune_result.actual_dsp_freq = actual_dxc_freq; + tune_result.spectrum_inverted = inverted; + return tune_result; +} + +/*********************************************************************** + * RX Tune + **********************************************************************/ +tune_result_t uhd::usrp::tune_rx_subdev_and_ddc( + wax::obj subdev, wax::obj ddc, + double target_freq, double lo_offset +){ + bool is_tx = false; + return tune_xx_subdev_and_dxc(is_tx, subdev, ddc, target_freq, lo_offset); +} + +tune_result_t uhd::usrp::tune_rx_subdev_and_ddc( + wax::obj subdev, wax::obj ddc, + double target_freq +){ + double lo_offset = 0.0; + //if the local oscillator will be in the passband, use an offset + if (subdev[SUBDEV_PROP_USE_LO_OFFSET].as<bool>()){ + lo_offset = 2.0*ddc[DSP_PROP_HOST_RATE].as<double>(); + } + return tune_rx_subdev_and_ddc(subdev, ddc, target_freq, lo_offset); +} + +/*********************************************************************** + * TX Tune + **********************************************************************/ +tune_result_t uhd::usrp::tune_tx_subdev_and_duc( + wax::obj subdev, wax::obj duc, + double target_freq, double lo_offset +){ + bool is_tx = true; + return tune_xx_subdev_and_dxc(is_tx, subdev, duc, target_freq, lo_offset); +} + +tune_result_t uhd::usrp::tune_tx_subdev_and_duc( + wax::obj subdev, wax::obj duc, + double target_freq +){ + double lo_offset = 0.0; + //if the local oscillator will be in the passband, use an offset + if (subdev[SUBDEV_PROP_USE_LO_OFFSET].as<bool>()){ + lo_offset = 2.0*duc[DSP_PROP_HOST_RATE].as<double>(); + } + return tune_tx_subdev_and_duc(subdev, duc, target_freq, lo_offset); +} diff --git a/host/lib/usrp/usrp2/CMakeLists.txt b/host/lib/usrp/usrp2/CMakeLists.txt new file mode 100644 index 000000000..fee67dff9 --- /dev/null +++ b/host/lib/usrp/usrp2/CMakeLists.txt @@ -0,0 +1,31 @@ +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +#This file will be included by cmake, use absolute paths! + +LIBUHD_APPEND_SOURCES( + ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/clock_ctrl.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/codec_ctrl.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/dboard_impl.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/dboard_iface.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/dsp_impl.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/io_impl.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/mboard_impl.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/serdes_ctrl.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/usrp2_iface.cpp + ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/usrp2_impl.cpp +) diff --git a/host/lib/usrp/usrp2/clock_ctrl.cpp b/host/lib/usrp/usrp2/clock_ctrl.cpp new file mode 100644 index 000000000..4c5207203 --- /dev/null +++ b/host/lib/usrp/usrp2/clock_ctrl.cpp @@ -0,0 +1,163 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include "clock_ctrl.hpp" +#include "ad9510_regs.hpp" +#include "usrp2_regs.hpp" //spi slave constants +#include <boost/cstdint.hpp> + +using namespace uhd; + +/*! + * A usrp2 clock control specific to the ad9510 ic. + */ +class clock_ctrl_impl : public clock_ctrl{ +public: + clock_ctrl_impl(usrp2_iface::sptr iface){ + _iface = iface; + + _ad9510_regs.cp_current_setting = ad9510_regs_t::CP_CURRENT_SETTING_3_0MA; + this->write_reg(0x09); + + // Setup the clock registers to 100MHz: + // This was already done by the firmware (or the host couldnt communicate). + // We could remove this part, and just leave it to the firmware. + // But why not leave it in for those who want to mess with clock settings? + // 100mhz = 10mhz/R * (P*B + A) + + _ad9510_regs.pll_power_down = ad9510_regs_t::PLL_POWER_DOWN_NORMAL; + _ad9510_regs.prescaler_value = ad9510_regs_t::PRESCALER_VALUE_DIV2; + this->write_reg(0x0A); + + _ad9510_regs.acounter = 0; + this->write_reg(0x04); + + _ad9510_regs.bcounter_msb = 0; + _ad9510_regs.bcounter_lsb = 5; + this->write_reg(0x05); + this->write_reg(0x06); + + _ad9510_regs.ref_counter_msb = 0; + _ad9510_regs.ref_counter_lsb = 1; // r divider = 1 + this->write_reg(0x0B); + this->write_reg(0x0C); + + /* regs will be updated in commands below */ + + this->enable_external_ref(false); + this->enable_rx_dboard_clock(false); + this->enable_tx_dboard_clock(false); + + /* private clock enables, must be set here */ + this->enable_dac_clock(true); + this->enable_adc_clock(true); + + } + + ~clock_ctrl_impl(void){ + /* private clock enables, must be set here */ + this->enable_dac_clock(false); + this->enable_adc_clock(false); + } + + //uses output clock 7 (cmos) + void enable_rx_dboard_clock(bool enb){ + _ad9510_regs.power_down_lvds_cmos_out7 = enb? 0 : 1; + _ad9510_regs.lvds_cmos_select_out7 = ad9510_regs_t::LVDS_CMOS_SELECT_OUT7_CMOS; + _ad9510_regs.output_level_lvds_out7 = ad9510_regs_t::OUTPUT_LEVEL_LVDS_OUT7_1_75MA; + _ad9510_regs.bypass_divider_out7 = 1; + this->write_reg(0x43); + this->write_reg(0x57); + this->update_regs(); + } + + //uses output clock 6 (cmos) + void enable_tx_dboard_clock(bool enb){ + _ad9510_regs.power_down_lvds_cmos_out6 = enb? 0 : 1; + _ad9510_regs.lvds_cmos_select_out6 = ad9510_regs_t::LVDS_CMOS_SELECT_OUT6_CMOS; + _ad9510_regs.output_level_lvds_out6 = ad9510_regs_t::OUTPUT_LEVEL_LVDS_OUT6_1_75MA; + _ad9510_regs.bypass_divider_out6 = 1; + this->write_reg(0x42); + this->write_reg(0x55); + this->update_regs(); + } + + /*! + * If we are to use an external reference, enable the charge pump. + * \param enb true to enable the CP + */ + void enable_external_ref(bool enb){ + _ad9510_regs.charge_pump_mode = (enb)? + ad9510_regs_t::CHARGE_PUMP_MODE_NORMAL : + ad9510_regs_t::CHARGE_PUMP_MODE_3STATE ; + _ad9510_regs.pll_mux_control = ad9510_regs_t::PLL_MUX_CONTROL_DLD_HIGH; + _ad9510_regs.pfd_polarity = ad9510_regs_t::PFD_POLARITY_POS; + this->write_reg(0x08); + this->update_regs(); + } + +private: + /*! + * Write a single register to the spi regs. + * \param addr the address to write + */ + void write_reg(boost::uint8_t addr){ + boost::uint32_t data = _ad9510_regs.get_write_reg(addr); + _iface->transact_spi(SPI_SS_AD9510, spi_config_t::EDGE_RISE, data, 24, false /*no rb*/); + } + + /*! + * Tells the ad9510 to latch the settings into the operational registers. + */ + void update_regs(void){ + _ad9510_regs.update_registers = 1; + this->write_reg(0x5a); + } + + //uses output clock 3 (pecl) + void enable_dac_clock(bool enb){ + _ad9510_regs.power_down_lvpecl_out3 = (enb)? + ad9510_regs_t::POWER_DOWN_LVPECL_OUT3_NORMAL : + ad9510_regs_t::POWER_DOWN_LVPECL_OUT3_SAFE_PD; + _ad9510_regs.output_level_lvpecl_out3 = ad9510_regs_t::OUTPUT_LEVEL_LVPECL_OUT3_810MV; + _ad9510_regs.bypass_divider_out3 = 1; + this->write_reg(0x3F); + this->write_reg(0x4F); + this->update_regs(); + } + + //uses output clock 4 (lvds) + void enable_adc_clock(bool enb){ + _ad9510_regs.power_down_lvds_cmos_out4 = enb? 0 : 1; + _ad9510_regs.lvds_cmos_select_out4 = ad9510_regs_t::LVDS_CMOS_SELECT_OUT4_LVDS; + _ad9510_regs.output_level_lvds_out4 = ad9510_regs_t::OUTPUT_LEVEL_LVDS_OUT4_1_75MA; + _ad9510_regs.bypass_divider_out4 = 1; + this->write_reg(0x40); + this->write_reg(0x51); + this->update_regs(); + } + + usrp2_iface::sptr _iface; + ad9510_regs_t _ad9510_regs; +}; + +/*********************************************************************** + * Public make function for the ad9510 clock control + **********************************************************************/ +clock_ctrl::sptr clock_ctrl::make(usrp2_iface::sptr iface){ + return sptr(new clock_ctrl_impl(iface)); +} diff --git a/host/lib/usrp/usrp2/clock_ctrl.hpp b/host/lib/usrp/usrp2/clock_ctrl.hpp new file mode 100644 index 000000000..706bf4246 --- /dev/null +++ b/host/lib/usrp/usrp2/clock_ctrl.hpp @@ -0,0 +1,60 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#ifndef INCLUDED_CLOCK_CTRL_HPP +#define INCLUDED_CLOCK_CTRL_HPP + +#include "usrp2_iface.hpp" +#include <boost/shared_ptr.hpp> +#include <boost/utility.hpp> + +class clock_ctrl : boost::noncopyable{ +public: + typedef boost::shared_ptr<clock_ctrl> sptr; + + /*! + * Make a clock config for the ad9510 ic. + * \param _iface a pointer to the usrp2 interface object + * \return a new clock control object + */ + static sptr make(usrp2_iface::sptr iface); + + /*! + * Enable/disable the rx dboard clock. + * \param enb true to enable + */ + virtual void enable_rx_dboard_clock(bool enb) = 0; + + /*! + * Enable/disable the tx dboard clock. + * \param enb true to enable + */ + virtual void enable_tx_dboard_clock(bool enb) = 0; + + /*! + * Enable/disable external reference. + * \param enb true to enable + */ + virtual void enable_external_ref(bool enb) = 0; + + /*! + * TODO other clock control api here.... + */ + +}; + +#endif /* INCLUDED_CLOCK_CTRL_HPP */ diff --git a/host/lib/usrp/usrp2/codec_ctrl.cpp b/host/lib/usrp/usrp2/codec_ctrl.cpp new file mode 100644 index 000000000..d698216ba --- /dev/null +++ b/host/lib/usrp/usrp2/codec_ctrl.cpp @@ -0,0 +1,91 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include "codec_ctrl.hpp" +#include "ad9777_regs.hpp" +#include "usrp2_regs.hpp" +#include <boost/cstdint.hpp> +#include <boost/foreach.hpp> +#include <iostream> + +static const bool codec_ctrl_debug = false; + +using namespace uhd; + +/*! + * A usrp2 codec control specific to the ad9777 ic. + */ +class codec_ctrl_impl : public codec_ctrl{ +public: + codec_ctrl_impl(usrp2_iface::sptr iface){ + _iface = iface; + + //setup the ad9777 dac + _ad9777_regs.x_1r_2r_mode = ad9777_regs_t::X_1R_2R_MODE_1R; + _ad9777_regs.filter_interp_rate = ad9777_regs_t::FILTER_INTERP_RATE_4X; + _ad9777_regs.mix_mode = ad9777_regs_t::MIX_MODE_REAL; + _ad9777_regs.pll_divide_ratio = ad9777_regs_t::PLL_DIVIDE_RATIO_DIV1; + _ad9777_regs.pll_state = ad9777_regs_t::PLL_STATE_ON; + _ad9777_regs.auto_cp_control = ad9777_regs_t::AUTO_CP_CONTROL_AUTO; + //I dac values + _ad9777_regs.idac_fine_gain_adjust = 0; + _ad9777_regs.idac_coarse_gain_adjust = 0xf; + _ad9777_regs.idac_offset_adjust_lsb = 0; + _ad9777_regs.idac_offset_adjust_msb = 0; + //Q dac values + _ad9777_regs.qdac_fine_gain_adjust = 0; + _ad9777_regs.qdac_coarse_gain_adjust = 0xf; + _ad9777_regs.qdac_offset_adjust_lsb = 0; + _ad9777_regs.qdac_offset_adjust_msb = 0; + //write all regs + for(boost::uint8_t addr = 0; addr <= 0xC; addr++){ + this->send_ad9777_reg(addr); + } + + //power-up adc + _iface->poke32(FR_MISC_CTRL_ADC, FRF_MISC_CTRL_ADC_ON); + } + + ~codec_ctrl_impl(void){ + //power-down dac + _ad9777_regs.power_down_mode = 1; + this->send_ad9777_reg(0); + + //power-down adc + _iface->poke32(FR_MISC_CTRL_ADC, FRF_MISC_CTRL_ADC_OFF); + } + +private: + ad9777_regs_t _ad9777_regs; + usrp2_iface::sptr _iface; + + void send_ad9777_reg(boost::uint8_t addr){ + boost::uint16_t reg = _ad9777_regs.get_write_reg(addr); + if (codec_ctrl_debug) std::cout << "send_ad9777_reg: " << std::hex << reg << std::endl; + _iface->transact_spi( + SPI_SS_AD9777, spi_config_t::EDGE_RISE, + reg, 16, false /*no rb*/ + ); + } +}; + +/*********************************************************************** + * Public make function for the usrp2 codec control + **********************************************************************/ +codec_ctrl::sptr codec_ctrl::make(usrp2_iface::sptr iface){ + return sptr(new codec_ctrl_impl(iface)); +} diff --git a/host/lib/usrp/usrp2/codec_ctrl.hpp b/host/lib/usrp/usrp2/codec_ctrl.hpp new file mode 100644 index 000000000..0ee52f476 --- /dev/null +++ b/host/lib/usrp/usrp2/codec_ctrl.hpp @@ -0,0 +1,38 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#ifndef INCLUDED_CODEC_CTRL_HPP +#define INCLUDED_CODEC_CTRL_HPP + +#include "usrp2_iface.hpp" +#include <boost/shared_ptr.hpp> +#include <boost/utility.hpp> + +class codec_ctrl : boost::noncopyable{ +public: + typedef boost::shared_ptr<codec_ctrl> sptr; + + /*! + * Make a codec control for the DAC and ADC. + * \param _iface a pointer to the usrp2 interface object + * \return a new codec control object + */ + static sptr make(usrp2_iface::sptr iface); + +}; + +#endif /* INCLUDED_CODEC_CTRL_HPP */ diff --git a/host/lib/usrp/usrp2/dboard_iface.cpp b/host/lib/usrp/usrp2/dboard_iface.cpp new file mode 100644 index 000000000..d33a11fd6 --- /dev/null +++ b/host/lib/usrp/usrp2/dboard_iface.cpp @@ -0,0 +1,263 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include "usrp2_iface.hpp" +#include "clock_ctrl.hpp" +#include "usrp2_regs.hpp" //wishbone address constants +#include <uhd/usrp/dboard_iface.hpp> +#include <uhd/types/dict.hpp> +#include <uhd/utils/assert.hpp> +#include <boost/assign/list_of.hpp> +#include <boost/asio.hpp> //htonl and ntohl +#include <boost/math/special_functions/round.hpp> +#include "ad7922_regs.hpp" //aux adc +#include "ad5624_regs.hpp" //aux dac + +using namespace uhd; +using namespace uhd::usrp; +using namespace boost::assign; + +class usrp2_dboard_iface : public dboard_iface{ +public: + usrp2_dboard_iface(usrp2_iface::sptr iface, clock_ctrl::sptr clock_ctrl); + ~usrp2_dboard_iface(void); + + void write_aux_dac(unit_t, int, float); + float read_aux_adc(unit_t, int); + + void set_atr_reg(unit_t, atr_reg_t, boost::uint16_t); + void set_gpio_ddr(unit_t, boost::uint16_t); + boost::uint16_t read_gpio(unit_t); + + void write_i2c(boost::uint8_t, const byte_vector_t &); + byte_vector_t read_i2c(boost::uint8_t, size_t); + + double get_clock_rate(unit_t); + void set_clock_enabled(unit_t, bool); + bool get_clock_enabled(unit_t); + + void write_spi( + unit_t unit, + const spi_config_t &config, + boost::uint32_t data, + size_t num_bits + ); + + boost::uint32_t read_write_spi( + unit_t unit, + const spi_config_t &config, + boost::uint32_t data, + size_t num_bits + ); + +private: + usrp2_iface::sptr _iface; + clock_ctrl::sptr _clock_ctrl; + boost::uint32_t _ddr_shadow; + + uhd::dict<unit_t, ad5624_regs_t> _dac_regs; + void _write_aux_dac(unit_t); +}; + +/*********************************************************************** + * Make Function + **********************************************************************/ +dboard_iface::sptr make_usrp2_dboard_iface( + usrp2_iface::sptr iface, + clock_ctrl::sptr clock_ctrl +){ + return dboard_iface::sptr(new usrp2_dboard_iface(iface, clock_ctrl)); +} + +/*********************************************************************** + * Structors + **********************************************************************/ +usrp2_dboard_iface::usrp2_dboard_iface(usrp2_iface::sptr iface, clock_ctrl::sptr clock_ctrl){ + _iface = iface; + _clock_ctrl = clock_ctrl; + _ddr_shadow = 0; + + //set the selection mux to use atr + boost::uint32_t new_sels = 0x0; + for(size_t i = 0; i < 16; i++){ + new_sels |= FRF_GPIO_SEL_ATR << (i*2); + } + _iface->poke32(FR_GPIO_TX_SEL, new_sels); + _iface->poke32(FR_GPIO_RX_SEL, new_sels); + + //reset the aux dacs + _dac_regs[UNIT_RX] = ad5624_regs_t(); + _dac_regs[UNIT_TX] = ad5624_regs_t(); + BOOST_FOREACH(unit_t unit, _dac_regs.keys()){ + _dac_regs[unit].data = 1; + _dac_regs[unit].addr = ad5624_regs_t::ADDR_ALL; + _dac_regs[unit].cmd = ad5624_regs_t::CMD_RESET; + this->_write_aux_dac(unit); + } +} + +usrp2_dboard_iface::~usrp2_dboard_iface(void){ + /* NOP */ +} + +/*********************************************************************** + * Clocks + **********************************************************************/ +double usrp2_dboard_iface::get_clock_rate(unit_t){ + return _iface->get_master_clock_freq(); +} + +void usrp2_dboard_iface::set_clock_enabled(unit_t unit, bool enb){ + switch(unit){ + case UNIT_RX: _clock_ctrl->enable_rx_dboard_clock(enb); return; + case UNIT_TX: _clock_ctrl->enable_tx_dboard_clock(enb); return; + } +} + +/*********************************************************************** + * GPIO + **********************************************************************/ +static const uhd::dict<dboard_iface::unit_t, int> unit_to_shift = map_list_of + (dboard_iface::UNIT_RX, 0) + (dboard_iface::UNIT_TX, 16) +; + +void usrp2_dboard_iface::set_gpio_ddr(unit_t unit, boost::uint16_t value){ + _ddr_shadow = \ + (_ddr_shadow & ~(0xffff << unit_to_shift[unit])) | + (boost::uint32_t(value) << unit_to_shift[unit]); + _iface->poke32(FR_GPIO_DDR, _ddr_shadow); +} + +boost::uint16_t usrp2_dboard_iface::read_gpio(unit_t unit){ + return boost::uint16_t(_iface->peek32(FR_GPIO_IO) >> unit_to_shift[unit]); +} + +void usrp2_dboard_iface::set_atr_reg(unit_t unit, atr_reg_t atr, boost::uint16_t value){ + //define mapping of unit to atr regs to register address + static const uhd::dict< + unit_t, uhd::dict<atr_reg_t, boost::uint32_t> + > unit_to_atr_to_addr = map_list_of + (UNIT_RX, map_list_of + (ATR_REG_IDLE, FR_ATR_IDLE_RXSIDE) + (ATR_REG_TX_ONLY, FR_ATR_INTX_RXSIDE) + (ATR_REG_RX_ONLY, FR_ATR_INRX_RXSIDE) + (ATR_REG_FULL_DUPLEX, FR_ATR_FULL_RXSIDE) + ) + (UNIT_TX, map_list_of + (ATR_REG_IDLE, FR_ATR_IDLE_TXSIDE) + (ATR_REG_TX_ONLY, FR_ATR_INTX_TXSIDE) + (ATR_REG_RX_ONLY, FR_ATR_INRX_TXSIDE) + (ATR_REG_FULL_DUPLEX, FR_ATR_FULL_TXSIDE) + ) + ; + _iface->poke16(unit_to_atr_to_addr[unit][atr], value); +} + +/*********************************************************************** + * SPI + **********************************************************************/ +static const uhd::dict<dboard_iface::unit_t, int> unit_to_spi_dev = map_list_of + (dboard_iface::UNIT_TX, SPI_SS_TX_DB) + (dboard_iface::UNIT_RX, SPI_SS_RX_DB) +; + +void usrp2_dboard_iface::write_spi( + unit_t unit, + const spi_config_t &config, + boost::uint32_t data, + size_t num_bits +){ + _iface->transact_spi(unit_to_spi_dev[unit], config, data, num_bits, false /*no rb*/); +} + +boost::uint32_t usrp2_dboard_iface::read_write_spi( + unit_t unit, + const spi_config_t &config, + boost::uint32_t data, + size_t num_bits +){ + return _iface->transact_spi(unit_to_spi_dev[unit], config, data, num_bits, true /*rb*/); +} + +/*********************************************************************** + * I2C + **********************************************************************/ +void usrp2_dboard_iface::write_i2c(boost::uint8_t addr, const byte_vector_t &bytes){ + return _iface->write_i2c(addr, bytes); +} + +byte_vector_t usrp2_dboard_iface::read_i2c(boost::uint8_t addr, size_t num_bytes){ + return _iface->read_i2c(addr, num_bytes); +} + +/*********************************************************************** + * Aux DAX/ADC + **********************************************************************/ +void usrp2_dboard_iface::_write_aux_dac(unit_t unit){ + static const uhd::dict<unit_t, int> unit_to_spi_dac = map_list_of + (UNIT_RX, SPI_SS_RX_DAC) + (UNIT_TX, SPI_SS_TX_DAC) + ; + _iface->transact_spi( + unit_to_spi_dac[unit], spi_config_t::EDGE_FALL, + _dac_regs[unit].get_reg(), 24, false /*no rb*/ + ); +} + +void usrp2_dboard_iface::write_aux_dac(unit_t unit, int which, float value){ + _dac_regs[unit].data = boost::math::iround(4095*value/3.3); + _dac_regs[unit].cmd = ad5624_regs_t::CMD_WR_UP_DAC_CHAN_N; + switch(which){ + case 0: _dac_regs[unit].addr = ad5624_regs_t::ADDR_DAC_A; break; + case 1: _dac_regs[unit].addr = ad5624_regs_t::ADDR_DAC_B; break; + case 2: _dac_regs[unit].addr = ad5624_regs_t::ADDR_DAC_C; break; + case 3: _dac_regs[unit].addr = ad5624_regs_t::ADDR_DAC_D; break; + default: throw std::runtime_error("not a possible aux dac, must be 0, 1, 2, or 3"); + } + this->_write_aux_dac(unit); +} + +float usrp2_dboard_iface::read_aux_adc(unit_t unit, int which){ + static const uhd::dict<unit_t, int> unit_to_spi_adc = map_list_of + (UNIT_RX, SPI_SS_RX_ADC) + (UNIT_TX, SPI_SS_TX_ADC) + ; + + //setup spi config args + spi_config_t config; + config.mosi_edge = spi_config_t::EDGE_FALL; + config.miso_edge = spi_config_t::EDGE_RISE; + + //setup the spi registers + ad7922_regs_t ad7922_regs; + ad7922_regs.mod = which; //normal mode: mod == chn + ad7922_regs.chn = which; + + //write and read spi + _iface->transact_spi( + unit_to_spi_adc[unit], config, + ad7922_regs.get_reg(), 16, false /*no rb*/ + ); + ad7922_regs.set_reg(boost::uint16_t(_iface->transact_spi( + unit_to_spi_adc[unit], config, + ad7922_regs.get_reg(), 16, true /*rb*/ + ))); + + //convert to voltage and return + return float(3.3*ad7922_regs.result/4095); +} diff --git a/host/lib/usrp/usrp2/dboard_impl.cpp b/host/lib/usrp/usrp2/dboard_impl.cpp new file mode 100644 index 000000000..0f8a739f2 --- /dev/null +++ b/host/lib/usrp/usrp2/dboard_impl.cpp @@ -0,0 +1,193 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + + +#include "usrp2_impl.hpp" +#include "usrp2_regs.hpp" +#include <uhd/usrp/subdev_props.hpp> +#include <uhd/usrp/dboard_props.hpp> +#include <uhd/utils/assert.hpp> +#include <boost/format.hpp> +#include <boost/bind.hpp> +#include <boost/asio.hpp> //htonl and ntohl +#include <iostream> + +using namespace uhd; +using namespace uhd::usrp; + +/*********************************************************************** + * Helper Methods + **********************************************************************/ +void usrp2_impl::dboard_init(void){ + //read the dboard eeprom to extract the dboard ids + _rx_db_eeprom = dboard_eeprom_t(_iface->read_eeprom(I2C_ADDR_RX_DB, 0, dboard_eeprom_t::num_bytes())); + _tx_db_eeprom = dboard_eeprom_t(_iface->read_eeprom(I2C_ADDR_TX_DB, 0, dboard_eeprom_t::num_bytes())); + + //create a new dboard interface and manager + dboard_iface::sptr _dboard_iface( + make_usrp2_dboard_iface(_iface, _clock_ctrl) + ); + _dboard_manager = dboard_manager::make( + _rx_db_eeprom.id, _tx_db_eeprom.id, _dboard_iface + ); + + //load dboards + _rx_dboard_proxy = wax_obj_proxy::make( + boost::bind(&usrp2_impl::rx_dboard_get, this, _1, _2), + boost::bind(&usrp2_impl::rx_dboard_set, this, _1, _2) + ); + _tx_dboard_proxy = wax_obj_proxy::make( + boost::bind(&usrp2_impl::tx_dboard_get, this, _1, _2), + boost::bind(&usrp2_impl::tx_dboard_set, this, _1, _2) + ); + + //init the subdevs in use (use the first subdevice) + _rx_subdevs_in_use = prop_names_t(1, _dboard_manager->get_rx_subdev_names().at(0)); + update_rx_mux_config(); + + _tx_subdevs_in_use = prop_names_t(1, _dboard_manager->get_tx_subdev_names().at(0)); + update_tx_mux_config(); +} + +void usrp2_impl::update_rx_mux_config(void){ + //calculate the rx mux + boost::uint32_t rx_mux = 0; + UHD_ASSERT_THROW(_rx_subdevs_in_use.size() == 1); + wax::obj rx_subdev = _dboard_manager->get_rx_subdev(_rx_subdevs_in_use.at(0)); + std::cout << "Using: " << rx_subdev[SUBDEV_PROP_NAME].as<std::string>() << std::endl; + if (rx_subdev[SUBDEV_PROP_QUADRATURE].as<bool>()){ + rx_mux = (0x01 << 2) | (0x00 << 0); //Q=ADC1, I=ADC0 + }else{ + rx_mux = 0x00; //ADC0 + } + if (rx_subdev[SUBDEV_PROP_IQ_SWAPPED].as<bool>()){ + rx_mux = (((rx_mux >> 0) & 0x3) << 2) | (((rx_mux >> 2) & 0x3) << 0); + } + + _iface->poke32(FR_DSP_RX_MUX, rx_mux); +} + +void usrp2_impl::update_tx_mux_config(void){ + //calculate the tx mux + boost::uint32_t tx_mux = 0x10; + UHD_ASSERT_THROW(_tx_subdevs_in_use.size() == 1); + wax::obj tx_subdev = _dboard_manager->get_tx_subdev(_tx_subdevs_in_use.at(0)); + std::cout << "Using: " << tx_subdev[SUBDEV_PROP_NAME].as<std::string>() << std::endl; + if (tx_subdev[SUBDEV_PROP_IQ_SWAPPED].as<bool>()){ + tx_mux = (((tx_mux >> 0) & 0xf) << 4) | (((tx_mux >> 4) & 0xf) << 0); + } + + _iface->poke32(FR_DSP_TX_MUX, tx_mux); +} + +/*********************************************************************** + * RX DBoard Properties + **********************************************************************/ +void usrp2_impl::rx_dboard_get(const wax::obj &key_, wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<dboard_prop_t>()){ + case DBOARD_PROP_NAME: + val = std::string("usrp2 dboard (rx unit)"); + return; + + case DBOARD_PROP_SUBDEV: + val = _dboard_manager->get_rx_subdev(name); + return; + + case DBOARD_PROP_SUBDEV_NAMES: + val = _dboard_manager->get_rx_subdev_names(); + return; + + case DBOARD_PROP_USED_SUBDEVS: + val = _rx_subdevs_in_use; + return; + + case DBOARD_PROP_DBOARD_ID: + val = _rx_db_eeprom.id; + return; + + default: UHD_THROW_PROP_GET_ERROR(); + } +} + +void usrp2_impl::rx_dboard_set(const wax::obj &key, const wax::obj &val){ + switch(key.as<dboard_prop_t>()){ + case DBOARD_PROP_USED_SUBDEVS: + _rx_subdevs_in_use = val.as<prop_names_t>(); + update_rx_mux_config(); //if the val is bad, this will throw + return; + + case DBOARD_PROP_DBOARD_ID: + _rx_db_eeprom.id = val.as<dboard_id_t>(); + _iface->write_eeprom(I2C_ADDR_RX_DB, 0, _rx_db_eeprom.get_eeprom_bytes()); + return; + + default: UHD_THROW_PROP_SET_ERROR(); + } +} + +/*********************************************************************** + * TX DBoard Properties + **********************************************************************/ +void usrp2_impl::tx_dboard_get(const wax::obj &key_, wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<dboard_prop_t>()){ + case DBOARD_PROP_NAME: + val = std::string("usrp2 dboard (tx unit)"); + return; + + case DBOARD_PROP_SUBDEV: + val = _dboard_manager->get_tx_subdev(name); + return; + + case DBOARD_PROP_SUBDEV_NAMES: + val = _dboard_manager->get_tx_subdev_names(); + return; + + case DBOARD_PROP_USED_SUBDEVS: + val = _tx_subdevs_in_use; + return; + + case DBOARD_PROP_DBOARD_ID: + val = _tx_db_eeprom.id; + return; + + default: UHD_THROW_PROP_GET_ERROR(); + } +} + +void usrp2_impl::tx_dboard_set(const wax::obj &key, const wax::obj &val){ + switch(key.as<dboard_prop_t>()){ + case DBOARD_PROP_USED_SUBDEVS: + _tx_subdevs_in_use = val.as<prop_names_t>(); + update_tx_mux_config(); //if the val is bad, this will throw + return; + + case DBOARD_PROP_DBOARD_ID: + _tx_db_eeprom.id = val.as<dboard_id_t>(); + _iface->write_eeprom(I2C_ADDR_TX_DB, 0, _tx_db_eeprom.get_eeprom_bytes()); + return; + + default: UHD_THROW_PROP_SET_ERROR(); + } +} diff --git a/host/lib/usrp/usrp2/dsp_impl.cpp b/host/lib/usrp/usrp2/dsp_impl.cpp new file mode 100644 index 000000000..195a9bc53 --- /dev/null +++ b/host/lib/usrp/usrp2/dsp_impl.cpp @@ -0,0 +1,243 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include "usrp2_impl.hpp" +#include "usrp2_regs.hpp" +#include <uhd/usrp/dsp_props.hpp> +#include <uhd/utils/assert.hpp> +#include <boost/format.hpp> +#include <boost/bind.hpp> +#include <boost/assign/list_of.hpp> +#include <boost/math/special_functions/round.hpp> + +using namespace uhd; +using namespace uhd::usrp; + +static const size_t default_decim = 16; +static const size_t default_interp = 16; + +#define rint boost::math::iround + +template <class T> T log2(T num){ + return std::log(num)/std::log(T(2)); +} + +/*********************************************************************** + * DDC Helper Methods + **********************************************************************/ +static boost::uint32_t calculate_freq_word_and_update_actual_freq(double &freq, double clock_freq){ + UHD_ASSERT_THROW(std::abs(freq) < clock_freq/2.0); + static const double scale_factor = std::pow(2.0, 32); + + //calculate the freq register word + boost::uint32_t freq_word = rint((freq / clock_freq) * scale_factor); + + //update the actual frequency + freq = (double(freq_word) / scale_factor) * clock_freq; + + return freq_word; +} + +// Check if requested decim/interp rate is: +// multiple of 4, enable two halfband filters +// multiple of 2, enable one halfband filter +// handle remainder in CIC +static boost::uint32_t calculate_cic_word(size_t rate){ + int hb0 = 0, hb1 = 0; + if (not (rate & 0x1)){ + hb0 = 1; + rate /= 2; + } + if (not (rate & 0x1)){ + hb1 = 1; + rate /= 2; + } + return (hb1 << 9) | (hb0 << 8) | (rate & 0xff); +} + +static boost::uint32_t calculate_iq_scale_word(boost::int16_t i, boost::int16_t q){ + return (boost::uint16_t(i) << 16) | (boost::uint16_t(q) << 0); +} + +template <class rate_t> static rate_t +pick_closest_rate(double exact_rate, const std::vector<rate_t> &rates){ + rate_t closest_match = rates.at(0); + BOOST_FOREACH(rate_t possible_rate, rates){ + if(std::abs(exact_rate - possible_rate) < std::abs(exact_rate - closest_match)) + closest_match = possible_rate; + } + return closest_match; +} + +void usrp2_impl::init_ddc_config(void){ + //create the ddc in the rx dsp dict + _rx_dsp_proxy = wax_obj_proxy::make( + boost::bind(&usrp2_impl::ddc_get, this, _1, _2), + boost::bind(&usrp2_impl::ddc_set, this, _1, _2) + ); + + //initial config and update + _ddc_decim = default_decim; + _ddc_freq = 0; + update_ddc_config(); +} + +void usrp2_impl::update_ddc_config(void){ + //set the decimation + _iface->poke32(FR_DSP_RX_DECIM_RATE, calculate_cic_word(_ddc_decim)); + + //set the scaling + static const boost::int16_t default_rx_scale_iq = 1024; + _iface->poke32(FR_DSP_RX_SCALE_IQ, + calculate_iq_scale_word(default_rx_scale_iq, default_rx_scale_iq) + ); +} + +/*********************************************************************** + * DDC Properties + **********************************************************************/ +void usrp2_impl::ddc_get(const wax::obj &key, wax::obj &val){ + switch(key.as<dsp_prop_t>()){ + case DSP_PROP_NAME: + val = std::string("usrp2 ddc0"); + return; + + case DSP_PROP_OTHERS: + val = prop_names_t(); //empty + return; + + case DSP_PROP_FREQ_SHIFT: + val = _ddc_freq; + return; + + case DSP_PROP_CODEC_RATE: + val = get_master_clock_freq(); + return; + + case DSP_PROP_HOST_RATE: + val = get_master_clock_freq()/_ddc_decim; + return; + + default: UHD_THROW_PROP_GET_ERROR(); + } +} + +void usrp2_impl::ddc_set(const wax::obj &key, const wax::obj &val){ + switch(key.as<dsp_prop_t>()){ + + case DSP_PROP_FREQ_SHIFT:{ + double new_freq = val.as<double>(); + _iface->poke32(FR_DSP_RX_FREQ, + calculate_freq_word_and_update_actual_freq(new_freq, get_master_clock_freq()) + ); + _ddc_freq = new_freq; //shadow + } + return; + + case DSP_PROP_HOST_RATE:{ + double extact_rate = get_master_clock_freq()/val.as<double>(); + _ddc_decim = pick_closest_rate(extact_rate, _allowed_decim_and_interp_rates); + update_ddc_config(); + } + return; + + default: UHD_THROW_PROP_SET_ERROR(); + } +} + +/*********************************************************************** + * DUC Helper Methods + **********************************************************************/ +void usrp2_impl::init_duc_config(void){ + //create the duc in the tx dsp dict + _tx_dsp_proxy = wax_obj_proxy::make( + boost::bind(&usrp2_impl::duc_get, this, _1, _2), + boost::bind(&usrp2_impl::duc_set, this, _1, _2) + ); + + //initial config and update + _duc_interp = default_interp; + _duc_freq = 0; + update_duc_config(); +} + +void usrp2_impl::update_duc_config(void){ + // Calculate CIC interpolation (i.e., without halfband interpolators) + size_t tmp_interp = calculate_cic_word(_duc_interp) & 0xff; + + // Calculate closest multiplier constant to reverse gain absent scale multipliers + double interp_cubed = std::pow(double(tmp_interp), 3); + boost::int16_t scale = rint((4096*std::pow(2, ceil(log2(interp_cubed))))/(1.65*interp_cubed)); + + //set the interpolation + _iface->poke32(FR_DSP_TX_INTERP_RATE, calculate_cic_word(_duc_interp)); + + //set the scaling + _iface->poke32(FR_DSP_TX_SCALE_IQ, calculate_iq_scale_word(scale, scale)); +} + +/*********************************************************************** + * DUC Properties + **********************************************************************/ +void usrp2_impl::duc_get(const wax::obj &key, wax::obj &val){ + switch(key.as<dsp_prop_t>()){ + case DSP_PROP_NAME: + val = std::string("usrp2 duc0"); + return; + + case DSP_PROP_OTHERS: + val = prop_names_t(); //empty + return; + + case DSP_PROP_FREQ_SHIFT: + val = _duc_freq; + return; + + case DSP_PROP_CODEC_RATE: + val = get_master_clock_freq(); + return; + + case DSP_PROP_HOST_RATE: + val = get_master_clock_freq()/_duc_interp; + return; + + default: UHD_THROW_PROP_GET_ERROR(); + } +} + +void usrp2_impl::duc_set(const wax::obj &key, const wax::obj &val){ + switch(key.as<dsp_prop_t>()){ + + case DSP_PROP_FREQ_SHIFT:{ + double new_freq = val.as<double>(); + _iface->poke32(FR_DSP_TX_FREQ, + calculate_freq_word_and_update_actual_freq(new_freq, get_master_clock_freq()) + ); + _duc_freq = new_freq; //shadow + } + return; + + case DSP_PROP_HOST_RATE:{ + double extact_rate = get_master_clock_freq()/val.as<double>(); + _duc_interp = pick_closest_rate(extact_rate, _allowed_decim_and_interp_rates); + update_duc_config(); + } + return; + + default: UHD_THROW_PROP_SET_ERROR(); + } +} diff --git a/host/lib/usrp/usrp2/fw_common.h b/host/lib/usrp/usrp2/fw_common.h new file mode 100644 index 000000000..75f5b1779 --- /dev/null +++ b/host/lib/usrp/usrp2/fw_common.h @@ -0,0 +1,119 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#ifndef INCLUDED_USRP2_FW_COMMON_H +#define INCLUDED_USRP2_FW_COMMON_H + +/*! + * Structs and constants for usrp2 communication. + * This header is shared by the firmware and host code. + * Therefore, this header may only contain valid C code. + */ +#ifdef __cplusplus +#include <boost/cstdint.hpp> +#define _SINS_ boost:://stdint namespace when in c++ +extern "C" { +#else +#include <stdint.h> +#define _SINS_ +#endif + +//defines the protocol version in this shared header +//increment this value when the protocol is changed +#define USRP2_PROTO_VERSION 3 + +//used to differentiate control packets over data port +#define USRP2_INVALID_VRT_HEADER 0 + +// size of the vrt header and trailer to the host +#define USRP2_HOST_RX_VRT_HEADER_WORDS32 5 +#define USRP2_HOST_RX_VRT_TRAILER_WORDS32 1 //FIXME fpga sets wrong header size when no trailer present + +// udp ports for the usrp2 communication +// Dynamic and/or private ports: 49152-65535 +#define USRP2_UDP_CTRL_PORT 49152 +#define USRP2_UDP_DATA_PORT 49153 + +typedef enum{ + USRP2_CTRL_ID_HUH_WHAT = ' ', + //USRP2_CTRL_ID_FOR_SURE, //TODO error condition enums + //USRP2_CTRL_ID_SUX_MAN, + + USRP2_CTRL_ID_WAZZUP_BRO = 'a', + USRP2_CTRL_ID_WAZZUP_DUDE = 'A', + + USRP2_CTRL_ID_TRANSACT_ME_SOME_SPI_BRO = 's', + USRP2_CTRL_ID_OMG_TRANSACTED_SPI_DUDE = 'S', + + USRP2_CTRL_ID_DO_AN_I2C_READ_FOR_ME_BRO = 'i', + USRP2_CTRL_ID_HERES_THE_I2C_DATA_DUDE = 'I', + + USRP2_CTRL_ID_WRITE_THESE_I2C_VALUES_BRO = 'h', + USRP2_CTRL_ID_COOL_IM_DONE_I2C_WRITE_DUDE = 'H', + + USRP2_CTRL_ID_POKE_THIS_REGISTER_FOR_ME_BRO = 'p', + USRP2_CTRL_ID_OMG_POKED_REGISTER_SO_BAD_DUDE = 'P', + + USRP2_CTRL_ID_PEEK_AT_THIS_REGISTER_FOR_ME_BRO = 'r', + USRP2_CTRL_ID_WOAH_I_DEFINITELY_PEEKED_IT_DUDE = 'R', + + USRP2_CTRL_ID_PEACE_OUT = '~' + +} usrp2_ctrl_id_t; + +typedef enum{ + USRP2_DIR_RX = 'r', + USRP2_DIR_TX = 't' +} usrp2_dir_which_t; + +typedef enum{ + USRP2_CLK_EDGE_RISE = 'r', + USRP2_CLK_EDGE_FALL = 'f' +} usrp2_clk_edge_t; + +typedef struct{ + _SINS_ uint32_t proto_ver; + _SINS_ uint32_t id; + _SINS_ uint32_t seq; + union{ + _SINS_ uint32_t ip_addr; + struct { + _SINS_ uint8_t dev; + _SINS_ uint8_t miso_edge; + _SINS_ uint8_t mosi_edge; + _SINS_ uint8_t readback; + _SINS_ uint32_t data; + _SINS_ uint8_t num_bits; + } spi_args; + struct { + _SINS_ uint8_t addr; + _SINS_ uint8_t bytes; + _SINS_ uint8_t data[sizeof(_SINS_ uint32_t)]; + } i2c_args; + struct { + _SINS_ uint32_t addr; + _SINS_ uint32_t data; + _SINS_ uint8_t num_bytes; //1, 2, 4 + } poke_args; + } data; +} usrp2_ctrl_data_t; + +#ifdef __cplusplus +} +#endif + +#endif /* INCLUDED_USRP2_FW_COMMON_H */ diff --git a/host/lib/usrp/usrp2/io_impl.cpp b/host/lib/usrp/usrp2/io_impl.cpp new file mode 100644 index 000000000..b6ab919e7 --- /dev/null +++ b/host/lib/usrp/usrp2/io_impl.cpp @@ -0,0 +1,100 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include "usrp2_impl.hpp" +#include "usrp2_regs.hpp" +#include <uhd/transport/convert_types.hpp> +#include <boost/format.hpp> +#include <boost/asio.hpp> //htonl and ntohl +#include <iostream> + +using namespace uhd; +using namespace uhd::usrp; +using namespace uhd::transport; +namespace asio = boost::asio; + +/*********************************************************************** + * Helper Functions + **********************************************************************/ +void usrp2_impl::io_init(void){ + //setup rx otw type + _rx_otw_type.width = 16; + _rx_otw_type.shift = 0; + _rx_otw_type.byteorder = otw_type_t::BO_BIG_ENDIAN; + + //setup tx otw type + _tx_otw_type.width = 16; + _tx_otw_type.shift = 0; + _tx_otw_type.byteorder = otw_type_t::BO_BIG_ENDIAN; + + //send a small data packet so the usrp2 knows the udp source port + managed_send_buffer::sptr send_buff = _data_transport->get_send_buff(); + boost::uint32_t data = htonl(USRP2_INVALID_VRT_HEADER); + memcpy(send_buff->cast<void*>(), &data, sizeof(data)); + send_buff->done(sizeof(data)); + + //setup RX DSP regs + std::cout << "RX samples per packet: " << get_max_recv_samps_per_packet() << std::endl; + _iface->poke32(FR_RX_CTRL_NSAMPS_PER_PKT, get_max_recv_samps_per_packet()); + _iface->poke32(FR_RX_CTRL_NCHANNELS, 1); + _iface->poke32(FR_RX_CTRL_CLEAR_OVERRUN, 1); //reset + _iface->poke32(FR_RX_CTRL_VRT_HEADER, 0 + | (0x1 << 28) //if data with stream id + | (0x1 << 26) //has trailer + | (0x3 << 22) //integer time other + | (0x1 << 20) //fractional time sample count + ); + _iface->poke32(FR_RX_CTRL_VRT_STREAM_ID, 0); + _iface->poke32(FR_RX_CTRL_VRT_TRAILER, 0); +} + +/*********************************************************************** + * Send Data + **********************************************************************/ +size_t usrp2_impl::send( + const asio::const_buffer &buff, + const tx_metadata_t &metadata, + const io_type_t &io_type, + send_mode_t send_mode +){ + return vrt_packet_handler::send( + _packet_handler_send_state, //last state of the send handler + buff, metadata, send_mode, //buffer to empty and samples metadata + io_type, _tx_otw_type, //input and output types to convert + get_master_clock_freq(), //master clock tick rate + _data_transport, //zero copy interface + get_max_send_samps_per_packet() + ); +} + +/*********************************************************************** + * Receive Data + **********************************************************************/ +size_t usrp2_impl::recv( + const asio::mutable_buffer &buff, + rx_metadata_t &metadata, + const io_type_t &io_type, + recv_mode_t recv_mode +){ + return vrt_packet_handler::recv( + _packet_handler_recv_state, //last state of the recv handler + buff, metadata, recv_mode, //buffer to fill and samples metadata + io_type, _rx_otw_type, //input and output types to convert + get_master_clock_freq(), //master clock tick rate + _data_transport //zero copy interface + ); +} diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp new file mode 100644 index 000000000..f17efd88e --- /dev/null +++ b/host/lib/usrp/usrp2/mboard_impl.cpp @@ -0,0 +1,247 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include "usrp2_impl.hpp" +#include "usrp2_regs.hpp" +#include <uhd/usrp/mboard_props.hpp> +#include <uhd/utils/assert.hpp> +#include <uhd/utils/algorithm.hpp> +#include <uhd/types/mac_addr.hpp> +#include <uhd/types/dict.hpp> +#include <boost/bind.hpp> +#include <boost/asio/ip/address_v4.hpp> +#include <boost/assign/list_of.hpp> + +using namespace uhd; +using namespace uhd::usrp; + +/*********************************************************************** + * Helper Methods + **********************************************************************/ +void usrp2_impl::mboard_init(void){ + _mboard_proxy = wax_obj_proxy::make( + boost::bind(&usrp2_impl::mboard_get, this, _1, _2), + boost::bind(&usrp2_impl::mboard_set, this, _1, _2) + ); +} + +void usrp2_impl::init_clock_config(void){ + //setup the clock configuration settings + _clock_config.ref_source = clock_config_t::REF_INT; + _clock_config.pps_source = clock_config_t::PPS_SMA; + _clock_config.pps_polarity = clock_config_t::PPS_NEG; + + //update the clock config (sends a control packet) + update_clock_config(); +} + +void usrp2_impl::update_clock_config(void){ + boost::uint32_t pps_flags = 0; + + //translate pps source enums + switch(_clock_config.pps_source){ + case clock_config_t::PPS_SMA: pps_flags |= FRF_TIME64_PPS_SMA; break; + case clock_config_t::PPS_MIMO: pps_flags |= FRF_TIME64_PPS_MIMO; break; + default: throw std::runtime_error("usrp2: unhandled clock configuration pps source"); + } + + //translate pps polarity enums + switch(_clock_config.pps_polarity){ + case clock_config_t::PPS_POS: pps_flags |= FRF_TIME64_PPS_POSEDGE; break; + case clock_config_t::PPS_NEG: pps_flags |= FRF_TIME64_PPS_NEGEDGE; break; + default: throw std::runtime_error("usrp2: unhandled clock configuration pps polarity"); + } + + //set the pps flags + _iface->poke32(FR_TIME64_FLAGS, pps_flags); + + //clock source ref 10mhz + switch(_clock_config.ref_source){ + case clock_config_t::REF_INT : _iface->poke32(FR_MISC_CTRL_CLOCK, 0x10); break; + case clock_config_t::REF_SMA : _iface->poke32(FR_MISC_CTRL_CLOCK, 0x1C); break; + case clock_config_t::REF_MIMO: _iface->poke32(FR_MISC_CTRL_CLOCK, 0x15); break; + default: throw std::runtime_error("usrp2: unhandled clock configuration reference source"); + } + + //clock source ref 10mhz + bool use_external = _clock_config.ref_source != clock_config_t::REF_INT; + _clock_ctrl->enable_external_ref(use_external); +} + +void usrp2_impl::set_time_spec(const time_spec_t &time_spec, bool now){ + //set ticks and seconds + _iface->poke32(FR_TIME64_SECS, time_spec.secs); + _iface->poke32(FR_TIME64_TICKS, time_spec.get_ticks(get_master_clock_freq())); + + //set the register to latch it all in + boost::uint32_t imm_flags = (now)? FRF_TIME64_LATCH_NOW : FRF_TIME64_LATCH_NEXT_PPS; + _iface->poke32(FR_TIME64_IMM, imm_flags); +} + +void usrp2_impl::issue_ddc_stream_cmd(const stream_cmd_t &stream_cmd){ + UHD_ASSERT_THROW(stream_cmd.num_samps <= FR_RX_CTRL_MAX_SAMPS_PER_CMD); + + //setup the mode to instruction flags + typedef boost::tuple<bool, bool, bool> inst_t; + static const uhd::dict<stream_cmd_t::stream_mode_t, inst_t> mode_to_inst = boost::assign::map_list_of + //reload, chain, samps + (stream_cmd_t::STREAM_MODE_START_CONTINUOUS, inst_t(true, true, false)) + (stream_cmd_t::STREAM_MODE_STOP_CONTINUOUS, inst_t(false, false, false)) + (stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_DONE, inst_t(false, false, true)) + (stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_MORE, inst_t(false, true, true)) + ; + + //setup the instruction flag values + bool inst_reload, inst_chain, inst_samps; + boost::tie(inst_reload, inst_chain, inst_samps) = mode_to_inst[stream_cmd.stream_mode]; + + //issue the stream command + _iface->poke32(FR_RX_CTRL_STREAM_CMD, FR_RX_CTRL_MAKE_CMD( + (inst_samps)? stream_cmd.num_samps : ((inst_chain)? get_max_recv_samps_per_packet() : 1), + (stream_cmd.stream_now)? 1 : 0, + (inst_chain)? 1 : 0, + (inst_reload)? 1 : 0 + )); + _iface->poke32(FR_RX_CTRL_TIME_SECS, stream_cmd.time_spec.secs); + _iface->poke32(FR_RX_CTRL_TIME_TICKS, stream_cmd.time_spec.get_ticks(get_master_clock_freq())); +} + +/*********************************************************************** + * MBoard Get Properties + **********************************************************************/ +void usrp2_impl::mboard_get(const wax::obj &key_, wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the other props + if (key.type() == typeid(std::string)){ + if (key.as<std::string>() == "mac-addr"){ + byte_vector_t bytes = _iface->read_eeprom(I2C_ADDR_MBOARD, EE_MBOARD_MAC_ADDR, 6); + val = mac_addr_t::from_bytes(bytes).to_string(); + return; + } + + if (key.as<std::string>() == "ip-addr"){ + boost::asio::ip::address_v4::bytes_type bytes; + std::copy(_iface->read_eeprom(I2C_ADDR_MBOARD, EE_MBOARD_IP_ADDR, 4), bytes); + val = boost::asio::ip::address_v4(bytes).to_string(); + return; + } + } + + //handle the get request conditioned on the key + switch(key.as<mboard_prop_t>()){ + case MBOARD_PROP_NAME: + val = std::string("usrp2 mboard"); + return; + + case MBOARD_PROP_OTHERS:{ + prop_names_t others = boost::assign::list_of + ("mac-addr") + ("ip-addr") + ; + val = others; + } + return; + + case MBOARD_PROP_RX_DBOARD: + UHD_ASSERT_THROW(name == ""); + val = _rx_dboard_proxy->get_link(); + return; + + case MBOARD_PROP_RX_DBOARD_NAMES: + val = prop_names_t(1, ""); + return; + + case MBOARD_PROP_TX_DBOARD: + UHD_ASSERT_THROW(name == ""); + val = _tx_dboard_proxy->get_link(); + return; + + case MBOARD_PROP_TX_DBOARD_NAMES: + val = prop_names_t(1, ""); + return; + + case MBOARD_PROP_RX_DSP: + UHD_ASSERT_THROW(name == ""); + val = _rx_dsp_proxy->get_link(); + return; + + case MBOARD_PROP_RX_DSP_NAMES: + val = prop_names_t(1, ""); + return; + + case MBOARD_PROP_TX_DSP: + UHD_ASSERT_THROW(name == ""); + val = _tx_dsp_proxy->get_link(); + return; + + case MBOARD_PROP_TX_DSP_NAMES: + val = prop_names_t(1, ""); + return; + + case MBOARD_PROP_CLOCK_CONFIG: + val = _clock_config; + return; + + default: UHD_THROW_PROP_GET_ERROR(); + } +} + +/*********************************************************************** + * MBoard Set Properties + **********************************************************************/ +void usrp2_impl::mboard_set(const wax::obj &key, const wax::obj &val){ + //handle the other props + if (key.type() == typeid(std::string)){ + if (key.as<std::string>() == "mac-addr"){ + byte_vector_t bytes = mac_addr_t::from_string(val.as<std::string>()).to_bytes(); + _iface->write_eeprom(I2C_ADDR_MBOARD, EE_MBOARD_MAC_ADDR, bytes); + return; + } + + if (key.as<std::string>() == "ip-addr"){ + byte_vector_t bytes(4); + std::copy(boost::asio::ip::address_v4::from_string(val.as<std::string>()).to_bytes(), bytes); + _iface->write_eeprom(I2C_ADDR_MBOARD, EE_MBOARD_IP_ADDR, bytes); + return; + } + } + + //handle the get request conditioned on the key + switch(key.as<mboard_prop_t>()){ + + case MBOARD_PROP_CLOCK_CONFIG: + _clock_config = val.as<clock_config_t>(); + update_clock_config(); + return; + + case MBOARD_PROP_TIME_NOW: + set_time_spec(val.as<time_spec_t>(), true); + return; + + case MBOARD_PROP_TIME_NEXT_PPS: + set_time_spec(val.as<time_spec_t>(), false); + return; + + case MBOARD_PROP_STREAM_CMD: + issue_ddc_stream_cmd(val.as<stream_cmd_t>()); + return; + + default: UHD_THROW_PROP_SET_ERROR(); + } +} diff --git a/host/lib/usrp/usrp2/serdes_ctrl.cpp b/host/lib/usrp/usrp2/serdes_ctrl.cpp new file mode 100644 index 000000000..dde22b499 --- /dev/null +++ b/host/lib/usrp/usrp2/serdes_ctrl.cpp @@ -0,0 +1,46 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include "serdes_ctrl.hpp" +#include "usrp2_regs.hpp" + +using namespace uhd; + +/*! + * A usrp2 serdes control implementation + */ +class serdes_ctrl_impl : public serdes_ctrl{ +public: + serdes_ctrl_impl(usrp2_iface::sptr iface){ + _iface = iface; + _iface->poke32(FR_MISC_CTRL_SERDES, FRF_MISC_CTRL_SERDES_ENABLE | FRF_MISC_CTRL_SERDES_RXEN); + } + + ~serdes_ctrl_impl(void){ + _iface->poke32(FR_MISC_CTRL_SERDES, 0); //power-down + } + +private: + usrp2_iface::sptr _iface; +}; + +/*********************************************************************** + * Public make function for the usrp2 serdes control + **********************************************************************/ +serdes_ctrl::sptr serdes_ctrl::make(usrp2_iface::sptr iface){ + return sptr(new serdes_ctrl_impl(iface)); +} diff --git a/host/lib/usrp/usrp2/serdes_ctrl.hpp b/host/lib/usrp/usrp2/serdes_ctrl.hpp new file mode 100644 index 000000000..586238739 --- /dev/null +++ b/host/lib/usrp/usrp2/serdes_ctrl.hpp @@ -0,0 +1,40 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#ifndef INCLUDED_SERDES_CTRL_HPP +#define INCLUDED_SERDES_CTRL_HPP + +#include "usrp2_iface.hpp" +#include <boost/shared_ptr.hpp> +#include <boost/utility.hpp> + +class serdes_ctrl : boost::noncopyable{ +public: + typedef boost::shared_ptr<serdes_ctrl> sptr; + + /*! + * Make a serdes control object for the usrp2 serdes port. + * \param _iface a pointer to the usrp2 interface object + * \return a new serdes control object + */ + static sptr make(usrp2_iface::sptr iface); + + //TODO fill me in with virtual methods + +}; + +#endif /* INCLUDED_SERDES_CTRL_HPP */ diff --git a/host/lib/usrp/usrp2/usrp2_iface.cpp b/host/lib/usrp/usrp2/usrp2_iface.cpp new file mode 100644 index 000000000..e43b9678e --- /dev/null +++ b/host/lib/usrp/usrp2/usrp2_iface.cpp @@ -0,0 +1,219 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include "usrp2_iface.hpp" +#include <uhd/utils/assert.hpp> +#include <uhd/types/dict.hpp> +#include <boost/thread.hpp> +#include <boost/foreach.hpp> +#include <boost/asio.hpp> //used for htonl and ntohl +#include <boost/assign/list_of.hpp> +#include <stdexcept> +#include <algorithm> + +using namespace uhd; + +class usrp2_iface_impl : public usrp2_iface{ +public: +/*********************************************************************** + * Structors + **********************************************************************/ + usrp2_iface_impl(transport::udp_simple::sptr ctrl_transport){ + _ctrl_transport = ctrl_transport; + } + + ~usrp2_iface_impl(void){ + /* NOP */ + } + +/*********************************************************************** + * Peek and Poke + **********************************************************************/ + void poke32(boost::uint32_t addr, boost::uint32_t data){ + return this->poke<boost::uint32_t>(addr, data); + } + + boost::uint32_t peek32(boost::uint32_t addr){ + return this->peek<boost::uint32_t>(addr); + } + + void poke16(boost::uint32_t addr, boost::uint16_t data){ + return this->poke<boost::uint16_t>(addr, data); + } + + boost::uint16_t peek16(boost::uint32_t addr){ + return this->peek<boost::uint16_t>(addr); + } + +/*********************************************************************** + * SPI + **********************************************************************/ + boost::uint32_t transact_spi( + int which_slave, + const spi_config_t &config, + boost::uint32_t data, + size_t num_bits, + bool readback + ){ + static const uhd::dict<spi_config_t::edge_t, int> spi_edge_to_otw = boost::assign::map_list_of + (spi_config_t::EDGE_RISE, USRP2_CLK_EDGE_RISE) + (spi_config_t::EDGE_FALL, USRP2_CLK_EDGE_FALL) + ; + + //setup the out data + usrp2_ctrl_data_t out_data; + out_data.id = htonl(USRP2_CTRL_ID_TRANSACT_ME_SOME_SPI_BRO); + out_data.data.spi_args.dev = which_slave; + out_data.data.spi_args.miso_edge = spi_edge_to_otw[config.miso_edge]; + out_data.data.spi_args.mosi_edge = spi_edge_to_otw[config.mosi_edge]; + out_data.data.spi_args.readback = (readback)? 1 : 0; + out_data.data.spi_args.num_bits = num_bits; + out_data.data.spi_args.data = htonl(data); + + //send and recv + usrp2_ctrl_data_t in_data = this->ctrl_send_and_recv(out_data); + UHD_ASSERT_THROW(htonl(in_data.id) == USRP2_CTRL_ID_OMG_TRANSACTED_SPI_DUDE); + + return ntohl(in_data.data.spi_args.data); + } + +/*********************************************************************** + * I2C + **********************************************************************/ + void write_i2c(boost::uint8_t addr, const byte_vector_t &buf){ + //setup the out data + usrp2_ctrl_data_t out_data; + out_data.id = htonl(USRP2_CTRL_ID_WRITE_THESE_I2C_VALUES_BRO); + out_data.data.i2c_args.addr = addr; + out_data.data.i2c_args.bytes = buf.size(); + + //limitation of i2c transaction size + UHD_ASSERT_THROW(buf.size() <= sizeof(out_data.data.i2c_args.data)); + + //copy in the data + std::copy(buf.begin(), buf.end(), out_data.data.i2c_args.data); + + //send and recv + usrp2_ctrl_data_t in_data = this->ctrl_send_and_recv(out_data); + UHD_ASSERT_THROW(htonl(in_data.id) == USRP2_CTRL_ID_COOL_IM_DONE_I2C_WRITE_DUDE); + } + + byte_vector_t read_i2c(boost::uint8_t addr, size_t num_bytes){ + //setup the out data + usrp2_ctrl_data_t out_data; + out_data.id = htonl(USRP2_CTRL_ID_DO_AN_I2C_READ_FOR_ME_BRO); + out_data.data.i2c_args.addr = addr; + out_data.data.i2c_args.bytes = num_bytes; + + //limitation of i2c transaction size + UHD_ASSERT_THROW(num_bytes <= sizeof(out_data.data.i2c_args.data)); + + //send and recv + usrp2_ctrl_data_t in_data = this->ctrl_send_and_recv(out_data); + UHD_ASSERT_THROW(htonl(in_data.id) == USRP2_CTRL_ID_HERES_THE_I2C_DATA_DUDE); + UHD_ASSERT_THROW(in_data.data.i2c_args.addr = num_bytes); + + //copy out the data + byte_vector_t result(num_bytes); + std::copy(in_data.data.i2c_args.data, in_data.data.i2c_args.data + num_bytes, result.begin()); + return result; + } + +/*********************************************************************** + * Send/Recv over control + **********************************************************************/ + usrp2_ctrl_data_t ctrl_send_and_recv(const usrp2_ctrl_data_t &out_data){ + boost::mutex::scoped_lock lock(_ctrl_mutex); + + //fill in the seq number and send + usrp2_ctrl_data_t out_copy = out_data; + out_copy.proto_ver = htonl(USRP2_PROTO_VERSION); + out_copy.seq = htonl(++_ctrl_seq_num); + _ctrl_transport->send(boost::asio::buffer(&out_copy, sizeof(usrp2_ctrl_data_t))); + + //loop until we get the packet or timeout + while(true){ + usrp2_ctrl_data_t in_data; + size_t len = _ctrl_transport->recv(boost::asio::buffer(&in_data, sizeof(in_data))); + if(len >= sizeof(boost::uint32_t) and ntohl(in_data.proto_ver) != USRP2_PROTO_VERSION){ + throw std::runtime_error(str( + boost::format("Expected protocol version %d, but got %d\n" + "The firmware build does not match the host code build." + ) % int(USRP2_PROTO_VERSION) % ntohl(in_data.proto_ver) + )); + } + if (len >= sizeof(usrp2_ctrl_data_t) and ntohl(in_data.seq) == _ctrl_seq_num){ + return in_data; + } + if (len == 0) break; //timeout + //didnt get seq or bad packet, continue looking... + } + throw std::runtime_error("usrp2 no control response"); + } + +/*********************************************************************** + * Master Clock! Ahhhhh + **********************************************************************/ + double get_master_clock_freq(void){ + return 100e6; + } + +private: + //this lovely lady makes it all possible + transport::udp_simple::sptr _ctrl_transport; + + //used in send/recv + boost::mutex _ctrl_mutex; + boost::uint32_t _ctrl_seq_num; + +/*********************************************************************** + * Private Templated Peek and Poke + **********************************************************************/ + template <class T> void poke(boost::uint32_t addr, T data){ + //setup the out data + usrp2_ctrl_data_t out_data; + out_data.id = htonl(USRP2_CTRL_ID_POKE_THIS_REGISTER_FOR_ME_BRO); + out_data.data.poke_args.addr = htonl(addr); + out_data.data.poke_args.data = htonl(boost::uint32_t(data)); + out_data.data.poke_args.num_bytes = sizeof(T); + + //send and recv + usrp2_ctrl_data_t in_data = this->ctrl_send_and_recv(out_data); + UHD_ASSERT_THROW(htonl(in_data.id) == USRP2_CTRL_ID_OMG_POKED_REGISTER_SO_BAD_DUDE); + } + + template <class T> T peek(boost::uint32_t addr){ + //setup the out data + usrp2_ctrl_data_t out_data; + out_data.id = htonl(USRP2_CTRL_ID_PEEK_AT_THIS_REGISTER_FOR_ME_BRO); + out_data.data.poke_args.addr = htonl(addr); + out_data.data.poke_args.num_bytes = sizeof(T); + + //send and recv + usrp2_ctrl_data_t in_data = this->ctrl_send_and_recv(out_data); + UHD_ASSERT_THROW(htonl(in_data.id) == USRP2_CTRL_ID_WOAH_I_DEFINITELY_PEEKED_IT_DUDE); + return T(ntohl(out_data.data.poke_args.data)); + } + +}; + +/*********************************************************************** + * Public make function for usrp2 interface + **********************************************************************/ +usrp2_iface::sptr usrp2_iface::make(transport::udp_simple::sptr ctrl_transport){ + return usrp2_iface::sptr(new usrp2_iface_impl(ctrl_transport)); +} diff --git a/host/lib/usrp/usrp2/usrp2_iface.hpp b/host/lib/usrp/usrp2/usrp2_iface.hpp new file mode 100644 index 000000000..caf6623e2 --- /dev/null +++ b/host/lib/usrp/usrp2/usrp2_iface.hpp @@ -0,0 +1,119 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#ifndef INCLUDED_USRP2_IFACE_HPP +#define INCLUDED_USRP2_IFACE_HPP + +#include <uhd/transport/udp_simple.hpp> +#include <uhd/types/serial.hpp> +#include <boost/shared_ptr.hpp> +#include <boost/utility.hpp> +#include <boost/cstdint.hpp> +#include "fw_common.h" + +//////////////////////////////////////////////////////////////////////// +// I2C addresses +//////////////////////////////////////////////////////////////////////// +#define I2C_DEV_EEPROM 0x50 // 24LC02[45]: 7-bits 1010xxx +#define I2C_ADDR_MBOARD (I2C_DEV_EEPROM | 0x0) +#define I2C_ADDR_TX_DB (I2C_DEV_EEPROM | 0x4) +#define I2C_ADDR_RX_DB (I2C_DEV_EEPROM | 0x5) + +//////////////////////////////////////////////////////////////////////// +// EEPROM Layout +//////////////////////////////////////////////////////////////////////// +#define EE_MBOARD_REV_LSB 0x00 //1 byte +#define EE_MBOARD_REV_MSB 0x01 //1 byte +#define EE_MBOARD_MAC_ADDR 0x02 //6 bytes +#define EE_MBOARD_IP_ADDR 0x0C //uint32, big-endian + +/*! + * The usrp2 interface class: + * Provides a set of functions to implementation layer. + * Including spi, peek, poke, control... + */ +class usrp2_iface : public uhd::i2c_iface, boost::noncopyable{ +public: + typedef boost::shared_ptr<usrp2_iface> sptr; + + /*! + * Make a new usrp2 interface with the control transport. + * \param ctrl_transport the udp transport object + * \return a new usrp2 interface object + */ + static sptr make(uhd::transport::udp_simple::sptr ctrl_transport); + + /*! + * Perform a control transaction. + * \param data a control data struct + * \return the result control data + */ + virtual usrp2_ctrl_data_t ctrl_send_and_recv(const usrp2_ctrl_data_t &data) = 0; + + /*! + * Write a register (32 bits) + * \param addr the address + * \param data the 32bit data + */ + virtual void poke32(boost::uint32_t addr, boost::uint32_t data) = 0; + + /*! + * Read a register (32 bits) + * \param addr the address + * \return the 32bit data + */ + virtual boost::uint32_t peek32(boost::uint32_t addr) = 0; + + /*! + * Write a register (16 bits) + * \param addr the address + * \param data the 16bit data + */ + virtual void poke16(boost::uint32_t addr, boost::uint16_t data) = 0; + + /*! + * Read a register (16 bits) + * \param addr the address + * \return the 16bit data + */ + virtual boost::uint16_t peek16(boost::uint32_t addr) = 0; + + /*! + * Perform an spi transaction. + * \param which_slave the slave device number + * \param config spi config args + * \param data the bits to write + * \param num_bits how many bits in data + * \param readback true to readback a value + * \return spi data if readback set + */ + virtual boost::uint32_t transact_spi( + int which_slave, + const uhd::spi_config_t &config, + boost::uint32_t data, + size_t num_bits, + bool readback + ) = 0; + + /*! + * Get the master clock frequency. + * \return the frequency in Hz + */ + virtual double get_master_clock_freq(void) = 0; +}; + +#endif /* INCLUDED_USRP2_IFACE_HPP */ diff --git a/host/lib/usrp/usrp2/usrp2_impl.cpp b/host/lib/usrp/usrp2/usrp2_impl.cpp new file mode 100644 index 000000000..af3ec216a --- /dev/null +++ b/host/lib/usrp/usrp2/usrp2_impl.cpp @@ -0,0 +1,219 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include "usrp2_impl.hpp" +#include <uhd/transport/if_addrs.hpp> +#include <uhd/transport/udp_simple.hpp> +#include <uhd/usrp/device_props.hpp> +#include <uhd/utils/assert.hpp> +#include <uhd/utils/static.hpp> +#include <boost/assign/list_of.hpp> +#include <boost/format.hpp> +#include <boost/foreach.hpp> +#include <boost/lexical_cast.hpp> +#include <boost/bind.hpp> +#include <boost/asio.hpp> //htonl and ntohl +#include <iostream> + +using namespace uhd; +using namespace uhd::usrp; +using namespace uhd::transport; +namespace asio = boost::asio; + +UHD_STATIC_BLOCK(register_usrp2_device){ + device::register_device(&usrp2::find, &usrp2::make); +} + +/*********************************************************************** + * Discovery over the udp transport + **********************************************************************/ +uhd::device_addrs_t usrp2::find(const device_addr_t &hint){ + device_addrs_t usrp2_addrs; + + //if no address was specified, send a broadcast on each interface + if (not hint.has_key("addr")){ + BOOST_FOREACH(const if_addrs_t &if_addrs, get_if_addrs()){ + //avoid the loopback device + if (if_addrs.inet == asio::ip::address_v4::loopback().to_string()) continue; + + //create a new hint with this broadcast address + device_addr_t new_hint; + new_hint["addr"] = if_addrs.bcast; + + //call discover with the new hint and append results + device_addrs_t new_usrp2_addrs = usrp2::find(new_hint); + usrp2_addrs.insert(usrp2_addrs.begin(), + new_usrp2_addrs.begin(), new_usrp2_addrs.end() + ); + } + return usrp2_addrs; + } + + //create a udp transport to communicate + std::string ctrl_port = boost::lexical_cast<std::string>(USRP2_UDP_CTRL_PORT); + udp_simple::sptr udp_transport = udp_simple::make_broadcast( + hint["addr"], ctrl_port + ); + + //send a hello control packet + usrp2_ctrl_data_t ctrl_data_out; + ctrl_data_out.proto_ver = htonl(USRP2_PROTO_VERSION); + ctrl_data_out.id = htonl(USRP2_CTRL_ID_WAZZUP_BRO); + udp_transport->send(boost::asio::buffer(&ctrl_data_out, sizeof(ctrl_data_out))); + + //loop and recieve until the timeout + while(true){ + usrp2_ctrl_data_t ctrl_data_in; + size_t len = udp_transport->recv(asio::buffer(&ctrl_data_in, sizeof(ctrl_data_in))); + //std::cout << len << "\n"; + if (len >= sizeof(usrp2_ctrl_data_t)){ + //handle the received data + switch(ntohl(ctrl_data_in.id)){ + case USRP2_CTRL_ID_WAZZUP_DUDE: + //make a boost asio ipv4 with the raw addr in host byte order + boost::asio::ip::address_v4 ip_addr(ntohl(ctrl_data_in.data.ip_addr)); + device_addr_t new_addr; + new_addr["name"] = "USRP2"; + new_addr["addr"] = ip_addr.to_string(); + usrp2_addrs.push_back(new_addr); + //dont break here, it will exit the while loop + //just continue on to the next loop iteration + } + } + if (len == 0) break; //timeout + } + + return usrp2_addrs; +} + +/*********************************************************************** + * Make + **********************************************************************/ +template <class T> std::string num2str(T num){ + return boost::lexical_cast<std::string>(num); +} + +device::sptr usrp2::make(const device_addr_t &device_addr){ + //create a control transport + udp_simple::sptr ctrl_transport = udp_simple::make_connected( + device_addr["addr"], num2str(USRP2_UDP_CTRL_PORT) + ); + + //extract the receive and send buffer sizes + size_t recv_buff_size = 0, send_buff_size= 0 ; + if (device_addr.has_key("recv_buff_size")){ + recv_buff_size = size_t(boost::lexical_cast<double>(device_addr["recv_buff_size"])); + } + if (device_addr.has_key("send_buff_size")){ + send_buff_size = size_t(boost::lexical_cast<double>(device_addr["send_buff_size"])); + } + + //create a data transport + udp_zero_copy::sptr data_transport = udp_zero_copy::make( + device_addr["addr"], + num2str(USRP2_UDP_DATA_PORT), + recv_buff_size, + send_buff_size + ); + + //create the usrp2 implementation guts + return device::sptr( + new usrp2_impl(ctrl_transport, data_transport) + ); +} + +/*********************************************************************** + * Structors + **********************************************************************/ +usrp2_impl::usrp2_impl( + udp_simple::sptr ctrl_transport, + udp_zero_copy::sptr data_transport +){ + _data_transport = data_transport; + + //make a new interface for usrp2 stuff + _iface = usrp2_iface::make(ctrl_transport); + _clock_ctrl = clock_ctrl::make(_iface); + _codec_ctrl = codec_ctrl::make(_iface); + _serdes_ctrl = serdes_ctrl::make(_iface); + + //load the allowed decim/interp rates + //_USRP2_RATES = range(4, 128+1, 1) + range(130, 256+1, 2) + range(260, 512+1, 4) + _allowed_decim_and_interp_rates.clear(); + for (size_t i = 4; i <= 128; i+=1){ + _allowed_decim_and_interp_rates.push_back(i); + } + for (size_t i = 130; i <= 256; i+=2){ + _allowed_decim_and_interp_rates.push_back(i); + } + for (size_t i = 260; i <= 512; i+=4){ + _allowed_decim_and_interp_rates.push_back(i); + } + + //init the mboard + mboard_init(); + + //init the ddc + init_ddc_config(); + + //init the duc + init_duc_config(); + + //initialize the clock configuration + init_clock_config(); + + //init the tx and rx dboards (do last) + dboard_init(); + + //init the send and recv io + io_init(); + +} + +usrp2_impl::~usrp2_impl(void){ + /* NOP */ +} + +/*********************************************************************** + * Device Properties + **********************************************************************/ +void usrp2_impl::get(const wax::obj &key_, wax::obj &val){ + wax::obj key; std::string name; + boost::tie(key, name) = extract_named_prop(key_); + + //handle the get request conditioned on the key + switch(key.as<device_prop_t>()){ + case DEVICE_PROP_NAME: + val = std::string("usrp2 device"); + return; + + case DEVICE_PROP_MBOARD: + UHD_ASSERT_THROW(name == ""); + val = _mboard_proxy->get_link(); + return; + + case DEVICE_PROP_MBOARD_NAMES: + val = prop_names_t(1, ""); + return; + + default: UHD_THROW_PROP_GET_ERROR(); + } +} + +void usrp2_impl::set(const wax::obj &, const wax::obj &){ + UHD_THROW_PROP_SET_ERROR(); +} diff --git a/host/lib/usrp/usrp2/usrp2_impl.hpp b/host/lib/usrp/usrp2/usrp2_impl.hpp new file mode 100644 index 000000000..afea9683c --- /dev/null +++ b/host/lib/usrp/usrp2/usrp2_impl.hpp @@ -0,0 +1,222 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#ifndef INCLUDED_USRP2_IMPL_HPP +#define INCLUDED_USRP2_IMPL_HPP + +#include "usrp2_iface.hpp" +#include "clock_ctrl.hpp" +#include "codec_ctrl.hpp" +#include "serdes_ctrl.hpp" +#include <uhd/usrp/usrp2.hpp> +#include <uhd/types/dict.hpp> +#include <uhd/types/otw_type.hpp> +#include <uhd/types/stream_cmd.hpp> +#include <uhd/types/clock_config.hpp> +#include <uhd/usrp/dboard_eeprom.hpp> +#include <boost/shared_ptr.hpp> +#include <boost/function.hpp> +#include <uhd/transport/vrt.hpp> +#include <uhd/transport/udp_zero_copy.hpp> +#include <uhd/usrp/dboard_manager.hpp> +#include "../../transport/vrt_packet_handler.hpp" + +/*! + * Make a usrp2 dboard interface. + * \param iface the usrp2 interface object + * \param clk_ctrl the clock control object + * \return a sptr to a new dboard interface + */ +uhd::usrp::dboard_iface::sptr make_usrp2_dboard_iface( + usrp2_iface::sptr iface, + clock_ctrl::sptr clk_ctrl +); + +/*! + * Simple wax obj proxy class: + * Provides a wax obj interface for a set and a get function. + * This allows us to create nested properties structures + * while maintaining flattened code within the implementation. + */ +class wax_obj_proxy : public wax::obj{ +public: + typedef boost::function<void(const wax::obj &, wax::obj &)> get_t; + typedef boost::function<void(const wax::obj &, const wax::obj &)> set_t; + typedef boost::shared_ptr<wax_obj_proxy> sptr; + + static sptr make(const get_t &get, const set_t &set){ + return sptr(new wax_obj_proxy(get, set)); + } + + ~wax_obj_proxy(void){ + /* NOP */ + } + +private: + get_t _get; + set_t _set; + + wax_obj_proxy(const get_t &get, const set_t &set){ + _get = get; + _set = set; + }; + + void get(const wax::obj &key, wax::obj &val){ + return _get(key, val); + } + + void set(const wax::obj &key, const wax::obj &val){ + return _set(key, val); + } +}; + +/*! + * USRP2 implementation guts: + * The implementation details are encapsulated here. + * Handles properties on the mboard, dboard, dsps... + */ +class usrp2_impl : public uhd::device{ +public: + /*! + * Create a new usrp2 impl base. + * \param ctrl_transport the udp transport for control + * \param data_transport the udp transport for data + */ + usrp2_impl( + uhd::transport::udp_simple::sptr ctrl_transport, + uhd::transport::udp_zero_copy::sptr data_transport + ); + + ~usrp2_impl(void); + + //the io interface + size_t get_max_send_samps_per_packet(void) const{ + return _max_tx_bytes_per_packet/_tx_otw_type.get_sample_size(); + } + size_t send( + const boost::asio::const_buffer &, + const uhd::tx_metadata_t &, + const uhd::io_type_t &, + uhd::device::send_mode_t + ); + size_t get_max_recv_samps_per_packet(void) const{ + return _max_rx_bytes_per_packet/_rx_otw_type.get_sample_size(); + } + size_t recv( + const boost::asio::mutable_buffer &, + uhd::rx_metadata_t &, + const uhd::io_type_t &, + uhd::device::recv_mode_t + ); + +private: + double get_master_clock_freq(void){ + return _iface->get_master_clock_freq(); + } + + //device properties interface + void get(const wax::obj &, wax::obj &); + void set(const wax::obj &, const wax::obj &); + + //interfaces + usrp2_iface::sptr _iface; + clock_ctrl::sptr _clock_ctrl; + codec_ctrl::sptr _codec_ctrl; + serdes_ctrl::sptr _serdes_ctrl; + + /******************************************************************* + * Deal with the rx and tx packet sizes + ******************************************************************/ + static const size_t _mtu = 1500; //FIXME we have no idea + static const size_t _hdrs = (2 + 14 + 20 + 8); //size of headers (pad, eth, ip, udp) + static const size_t _max_rx_bytes_per_packet = + _mtu - _hdrs - + USRP2_HOST_RX_VRT_HEADER_WORDS32*sizeof(boost::uint32_t) - + USRP2_HOST_RX_VRT_TRAILER_WORDS32*sizeof(boost::uint32_t) + ; + static const size_t _max_tx_bytes_per_packet = + _mtu - _hdrs - + uhd::transport::vrt::max_header_words32*sizeof(boost::uint32_t) + ; + + vrt_packet_handler::recv_state _packet_handler_recv_state; + vrt_packet_handler::send_state _packet_handler_send_state; + uhd::otw_type_t _rx_otw_type, _tx_otw_type; + void io_init(void); + + //udp transports for control and data + uhd::transport::udp_zero_copy::sptr _data_transport; + + //methods and shadows for clock configuration + uhd::clock_config_t _clock_config; + void init_clock_config(void); + void update_clock_config(void); + void set_time_spec(const uhd::time_spec_t &time_spec, bool now); + + //rx and tx dboard methods and objects + uhd::usrp::dboard_manager::sptr _dboard_manager; + void dboard_init(void); + + //properties for the mboard + void mboard_init(void); + void mboard_get(const wax::obj &, wax::obj &); + void mboard_set(const wax::obj &, const wax::obj &); + wax_obj_proxy::sptr _mboard_proxy; + + //properties interface for rx dboard + void rx_dboard_get(const wax::obj &, wax::obj &); + void rx_dboard_set(const wax::obj &, const wax::obj &); + wax_obj_proxy::sptr _rx_dboard_proxy; + uhd::prop_names_t _rx_subdevs_in_use; + uhd::usrp::dboard_eeprom_t _rx_db_eeprom; + + //properties interface for tx dboard + void tx_dboard_get(const wax::obj &, wax::obj &); + void tx_dboard_set(const wax::obj &, const wax::obj &); + wax_obj_proxy::sptr _tx_dboard_proxy; + uhd::prop_names_t _tx_subdevs_in_use; + uhd::usrp::dboard_eeprom_t _tx_db_eeprom; + void update_rx_mux_config(void); + void update_tx_mux_config(void); + + //methods and shadows for the ddc dsp + std::vector<size_t> _allowed_decim_and_interp_rates; + size_t _ddc_decim; + double _ddc_freq; + void init_ddc_config(void); + void update_ddc_config(void); + void issue_ddc_stream_cmd(const uhd::stream_cmd_t &stream_cmd); + + //methods and shadows for the duc dsp + size_t _duc_interp; + double _duc_freq; + void init_duc_config(void); + void update_duc_config(void); + + //properties interface for ddc + void ddc_get(const wax::obj &, wax::obj &); + void ddc_set(const wax::obj &, const wax::obj &); + wax_obj_proxy::sptr _rx_dsp_proxy; + + //properties interface for duc + void duc_get(const wax::obj &, wax::obj &); + void duc_set(const wax::obj &, const wax::obj &); + wax_obj_proxy::sptr _tx_dsp_proxy; + +}; + +#endif /* INCLUDED_USRP2_IMPL_HPP */ diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp new file mode 100644 index 000000000..feeccaa34 --- /dev/null +++ b/host/lib/usrp/usrp2/usrp2_regs.hpp @@ -0,0 +1,247 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#ifndef INCLUDED_USRP2_REGS_HPP +#define INCLUDED_USRP2_REGS_HPP + +#include <boost/cstdint.hpp> + +//////////////////////////////////////////////////// +// Settings Bus, Slave #7, Not Byte Addressable! +// +// Output-only from processor point-of-view. +// 1KB of address space (== 256 32-bit write-only regs) + + +#define MISC_OUTPUT_BASE 0xD400 +//#define TX_PROTOCOL_ENGINE_BASE 0xD480 +//#define RX_PROTOCOL_ENGINE_BASE 0xD4C0 +//#define BUFFER_POOL_CTRL_BASE 0xD500 +//#define LAST_SETTING_REG 0xD7FC // last valid setting register + +#define SR_MISC 0 +#define SR_TX_PROT_ENG 32 +#define SR_RX_PROT_ENG 48 +#define SR_BUFFER_POOL_CTRL 64 +#define SR_UDP_SM 96 +#define SR_TX_DSP 208 +#define SR_TX_CTRL 224 +#define SR_RX_DSP 160 +#define SR_RX_CTRL 176 +#define SR_TIME64 192 +#define SR_SIMTIMER 198 +#define SR_LAST 255 + +#define _SR_ADDR(sr) (MISC_OUTPUT_BASE + (sr) * sizeof(boost::uint32_t)) + +///////////////////////////////////////////////// +// SPI Slave Constants +//////////////////////////////////////////////// +// Masks for controlling different peripherals +#define SPI_SS_AD9510 1 +#define SPI_SS_AD9777 2 +#define SPI_SS_RX_DAC 4 +#define SPI_SS_RX_ADC 8 +#define SPI_SS_RX_DB 16 +#define SPI_SS_TX_DAC 32 +#define SPI_SS_TX_ADC 64 +#define SPI_SS_TX_DB 128 + +///////////////////////////////////////////////// +// Misc Control +//////////////////////////////////////////////// +#define FR_MISC_CTRL_CLOCK _SR_ADDR(0) +#define FR_MISC_CTRL_SERDES _SR_ADDR(1) +#define FR_MISC_CTRL_ADC _SR_ADDR(2) +#define FR_MISC_CTRL_LEDS _SR_ADDR(3) +#define FR_MISC_CTRL_PHY _SR_ADDR(4) // LSB is reset line to eth phy +#define FR_MISC_CTRL_DBG_MUX _SR_ADDR(5) +#define FR_MISC_CTRL_RAM_PAGE _SR_ADDR(6) // FIXME should go somewhere else... +#define FR_MISC_CTRL_FLUSH_ICACHE _SR_ADDR(7) // Flush the icache +#define FR_MISC_CTRL_LED_SRC _SR_ADDR(8) // HW or SW control for LEDs + +#define FRF_MISC_CTRL_SERDES_ENABLE 8 +#define FRF_MISC_CTRL_SERDES_PRBSEN 4 +#define FRF_MISC_CTRL_SERDES_LOOPEN 2 +#define FRF_MISC_CTRL_SERDES_RXEN 1 + +#define FRF_MISC_CTRL_ADC_ON 0x0F +#define FRF_MISC_CTRL_ADC_OFF 0x00 + +///////////////////////////////////////////////// +// VITA49 64 bit time (write only) +//////////////////////////////////////////////// + /*! + * \brief Time 64 flags + * + * <pre> + * + * 3 2 1 + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------------------------------------------------------+-+-+ + * | |S|P| + * +-----------------------------------------------------------+-+-+ + * + * P - PPS edge selection (0=negedge, 1=posedge, default=0) + * S - Source (0=sma, 1=mimo, 0=default) + * + * </pre> + */ +#define FR_TIME64_SECS _SR_ADDR(SR_TIME64 + 0) // value to set absolute secs to on next PPS +#define FR_TIME64_TICKS _SR_ADDR(SR_TIME64 + 1) // value to set absolute ticks to on next PPS +#define FR_TIME64_FLAGS _SR_ADDR(SR_TIME64 + 2) // flags - see chart above +#define FR_TIME64_IMM _SR_ADDR(SR_TIME64 + 3) // set immediate (0=latch on next pps, 1=latch immediate, default=0) + +//pps flags (see above) +#define FRF_TIME64_PPS_NEGEDGE (0 << 0) +#define FRF_TIME64_PPS_POSEDGE (1 << 0) +#define FRF_TIME64_PPS_SMA (0 << 1) +#define FRF_TIME64_PPS_MIMO (1 << 1) + +#define FRF_TIME64_LATCH_NOW 1 +#define FRF_TIME64_LATCH_NEXT_PPS 0 + +///////////////////////////////////////////////// +// DSP TX Regs +//////////////////////////////////////////////// +#define FR_DSP_TX_FREQ _SR_ADDR(SR_TX_DSP + 0) +#define FR_DSP_TX_SCALE_IQ _SR_ADDR(SR_TX_DSP + 1) // {scale_i,scale_q} +#define FR_DSP_TX_INTERP_RATE _SR_ADDR(SR_TX_DSP + 2) + + /*! + * \brief output mux configuration. + * + * <pre> + * 3 2 1 + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-------------------------------+-------+-------+-------+-------+ + * | | DAC1 | DAC0 | + * +-------------------------------+-------+-------+-------+-------+ + * + * There are N DUCs (1 now) with complex inputs and outputs. + * There are two DACs. + * + * Each 4-bit DACx field specifies the source for the DAC + * Each subfield is coded like this: + * + * 3 2 1 0 + * +-------+ + * | N | + * +-------+ + * + * N specifies which DUC output is connected to this DAC. + * + * N which interp output + * --- ------------------- + * 0 DUC 0 I + * 1 DUC 0 Q + * 2 DUC 1 I + * 3 DUC 1 Q + * F All Zeros + * + * The default value is 0x10 + * </pre> + */ +#define FR_DSP_TX_MUX _SR_ADDR(SR_TX_DSP + 4) + +///////////////////////////////////////////////// +// DSP RX Regs +//////////////////////////////////////////////// +#define FR_DSP_RX_FREQ _SR_ADDR(SR_RX_DSP + 0) +#define FR_DSP_RX_SCALE_IQ _SR_ADDR(SR_RX_DSP + 1) // {scale_i,scale_q} +#define FR_DSP_RX_DECIM_RATE _SR_ADDR(SR_RX_DSP + 2) +#define FR_DSP_RX_DCOFFSET_I _SR_ADDR(SR_RX_DSP + 3) // Bit 31 high sets fixed offset mode, using lower 14 bits, + // otherwise it is automatic +#define FR_DSP_RX_DCOFFSET_Q _SR_ADDR(SR_RX_DSP + 4) // Bit 31 high sets fixed offset mode, using lower 14 bits + /*! + * \brief input mux configuration. + * + * This determines which ADC (or constant zero) is connected to + * each DDC input. There are N DDCs (1 now). Each has two inputs. + * + * <pre> + * Mux value: + * + * 3 2 1 + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-------+-------+-------+-------+-------+-------+-------+-------+ + * | |Q0 |I0 | + * +-------+-------+-------+-------+-------+-------+-------+-------+ + * + * Each 2-bit I field is either 00 (A/D A), 01 (A/D B) or 1X (const zero) + * Each 2-bit Q field is either 00 (A/D A), 01 (A/D B) or 1X (const zero) + * + * The default value is 0x4 + * </pre> + */ +#define FR_DSP_RX_MUX _SR_ADDR(SR_RX_DSP + 5) // called adc_mux in dsp_core_rx.v + +//////////////////////////////////////////////// +// GPIO, Slave 4 +//////////////////////////////////////////////// +// +// These go to the daughterboard i/o pins +// +#define FR_GPIO_BASE 0xC800 + +#define FR_GPIO_IO FR_GPIO_BASE + 0 // 32 bits, gpio io pins (tx high 16 bits, rx low 16 bits) +#define FR_GPIO_DDR FR_GPIO_BASE + 4 // 32 bits, gpio ddr, 1 means output (tx high 16 bits, rx low 16 bits) +#define FR_GPIO_TX_SEL FR_GPIO_BASE + 8 // 16 2-bit fields select which source goes to TX DB +#define FR_GPIO_RX_SEL FR_GPIO_BASE + 12 // 16 2-bit fields select which source goes to RX DB + +// each 2-bit sel field is layed out this way +#define FRF_GPIO_SEL_SW 0 // if pin is an output, set by software in the io reg +#define FRF_GPIO_SEL_ATR 1 // if pin is an output, set by ATR logic +#define FRF_GPIO_SEL_DEBUG_0 2 // if pin is an output, debug lines from FPGA fabric +#define FRF_GPIO_SEL_DEBUG_1 3 // if pin is an output, debug lines from FPGA fabric + +/////////////////////////////////////////////////// +// ATR Controller, Slave 11 +//////////////////////////////////////////////// +#define FR_ATR_BASE 0xE400 + +#define FR_ATR_IDLE_TXSIDE FR_ATR_BASE + 0 +#define FR_ATR_IDLE_RXSIDE FR_ATR_BASE + 2 +#define FR_ATR_INTX_TXSIDE FR_ATR_BASE + 4 +#define FR_ATR_INTX_RXSIDE FR_ATR_BASE + 6 +#define FR_ATR_INRX_TXSIDE FR_ATR_BASE + 8 +#define FR_ATR_INRX_RXSIDE FR_ATR_BASE + 10 +#define FR_ATR_FULL_TXSIDE FR_ATR_BASE + 12 +#define FR_ATR_FULL_RXSIDE FR_ATR_BASE + 14 + +/////////////////////////////////////////////////// +// VITA RX CTRL regs +/////////////////////////////////////////////////// +// The following 3 are logically a single command register. +// They are clocked into the underlying fifo when time_ticks is written. +#define FR_RX_CTRL_STREAM_CMD _SR_ADDR(SR_RX_CTRL + 0) // {now, chain, num_samples(30) +#define FR_RX_CTRL_TIME_SECS _SR_ADDR(SR_RX_CTRL + 1) +#define FR_RX_CTRL_TIME_TICKS _SR_ADDR(SR_RX_CTRL + 2) + +#define FR_RX_CTRL_CLEAR_OVERRUN _SR_ADDR(SR_RX_CTRL + 3) // write anything to clear overrun +#define FR_RX_CTRL_VRT_HEADER _SR_ADDR(SR_RX_CTRL + 4) // word 0 of packet. FPGA fills in packet counter +#define FR_RX_CTRL_VRT_STREAM_ID _SR_ADDR(SR_RX_CTRL + 5) // word 1 of packet. +#define FR_RX_CTRL_VRT_TRAILER _SR_ADDR(SR_RX_CTRL + 6) +#define FR_RX_CTRL_NSAMPS_PER_PKT _SR_ADDR(SR_RX_CTRL + 7) +#define FR_RX_CTRL_NCHANNELS _SR_ADDR(SR_RX_CTRL + 8) // 1 in basic case, up to 4 for vector sources + +//helpful macros for dealing with stream cmd +#define FR_RX_CTRL_MAX_SAMPS_PER_CMD 0x1fffffff +#define FR_RX_CTRL_MAKE_CMD(nsamples, now, chain, reload) \ + ((((now) & 0x1) << 31) | (((chain) & 0x1) << 30) | (((reload) & 0x1) << 29) | ((nsamples) & 0x1fffffff)) + +#endif /* INCLUDED_USRP2_REGS_HPP */ diff --git a/host/lib/utils.cpp b/host/lib/utils.cpp new file mode 100644 index 000000000..d2f4dfc6e --- /dev/null +++ b/host/lib/utils.cpp @@ -0,0 +1,53 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include <uhd/utils/assert.hpp> +#include <uhd/utils/props.hpp> +#include <stdexcept> + +using namespace uhd; + +/*********************************************************************** + * Assert + **********************************************************************/ +assert_error::assert_error(const std::string &what) : std::runtime_error(what){ + /* NOP */ +} + +/*********************************************************************** + * Props + **********************************************************************/ +named_prop_t::named_prop_t( + const wax::obj &key_, + const std::string &name_ +){ + key = key_; + name = name_; +} + +typedef boost::tuple<wax::obj, std::string> named_prop_tuple; + +named_prop_tuple uhd::extract_named_prop( + const wax::obj &key, + const std::string &name +){ + if (key.type() == typeid(named_prop_t)){ + named_prop_t np = key.as<named_prop_t>(); + return named_prop_tuple(np.key, np.name); + } + return named_prop_tuple(key, name); +} diff --git a/host/lib/wax.cpp b/host/lib/wax.cpp new file mode 100644 index 000000000..0e2e82a3a --- /dev/null +++ b/host/lib/wax.cpp @@ -0,0 +1,150 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#include <uhd/wax.hpp> +#include <boost/format.hpp> +#include <stdexcept> + +/*! + * The link args for internal use within this cpp file: + * + * It contains a link (in this case a pointer) to a wax object. + * Only the methods in this file may create or parse link args. + * The get_link method is the creator of a link args object. + * The [] operator will resolve the link and make the [] call. + * + * TODO: register the link args with the wax obj that it links to. + * That way, if the obj destructs, the link can be invalidated. + * The operator() will throw, rather than dereferencing bad memory. + */ +class link_args_t{ +public: + link_args_t(const wax::obj *obj_ptr) : _obj_ptr(obj_ptr){ + /* NOP */ + } + wax::obj & operator()(void) const{ + //recursively resolve link args to get at original pointer + if (_obj_ptr->type() == typeid(link_args_t)){ + return _obj_ptr->as<link_args_t>()(); + } + return *const_cast<wax::obj *>(_obj_ptr); + } +private: + const wax::obj *_obj_ptr; +}; + +/*! + * The proxy args for internal use within this cpp file: + * + * It contains a link and a key for setting/getting a property. + * Only the methods in this file may create or parse proxy args. + * Class methods have special handling for the case when the + * wax obj contains an instance of the proxy args. + */ +class proxy_args_t{ +public: + proxy_args_t(const wax::obj *obj_ptr, const wax::obj &key) : _key(key){ + _obj_link = obj_ptr->get_link(); + } + wax::obj & operator()(void) const{ + return _obj_link.as<link_args_t>()(); + } + const wax::obj & key(void) const{ + return _key; + } +private: + wax::obj _obj_link; + const wax::obj _key; +}; + +/*********************************************************************** + * Structors + **********************************************************************/ +wax::obj::obj(void){ + /* NOP */ +} + +wax::obj::obj(const obj &o){ + _contents = o._contents; +} + +wax::obj::~obj(void){ + /* NOP */ +} + +/*********************************************************************** + * Special Operators + **********************************************************************/ +wax::obj wax::obj::operator[](const obj &key){ + if (_contents.type() == typeid(proxy_args_t)){ + obj val = resolve(); + //check if its a special link and call + if (val.type() == typeid(link_args_t)){ + return val.as<link_args_t>()()[key]; + } + //unknown obj + throw std::runtime_error("cannot use [] on non wax::obj link"); + } + else{ + return proxy_args_t(this, key); + } +} + +wax::obj & wax::obj::operator=(const obj &val){ + if (_contents.type() == typeid(proxy_args_t)){ + proxy_args_t proxy_args = boost::any_cast<proxy_args_t>(_contents); + proxy_args().set(proxy_args.key(), val); + } + else{ + _contents = val._contents; + } + return *this; +} + +/*********************************************************************** + * Public Methods + **********************************************************************/ +wax::obj wax::obj::get_link(void) const{ + return link_args_t(this); +} + +const std::type_info & wax::obj::type(void) const{ + return resolve().type(); +} + +/*********************************************************************** + * Private Methods + **********************************************************************/ +boost::any wax::obj::resolve(void) const{ + if (_contents.type() == typeid(proxy_args_t)){ + obj val; + proxy_args_t proxy_args = boost::any_cast<proxy_args_t>(_contents); + proxy_args().get(proxy_args.key(), val); + return val.resolve(); + } + else{ + return _contents; + } +} + +void wax::obj::get(const obj &, obj &){ + throw std::runtime_error("Cannot call get on wax obj base class"); +} + +void wax::obj::set(const obj &, const obj &){ + throw std::runtime_error("Cannot call set on wax obj base class"); +} |