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-rw-r--r--host/lib/usrp/common/recv_packet_demuxer_3000.hpp6
-rw-r--r--host/lib/usrp/e300/e300_fifo_config.cpp5
-rw-r--r--host/lib/usrp/usrp1/soft_time_ctrl.cpp5
-rw-r--r--host/lib/usrp/x300/x300_dac_ctrl.cpp9
4 files changed, 15 insertions, 10 deletions
diff --git a/host/lib/usrp/common/recv_packet_demuxer_3000.hpp b/host/lib/usrp/common/recv_packet_demuxer_3000.hpp
index 8b0aa9ee0..74807741f 100644
--- a/host/lib/usrp/common/recv_packet_demuxer_3000.hpp
+++ b/host/lib/usrp/common/recv_packet_demuxer_3000.hpp
@@ -8,6 +8,7 @@
#ifndef INCLUDED_LIBUHD_USRP_COMMON_RECV_PACKET_DEMUXER_3000_HPP
#define INCLUDED_LIBUHD_USRP_COMMON_RECV_PACKET_DEMUXER_3000_HPP
+#include <uhd/utils/system_time.hpp>
#include <uhd/config.hpp>
#include <uhd/transport/zero_copy.hpp>
#include <uhd/utils/log.hpp>
@@ -35,12 +36,13 @@ namespace uhd{ namespace usrp{
transport::managed_recv_buffer::sptr get_recv_buff(const uint32_t sid, const double timeout)
{
- const time_spec_t exit_time = time_spec_t(timeout) + time_spec_t::get_system_time();
+ const time_spec_t exit_time =
+ time_spec_t(timeout) + uhd::get_system_time();
transport::managed_recv_buffer::sptr buff;
buff = _internal_get_recv_buff(sid, timeout);
while (not buff) //loop until timeout
{
- const time_spec_t delta = exit_time - time_spec_t::get_system_time();
+ const time_spec_t delta = exit_time - uhd::get_system_time();
const double new_timeout = delta.get_real_secs();
if (new_timeout < 0.0) break;
buff = _internal_get_recv_buff(sid, new_timeout);
diff --git a/host/lib/usrp/e300/e300_fifo_config.cpp b/host/lib/usrp/e300/e300_fifo_config.cpp
index 7d4834040..c02c943dd 100644
--- a/host/lib/usrp/e300/e300_fifo_config.cpp
+++ b/host/lib/usrp/e300/e300_fifo_config.cpp
@@ -7,6 +7,7 @@
#ifdef E300_NATIVE
+#include <uhd/utils/system_time.hpp>
#include <uhd/config.hpp>
#include <stdint.h>
#include <atomic>
@@ -238,7 +239,7 @@ public:
template <typename T>
UHD_INLINE typename T::sptr get_buff(const double timeout)
{
- const time_spec_t exit_time = time_spec_t::get_system_time() + time_spec_t(timeout);
+ const time_spec_t exit_time = uhd::get_system_time() + time_spec_t(timeout);
while (1)
{
if (zf_peek32(_addrs.ctrl + ARBITER_RB_STATUS_OCC))
@@ -251,7 +252,7 @@ public:
_index = 0;
return _buffs[_index++]->get_new<T>();
}
- if (time_spec_t::get_system_time() > exit_time) {
+ if (uhd::get_system_time() > exit_time) {
break;
}
_waiter->wait(timeout);
diff --git a/host/lib/usrp/usrp1/soft_time_ctrl.cpp b/host/lib/usrp/usrp1/soft_time_ctrl.cpp
index 626f973e1..061075e32 100644
--- a/host/lib/usrp/usrp1/soft_time_ctrl.cpp
+++ b/host/lib/usrp/usrp1/soft_time_ctrl.cpp
@@ -6,6 +6,7 @@
//
#include "soft_time_ctrl.hpp"
+#include <uhd/utils/system_time.hpp>
#include <uhd/utils/tasks.hpp>
#include <boost/make_shared.hpp>
#include <boost/thread/condition_variable.hpp>
@@ -49,7 +50,7 @@ public:
******************************************************************/
void set_time(const time_spec_t &time){
boost::mutex::scoped_lock lock(_update_mutex);
- _time_offset = time_spec_t::get_system_time() - time;
+ _time_offset = uhd::get_system_time() - time;
}
time_spec_t get_time(void){
@@ -59,7 +60,7 @@ public:
UHD_INLINE time_spec_t time_now(void){
//internal get time without scoped lock
- return time_spec_t::get_system_time() - _time_offset;
+ return uhd::get_system_time() - _time_offset;
}
UHD_INLINE void sleep_until_time(
diff --git a/host/lib/usrp/x300/x300_dac_ctrl.cpp b/host/lib/usrp/x300/x300_dac_ctrl.cpp
index 5648a5fb7..400e48282 100644
--- a/host/lib/usrp/x300/x300_dac_ctrl.cpp
+++ b/host/lib/usrp/x300/x300_dac_ctrl.cpp
@@ -7,6 +7,7 @@
#include "x300_dac_ctrl.hpp"
#include "x300_regs.hpp"
+#include <uhd/utils/system_time.hpp>
#include <uhd/types/time_spec.hpp>
#include <uhd/utils/log.hpp>
#include <uhd/utils/safe_call.hpp>
@@ -207,14 +208,14 @@ public:
// Verify PLL is Locked. 1 sec timeout.
// NOTE: Data sheet inconsistent about which pins give PLL lock status. FIXME!
- const time_spec_t exit_time = time_spec_t::get_system_time() + time_spec_t(1.0);
+ const time_spec_t exit_time = uhd::get_system_time() + time_spec_t(1.0);
while (true)
{
const size_t reg_e = read_ad9146_reg(0x0E); // PLL Status (Expect bit 7 = 1)
const size_t reg_6 = read_ad9146_reg(0x06); // Event Flags (Expect bit 7 = 0 and bit 6 = 1)
if ((((reg_e >> 7) & 0x1) == 0x1) && (((reg_6 >> 6) & 0x3) == 0x1))
break;
- if (time_spec_t::get_system_time() > exit_time)
+ if (exit_time < uhd::get_system_time())
throw uhd::runtime_error("x300_dac_ctrl: timeout waiting for DAC PLL to lock");
if (reg_6 & (1 << 7)) // Lock lost?
write_ad9146_reg(0x06, 0xC0); // Clear PLL event flags
@@ -231,7 +232,7 @@ public:
write_ad9146_reg(0x06, 0x30);
write_ad9146_reg(0x12, 0x00);
- const time_spec_t exit_time = time_spec_t::get_system_time() + time_spec_t(1.0);
+ const time_spec_t exit_time = uhd::get_system_time() + time_spec_t(1.0);
while (true)
{
boost::this_thread::sleep(boost::posix_time::milliseconds(1)); // wait for sync to complete
@@ -239,7 +240,7 @@ public:
const size_t reg_6 = read_ad9146_reg(0x06); // Event Flags (Expect bit 5 = 0 and bit 4 = 1)
if ((((reg_12 >> 6) & 0x3) == 0x1) && (((reg_6 >> 4) & 0x3) == 0x1))
break;
- if (time_spec_t::get_system_time() > exit_time)
+ if (exit_time < uhd::get_system_time())
throw uhd::runtime_error("x300_dac_ctrl: timeout waiting for backend synchronization");
if (reg_6 & (1 << 5))
write_ad9146_reg(0x06, 0x30); // Clear Sync event flags