diff options
Diffstat (limited to 'host/lib/usrp/x300/x300_impl.hpp')
| -rw-r--r-- | host/lib/usrp/x300/x300_impl.hpp | 62 |
1 files changed, 1 insertions, 61 deletions
diff --git a/host/lib/usrp/x300/x300_impl.hpp b/host/lib/usrp/x300/x300_impl.hpp index dfe038107..d339c7bd0 100644 --- a/host/lib/usrp/x300/x300_impl.hpp +++ b/host/lib/usrp/x300/x300_impl.hpp @@ -12,6 +12,7 @@ #include "x300_clock_ctrl.hpp" #include "x300_fw_common.h" #include "x300_regs.hpp" +#include "x300_defaults.hpp" #include "../device3/device3_impl.hpp" #include <uhd/property_tree.hpp> @@ -33,67 +34,6 @@ #include <boost/weak_ptr.hpp> #include <atomic> -static const std::string X300_FW_FILE_NAME = "usrp_x300_fw.bin"; -static const std::string X300_DEFAULT_CLOCK_SOURCE = "internal"; - -static const double X300_DEFAULT_TICK_RATE = 200e6; //Hz -static const double X300_BUS_CLOCK_RATE = 187.5e6; //Hz - -//The FIFO closest to the DMA controller is 1023 elements deep for RX and 1029 elements deep for TX -//where an element is 8 bytes. The buffers (number of frames * frame size) must be aligned to the -//memory page size. For the control, we are getting lucky because 64 frames * 256 bytes each aligns -//with the typical page size of 4096 bytes. Since most page sizes are 4096 bytes or some multiple of -//that, keep the number of frames * frame size aligned to it. -static const size_t X300_PCIE_RX_DATA_FRAME_SIZE = 4096; //bytes -static const size_t X300_PCIE_RX_DATA_NUM_FRAMES = 4096; -static const size_t X300_PCIE_TX_DATA_FRAME_SIZE = 4096; //bytes -static const size_t X300_PCIE_TX_DATA_NUM_FRAMES = 4096; -static const size_t X300_PCIE_MSG_FRAME_SIZE = 256; //bytes -static const size_t X300_PCIE_MSG_NUM_FRAMES = 64; -static const size_t X300_PCIE_MAX_CHANNELS = 6; -static const size_t X300_PCIE_MAX_MUXED_CTRL_XPORTS = 32; -static const size_t X300_PCIE_MAX_MUXED_ASYNC_XPORTS = 4; - -static const size_t X300_DATA_FRAME_MAX_SIZE = 8000; // CHDR packet size in bytes - -// Ethernet frame sizes -static const size_t X300_10GE_DATA_FRAME_SEND_SIZE = 4000; // Reduced to make sure flow control packets are not blocked for too long at high rates -static const size_t X300_10GE_DATA_FRAME_RECV_SIZE = 8000; -static const size_t X300_1GE_DATA_FRAME_SEND_SIZE = 1472; -static const size_t X300_1GE_DATA_FRAME_RECV_SIZE = 1472; -static const size_t X300_ETH_MSG_FRAME_SIZE = uhd::transport::udp_simple::mtu; //bytes -static const size_t X300_ETH_MSG_NUM_FRAMES = 64; - -static const double X300_RECV_OFFLOAD_BUFFER_TIMEOUT = 0.1; //seconds - -static const double X300_DEFAULT_SYSREF_RATE = 10e6; - -// Limit the number of initialization threads -static const size_t X300_MAX_INIT_THREADS = 10; - -static const size_t X300_MAX_RATE_PCIE = 800000000; // bytes/s -static const size_t X300_MAX_RATE_10GIGE = (size_t)( // bytes/s - 10e9 / 8 * // wire speed multiplied by percentage of packets that is sample data - ( float(X300_DATA_FRAME_MAX_SIZE - uhd::usrp::DEVICE3_TX_MAX_HDR_LEN) / - float(X300_DATA_FRAME_MAX_SIZE + 8 /* UDP header */ + 20 /* Ethernet header length */ ))); -static const size_t X300_MAX_RATE_1GIGE = (size_t)( // bytes/s - 1e9 / 8 * // wire speed multiplied by percentage of packets that is sample data - ( float(X300_DATA_FRAME_MAX_SIZE - uhd::usrp::DEVICE3_TX_MAX_HDR_LEN) / - float(X300_DATA_FRAME_MAX_SIZE + 8 /* UDP header */ + 20 /* Ethernet header length */ ))); - -#define X300_RADIO_DEST_PREFIX_TX 0 - -#define X300_XB_DST_E0 0 -#define X300_XB_DST_E1 1 -#define X300_XB_DST_PCI 2 -#define X300_XB_DST_R0 3 // Radio 0 -> Slot A -#define X300_XB_DST_R1 4 // Radio 1 -> Slot B -#define X300_XB_DST_CE0 5 - -#define X300_SRC_ADDR0 0 -#define X300_SRC_ADDR1 1 -#define X300_DST_ADDR 2 - // Ethernet ports enum x300_eth_iface_t { |