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-rw-r--r--host/lib/usrp/usrp_e100/dboard_impl.cpp15
-rw-r--r--host/lib/usrp/usrp_e100/io_impl.cpp17
-rw-r--r--host/lib/usrp/usrp_e100/usrp_e100_impl.cpp12
-rw-r--r--host/lib/usrp/usrp_e100/usrp_e100_impl.hpp9
4 files changed, 39 insertions, 14 deletions
diff --git a/host/lib/usrp/usrp_e100/dboard_impl.cpp b/host/lib/usrp/usrp_e100/dboard_impl.cpp
index 0b89fed9f..f6bbbd5e8 100644
--- a/host/lib/usrp/usrp_e100/dboard_impl.cpp
+++ b/host/lib/usrp/usrp_e100/dboard_impl.cpp
@@ -31,15 +31,19 @@ using namespace uhd::usrp;
* Dboard Initialization
**********************************************************************/
void usrp_e100_impl::dboard_init(void){
+ //read the dboard eeprom to extract the dboard ids
_rx_db_eeprom.load(*_iface, I2C_ADDR_RX_DB);
_tx_db_eeprom.load(*_iface, I2C_ADDR_TX_DB);
+ _gdb_eeprom.load(*_iface, I2C_ADDR_TX_DB ^ 5);
//create a new dboard interface and manager
_dboard_iface = make_usrp_e100_dboard_iface(
_iface, _clock_ctrl, _codec_ctrl
);
_dboard_manager = dboard_manager::make(
- _rx_db_eeprom.id, _tx_db_eeprom.id, _dboard_iface
+ _rx_db_eeprom.id,
+ ((_gdb_eeprom.id == dboard_id_t::none())? _tx_db_eeprom : _gdb_eeprom).id,
+ _dboard_iface
);
//setup the dboard proxies
@@ -136,6 +140,10 @@ void usrp_e100_impl::tx_dboard_get(const wax::obj &key_, wax::obj &val){
val = _tx_db_eeprom;
return;
+ case DBOARD_PROP_GBOARD_EEPROM:
+ val = _gdb_eeprom;
+ return;
+
case DBOARD_PROP_DBOARD_IFACE:
val = _dboard_iface;
return;
@@ -167,6 +175,11 @@ void usrp_e100_impl::tx_dboard_set(const wax::obj &key, const wax::obj &val){
_tx_db_eeprom.store(*_iface, I2C_ADDR_TX_DB);
return;
+ case DBOARD_PROP_GBOARD_EEPROM:
+ _gdb_eeprom = val.as<dboard_eeprom_t>();
+ _gdb_eeprom.store(*_iface, I2C_ADDR_TX_DB ^ 5);
+ return;
+
default: UHD_THROW_PROP_SET_ERROR();
}
}
diff --git a/host/lib/usrp/usrp_e100/io_impl.cpp b/host/lib/usrp/usrp_e100/io_impl.cpp
index cbab5a761..40b8a2393 100644
--- a/host/lib/usrp/usrp_e100/io_impl.cpp
+++ b/host/lib/usrp/usrp_e100/io_impl.cpp
@@ -31,8 +31,6 @@ using namespace uhd;
using namespace uhd::usrp;
using namespace uhd::transport;
-zero_copy_if::sptr usrp_e100_make_mmap_zero_copy(usrp_e100_iface::sptr iface);
-
/***********************************************************************
* Constants
**********************************************************************/
@@ -49,8 +47,8 @@ static const bool recv_debug = false;
* - vrt packet handler states
**********************************************************************/
struct usrp_e100_impl::io_impl{
- io_impl(usrp_e100_iface::sptr iface):
- data_xport(usrp_e100_make_mmap_zero_copy(iface)),
+ io_impl(zero_copy_if::sptr &xport):
+ data_xport(xport),
get_recv_buffs_fcn(boost::bind(&usrp_e100_impl::io_impl::get_recv_buffs, this, _1)),
get_send_buffs_fcn(boost::bind(&usrp_e100_impl::io_impl::get_send_buffs, this, _1)),
recv_pirate_booty(data_xport->get_num_recv_frames()),
@@ -79,7 +77,8 @@ struct usrp_e100_impl::io_impl{
//The data transport is listed first so that it is deconstructed last,
//which is after the states and booty which may hold managed buffers.
- zero_copy_if::sptr data_xport;
+ //This comment is invalid because its now a reference and not stored here.
+ zero_copy_if::sptr &data_xport;
//bound callbacks for get buffs (bound once here, not in fast-path)
vrt_packet_handler::get_recv_buffs_t get_recv_buffs_fcn;
@@ -109,9 +108,9 @@ struct usrp_e100_impl::io_impl{
void usrp_e100_impl::io_impl::recv_pirate_loop(
boost::barrier &spawn_barrier, usrp_e100_clock_ctrl::sptr clock_ctrl
){
+ recv_pirate_crew_raiding = true;
spawn_barrier.wait();
set_thread_priority_safe();
- recv_pirate_crew_raiding = true;
while(recv_pirate_crew_raiding){
managed_recv_buffer::sptr buff = this->data_xport->get_recv_buff();
@@ -181,7 +180,7 @@ void usrp_e100_impl::io_init(void){
_recv_otw_type.byteorder = otw_type_t::BO_LITTLE_ENDIAN;
//setup before the registers (transport called to calculate max spp)
- _io_impl = UHD_PIMPL_MAKE(io_impl, (_iface));
+ _io_impl = UHD_PIMPL_MAKE(io_impl, (_data_xport));
//clear state machines
_iface->poke32(UE_REG_CTRL_RX_CLEAR, 0);
@@ -234,7 +233,7 @@ size_t usrp_e100_impl::get_max_send_samps_per_packet(void) const{
+ vrt::max_if_hdr_words32*sizeof(boost::uint32_t)
- sizeof(vrt::if_packet_info_t().cid) //no class id ever used
;
- size_t bpp = _io_impl->data_xport->get_send_frame_size() - hdr_size;
+ size_t bpp = _send_frame_size - hdr_size;
return bpp/_send_otw_type.get_sample_size();
}
@@ -265,7 +264,7 @@ size_t usrp_e100_impl::get_max_recv_samps_per_packet(void) const{
+ sizeof(vrt::if_packet_info_t().tlr) //forced to have trailer
- sizeof(vrt::if_packet_info_t().cid) //no class id ever used
;
- size_t bpp = _io_impl->data_xport->get_recv_frame_size() - hdr_size;
+ size_t bpp = _recv_frame_size - hdr_size;
return bpp/_recv_otw_type.get_sample_size();
}
diff --git a/host/lib/usrp/usrp_e100/usrp_e100_impl.cpp b/host/lib/usrp/usrp_e100/usrp_e100_impl.cpp
index a8fbe5d69..fe839c409 100644
--- a/host/lib/usrp/usrp_e100/usrp_e100_impl.cpp
+++ b/host/lib/usrp/usrp_e100/usrp_e100_impl.cpp
@@ -138,7 +138,7 @@ static device::sptr usrp_e100_make(const device_addr_t &device_addr){
) % USRP_E_FPGA_COMPAT_NUM % fpga_compat_num));
}
- return device::sptr(new usrp_e100_impl(iface));
+ return device::sptr(new usrp_e100_impl(iface, device_addr));
}
UHD_STATIC_BLOCK(register_usrp_e100_device){
@@ -148,7 +148,15 @@ UHD_STATIC_BLOCK(register_usrp_e100_device){
/***********************************************************************
* Structors
**********************************************************************/
-usrp_e100_impl::usrp_e100_impl(usrp_e100_iface::sptr iface): _iface(iface){
+usrp_e100_impl::usrp_e100_impl(
+ usrp_e100_iface::sptr iface,
+ const device_addr_t &device_addr
+):
+ _iface(iface),
+ _data_xport(usrp_e100_make_mmap_zero_copy(_iface)),
+ _recv_frame_size(std::min(_data_xport->get_recv_frame_size(), size_t(device_addr.cast<double>("recv_frame_size", 1e9)))),
+ _send_frame_size(std::min(_data_xport->get_send_frame_size(), size_t(device_addr.cast<double>("send_frame_size", 1e9))))
+{
//setup interfaces into hardware
_clock_ctrl = usrp_e100_clock_ctrl::make(_iface);
diff --git a/host/lib/usrp/usrp_e100/usrp_e100_impl.hpp b/host/lib/usrp/usrp_e100/usrp_e100_impl.hpp
index 98117cf26..ab3379dd5 100644
--- a/host/lib/usrp/usrp_e100/usrp_e100_impl.hpp
+++ b/host/lib/usrp/usrp_e100/usrp_e100_impl.hpp
@@ -26,10 +26,13 @@
#include <uhd/types/clock_config.hpp>
#include <uhd/types/stream_cmd.hpp>
#include <uhd/usrp/dboard_manager.hpp>
+#include <uhd/transport/zero_copy.hpp>
#ifndef INCLUDED_USRP_E100_IMPL_HPP
#define INCLUDED_USRP_E100_IMPL_HPP
+uhd::transport::zero_copy_if::sptr usrp_e100_make_mmap_zero_copy(usrp_e100_iface::sptr iface);
+
static const boost::uint16_t USRP_E_FPGA_COMPAT_NUM = 0x03;
//! load an fpga image from a bin file into the usrp-e fpga
@@ -79,7 +82,7 @@ private:
class usrp_e100_impl : public uhd::device{
public:
//structors
- usrp_e100_impl(usrp_e100_iface::sptr);
+ usrp_e100_impl(usrp_e100_iface::sptr, const uhd::device_addr_t &);
~usrp_e100_impl(void);
//the io interface
@@ -94,7 +97,9 @@ private:
usrp_e100_iface::sptr _iface;
//handle io stuff
+ uhd::transport::zero_copy_if::sptr _data_xport;
UHD_PIMPL_DECL(io_impl) _io_impl;
+ size_t _recv_frame_size, _send_frame_size;
uhd::otw_type_t _send_otw_type, _recv_otw_type;
void io_init(void);
void issue_stream_cmd(const uhd::stream_cmd_t &stream_cmd);
@@ -132,7 +137,7 @@ private:
wax_obj_proxy::sptr _rx_dboard_proxy;
//tx dboard functions and settings
- uhd::usrp::dboard_eeprom_t _tx_db_eeprom;
+ uhd::usrp::dboard_eeprom_t _tx_db_eeprom, _gdb_eeprom;
void tx_dboard_get(const wax::obj &, wax::obj &);
void tx_dboard_set(const wax::obj &, const wax::obj &);
wax_obj_proxy::sptr _tx_dboard_proxy;
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-15 05:27:04 +0000