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Diffstat (limited to 'host/lib/usrp/usrp1/usrp1_ctrl.cpp')
-rw-r--r--host/lib/usrp/usrp1/usrp1_ctrl.cpp35
1 files changed, 21 insertions, 14 deletions
diff --git a/host/lib/usrp/usrp1/usrp1_ctrl.cpp b/host/lib/usrp/usrp1/usrp1_ctrl.cpp
index 451129ef5..5043aed7d 100644
--- a/host/lib/usrp/usrp1/usrp1_ctrl.cpp
+++ b/host/lib/usrp/usrp1/usrp1_ctrl.cpp
@@ -38,6 +38,8 @@ enum firmware_code {
#define FX2_FIRMWARE_LOAD 0xa0
+static const bool load_img_msg = true;
+
/***********************************************************************
* Helper Functions
**********************************************************************/
@@ -178,6 +180,7 @@ public:
unsigned char reset_n = 0;
//hit the reset line
+ if (load_img_msg) std::cout << "Loading firmware image: " << filestring << "..." << std::flush;
usrp_control_write(FX2_FIRMWARE_LOAD, 0xe600, 0,
&reset_y, 1);
@@ -206,14 +209,14 @@ public:
}
//type 0x01 is end
else if (type == 0x01) {
+ usrp_set_firmware_hash(hash); //set hash before reset
usrp_control_write(FX2_FIRMWARE_LOAD, 0xe600, 0,
&reset_n, 1);
- usrp_set_firmware_hash(hash);
file.close();
//wait for things to settle
boost::this_thread::sleep(boost::posix_time::milliseconds(1000));
-
+ if (load_img_msg) std::cout << " done" << std::endl;
return USRP_FIRMWARE_LOAD_SUCCESS;
}
//type anything else is unhandled
@@ -249,45 +252,49 @@ public:
unsigned char buf[ep0_size];
int ret;
- FILE *fp;
- if ((fp = fopen(filename, "rb")) == NULL) {
+ if (load_img_msg) std::cout << "Loading FPGA image: " << filestring << "..." << std::flush;
+ std::ifstream file;
+ file.open(filename, std::ios::in | std::ios::binary);
+ if (not file.good()) {
std::cerr << "cannot open fpga input file" << std::endl;
- fclose(fp);
+ file.close();
return -1;
}
if (usrp_control_write_cmd(VRQ_FPGA_LOAD, 0, FL_BEGIN) < 0) {
std::cerr << "fpga load error" << std::endl;
- fclose(fp);
+ file.close();
return -1;
}
- ssize_t n;
- while ((n = fread(buf, 1, sizeof(buf), fp)) > 0) {
+ while (not file.eof()) {
+ file.read((char *)buf, sizeof(buf));
+ size_t n = file.gcount();
ret = usrp_control_write(VRQ_FPGA_LOAD, 0, FL_XFER,
buf, n);
- if (ret != n) {
+ if (ret < 0 or size_t(ret) != n) {
std::cerr << "fpga load error " << ret << std::endl;
- fclose(fp);
+ file.close();
return -1;
}
}
if (usrp_control_write_cmd(VRQ_FPGA_LOAD, 0, FL_END) < 0) {
std::cerr << "fpga load error" << std::endl;
- fclose(fp);
+ file.close();
return -1;
}
usrp_set_fpga_hash(hash);
- fclose(fp);
+ file.close();
+ if (load_img_msg) std::cout << " done" << std::endl;
return 0;
}
int usrp_load_eeprom(std::string filestring)
{
const char *filename = filestring.c_str();
- const uint16_t i2c_addr = 0x50;
+ const boost::uint16_t i2c_addr = 0x50;
//FIXME: verify types
int len;
@@ -416,7 +423,7 @@ public:
}
- int usrp_control_write_cmd(uint8_t request, uint16_t value, uint16_t index)
+ int usrp_control_write_cmd(boost::uint8_t request, boost::uint16_t value, boost::uint16_t index)
{
return usrp_control_write(request, value, index, 0, 0);
}