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-rw-r--r--host/lib/usrp/e100/clock_ctrl.cpp22
-rw-r--r--host/lib/usrp/e100/codec_ctrl.cpp6
-rw-r--r--host/lib/usrp/e100/e100_ctrl.cpp8
-rw-r--r--host/lib/usrp/e100/e100_impl.cpp28
-rw-r--r--host/lib/usrp/e100/e100_mmap_zero_copy.cpp42
-rw-r--r--host/lib/usrp/e100/fpga_downloader.cpp17
-rw-r--r--host/lib/usrp/e100/io_impl.cpp2
7 files changed, 60 insertions, 65 deletions
diff --git a/host/lib/usrp/e100/clock_ctrl.cpp b/host/lib/usrp/e100/clock_ctrl.cpp
index b49b30a6a..567a4b8fb 100644
--- a/host/lib/usrp/e100/clock_ctrl.cpp
+++ b/host/lib/usrp/e100/clock_ctrl.cpp
@@ -17,7 +17,7 @@
#include "clock_ctrl.hpp"
#include "ad9522_regs.hpp"
-#include <uhd/utils/msg.hpp>
+
#include <uhd/utils/log.hpp>
#include <uhd/utils/assert_has.hpp>
#include <stdint.h>
@@ -136,11 +136,11 @@ static clock_settings_type get_clock_settings(double rate){
cs.chan_divider /= cs.vco_divider;
}
- UHD_LOGV(always)
- << "gcd " << gcd << std::endl
- << "X " << X << std::endl
- << "Y " << Y << std::endl
- << cs.to_pp_string() << std::endl
+ UHD_LOGGER_DEBUG("E100")
+ << "gcd: " << gcd
+ << " X: " << X
+ << " Y: " << Y
+ << cs.to_pp_string()
;
//filter limits on the counters
@@ -154,7 +154,7 @@ static clock_settings_type get_clock_settings(double rate){
if (cs.get_vco_rate() < 1400e6 + vco_bound_pad) continue;
if (cs.get_out_rate() != rate) continue;
- UHD_MSG(status) << "USRP-E100 clock control: " << i << std::endl << cs.to_pp_string() << std::endl;
+ UHD_LOGGER_INFO("E100") << "USRP-E100 clock control: " << i << cs.to_pp_string() ;
return cs;
}
}
@@ -194,7 +194,7 @@ public:
this->use_internal_ref();
//initialize the FPGA clock rate
- UHD_MSG(status) << boost::format("Initializing FPGA clock to %fMHz...") % (master_clock_rate/1e6) << std::endl;
+ UHD_LOGGER_INFO("E100") << boost::format("Initializing FPGA clock to %fMHz...") % (master_clock_rate/1e6) ;
this->set_fpga_clock_rate(master_clock_rate);
this->enable_test_clock(ENABLE_THE_TEST_OUT);
@@ -459,7 +459,7 @@ private:
void send_reg(uint16_t addr){
uint32_t reg = _ad9522_regs.get_write_reg(addr);
- UHD_LOGV(often) << "clock control write reg: " << std::hex << reg << std::endl;
+ UHD_LOGGER_DEBUG("E100") << "clock control write reg: " << std::hex << reg ;
_iface->write_spi(
UE_SPI_SS_AD9522,
spi_config_t::EDGE_RISE,
@@ -486,7 +486,7 @@ private:
_ad9522_regs.set_reg(addr, reg);
if (_ad9522_regs.vco_calibration_finished) goto wait_for_ld;
}
- UHD_MSG(error) << "USRP-E100 clock control: VCO calibration timeout" << std::endl;
+ UHD_LOGGER_ERROR("E100") << "USRP-E100 clock control: VCO calibration timeout" ;
wait_for_ld:
//wait for digital lock detect:
for (size_t ms10 = 0; ms10 < 100; ms10++){
@@ -498,7 +498,7 @@ private:
_ad9522_regs.set_reg(addr, reg);
if (_ad9522_regs.digital_lock_detect) return;
}
- UHD_MSG(error) << "USRP-E100 clock control: lock detection timeout" << std::endl;
+ UHD_LOGGER_ERROR("E100") << "USRP-E100 clock control: lock detection timeout" ;
}
void soft_sync(void){
diff --git a/host/lib/usrp/e100/codec_ctrl.cpp b/host/lib/usrp/e100/codec_ctrl.cpp
index 7dce01e46..ee26c1990 100644
--- a/host/lib/usrp/e100/codec_ctrl.cpp
+++ b/host/lib/usrp/e100/codec_ctrl.cpp
@@ -260,7 +260,7 @@ void e100_codec_ctrl_impl::write_aux_dac(aux_dac_t which, double volts){
**********************************************************************/
void e100_codec_ctrl_impl::send_reg(uint8_t addr){
uint32_t reg = _ad9862_regs.get_write_reg(addr);
- UHD_LOGV(often) << "codec control write reg: " << std::hex << reg << std::endl;
+ UHD_LOGGER_DEBUG("E100") << "codec control write reg: " << std::hex << reg ;
_iface->write_spi(
UE_SPI_SS_AD9862,
spi_config_t::EDGE_RISE,
@@ -270,13 +270,13 @@ void e100_codec_ctrl_impl::send_reg(uint8_t addr){
void e100_codec_ctrl_impl::recv_reg(uint8_t addr){
uint32_t reg = _ad9862_regs.get_read_reg(addr);
- UHD_LOGV(often) << "codec control read reg: " << std::hex << reg << std::endl;
+ UHD_LOGGER_DEBUG("E100") << "codec control read reg: " << std::hex << reg ;
uint32_t ret = _iface->read_spi(
UE_SPI_SS_AD9862,
spi_config_t::EDGE_RISE,
reg, 16
);
- UHD_LOGV(often) << "codec control read ret: " << std::hex << ret << std::endl;
+ UHD_LOGGER_DEBUG("E100") << "codec control read ret: " << std::hex << ret ;
_ad9862_regs.set_reg(addr, uint16_t(ret));
}
diff --git a/host/lib/usrp/e100/e100_ctrl.cpp b/host/lib/usrp/e100/e100_ctrl.cpp
index 777d1b5d5..41525300c 100644
--- a/host/lib/usrp/e100/e100_ctrl.cpp
+++ b/host/lib/usrp/e100/e100_ctrl.cpp
@@ -19,7 +19,7 @@
#include "e100_regs.hpp"
#include <uhd/exception.hpp>
#include <uhd/utils/log.hpp>
-#include <uhd/utils/msg.hpp>
+
#include <sys/ioctl.h> //ioctl
#include <fcntl.h> //open, close
#include <linux/usrp_e.h> //ioctl structures and constants
@@ -218,7 +218,7 @@ public:
void write_uart(const std::string &buf){
const ssize_t ret = ::write(_node_fd, buf.c_str(), buf.size());
- if (size_t(ret) != buf.size()) UHD_LOG << ret;
+ if (size_t(ret) != buf.size()) UHD_LOGGER_DEBUG("E100")<< ret;
}
std::string read_uart(double timeout){
@@ -329,7 +329,7 @@ public:
* Structors
******************************************************************/
e100_ctrl_impl(const std::string &node){
- UHD_MSG(status) << "Opening device node " << node << "..." << std::endl;
+ UHD_LOGGER_INFO("E100") << "Opening device node " << node << "..." ;
//open the device node and check file descriptor
if ((_node_fd = ::open(node.c_str(), O_RDWR)) < 0){
@@ -349,7 +349,7 @@ public:
edge_file << "rising" << std::endl << std::flush;
edge_file.close();
_irq_fd = ::open("/sys/class/gpio/gpio147/value", O_RDONLY);
- if (_irq_fd < 0) UHD_MSG(error) << "Unable to open GPIO for IRQ\n";
+ if (_irq_fd < 0) UHD_LOGGER_ERROR("E100") << "Unable to open GPIO for IRQ\n";
}
~e100_ctrl_impl(void){
diff --git a/host/lib/usrp/e100/e100_impl.cpp b/host/lib/usrp/e100/e100_impl.cpp
index 41ba24d8f..ddb21fc35 100644
--- a/host/lib/usrp/e100/e100_impl.cpp
+++ b/host/lib/usrp/e100/e100_impl.cpp
@@ -18,7 +18,7 @@
#include "apply_corrections.hpp"
#include "e100_impl.hpp"
#include "e100_regs.hpp"
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <uhd/exception.hpp>
#include <uhd/utils/static.hpp>
#include <uhd/utils/paths.hpp>
@@ -140,7 +140,7 @@ e100_impl::e100_impl(const uhd::device_addr_t &device_addr){
e100_fpga_image = find_image_path(device_addr.get("fpga", default_fpga_file_name));
}
catch(...){
- UHD_MSG(error) << boost::format("Could not find FPGA image. %s\n") % print_utility_error("uhd_images_downloader.py");
+ UHD_LOGGER_ERROR("E100") << boost::format("Could not find FPGA image. %s") % print_utility_error("uhd_images_downloader.py");
throw;
}
e100_load_fpga(e100_fpga_image);
@@ -151,10 +151,10 @@ e100_impl::e100_impl(const uhd::device_addr_t &device_addr){
bool dboard_clocks_diff = true;
if (mb_eeprom.get("revision", "0") == "3") dboard_clocks_diff = false;
else if (mb_eeprom.get("revision", "0") == "4") dboard_clocks_diff = true;
- else UHD_MSG(warning)
+ else UHD_LOGGER_WARNING("E100")
<< "Unknown E1XX revision number!\n"
<< "defaulting to differential dboard clocks to be safe.\n"
- << std::endl;
+ ;
const double master_clock_rate = device_addr.cast<double>("master_clock_rate", E100_DEFAULT_CLOCK_RATE);
_aux_spi_iface = e100_ctrl::make_aux_spi_iface();
_clock_ctrl = e100_clock_ctrl::make(_aux_spi_iface, master_clock_rate, dboard_clocks_diff);
@@ -179,7 +179,7 @@ e100_impl::e100_impl(const uhd::device_addr_t &device_addr){
//Perform wishbone readback tests, these tests also write the hash
bool test_fail = false;
- UHD_MSG(status) << "Performing control readback test... " << std::flush;
+ UHD_LOGGER_INFO("E100") << "Performing control readback test... ";
size_t hash = time(NULL);
for (size_t i = 0; i < 100; i++){
boost::hash_combine(hash, i);
@@ -187,12 +187,12 @@ e100_impl::e100_impl(const uhd::device_addr_t &device_addr){
test_fail = _fifo_ctrl->peek32(REG_RB_CONFIG0) != uint32_t(hash);
if (test_fail) break; //exit loop on any failure
}
- UHD_MSG(status) << ((test_fail)? " fail" : "pass") << std::endl;
+ UHD_LOGGER_INFO("E100") << "Control readback test " << ((test_fail)? "failed" : "passed");
- if (test_fail) UHD_MSG(error) << boost::format(
- "The FPGA is either clocked improperly\n"
- "or the FPGA build is not compatible.\n"
- "Subsequent errors may follow...\n"
+ if (test_fail) UHD_LOGGER_ERROR("E100") << boost::format(
+ "The FPGA is either clocked improperly "
+ "or the FPGA build is not compatible. "
+ "Subsequent errors may follow..."
);
//check that the compatibility is correct
@@ -260,12 +260,12 @@ e100_impl::e100_impl(const uhd::device_addr_t &device_addr){
static const fs::path GPSDO_VOLATILE_PATH("/media/ram/e100_internal_gpsdo.cache");
if (not fs::exists(GPSDO_VOLATILE_PATH))
{
- UHD_MSG(status) << "Detecting internal GPSDO.... " << std::flush;
+ UHD_LOGGER_INFO("E100") << "Detecting internal GPSDO.... ";
try{
_gps = gps_ctrl::make(e100_ctrl::make_gps_uart_iface(E100_UART_DEV_NODE));
}
catch(std::exception &e){
- UHD_MSG(error) << "An error occurred making GPSDO control: " << e.what() << std::endl;
+ UHD_LOGGER_ERROR("E100") << "An error occurred making GPSDO control: " << e.what();
}
if (_gps and _gps->gps_detected())
{
@@ -475,10 +475,10 @@ e100_impl::e100_impl(const uhd::device_addr_t &device_addr){
//GPS installed: use external ref, time, and init time spec
if (_gps and _gps->gps_detected()){
_time64->enable_gpsdo();
- UHD_MSG(status) << "Setting references to the internal GPSDO" << std::endl;
+ UHD_LOGGER_INFO("E100") << "Setting references to the internal GPSDO";
_tree->access<std::string>(mb_path / "time_source/value").set("gpsdo");
_tree->access<std::string>(mb_path / "clock_source/value").set("gpsdo");
- UHD_MSG(status) << "Initializing time to the internal GPSDO" << std::endl;
+ UHD_LOGGER_INFO("E100") << "Initializing time to the internal GPSDO";
_time64->set_time_next_pps(time_spec_t(time_t(_gps->get_sensor("gps_time").to_int()+1)));
}
diff --git a/host/lib/usrp/e100/e100_mmap_zero_copy.cpp b/host/lib/usrp/e100/e100_mmap_zero_copy.cpp
index 57e4e32d9..4e698eae9 100644
--- a/host/lib/usrp/e100/e100_mmap_zero_copy.cpp
+++ b/host/lib/usrp/e100/e100_mmap_zero_copy.cpp
@@ -42,14 +42,14 @@ public:
_mem(mem), _info(info) { /* NOP */ }
void release(void){
- if (fp_verbose) UHD_LOGV(always) << "recv buff: release" << std::endl;
+ if (fp_verbose) UHD_LOGGER_DEBUG("E100") << "recv buff: release" ;
_info->flags = RB_KERNEL; //release the frame
}
UHD_INLINE bool ready(void){return _info->flags & RB_USER;}
UHD_INLINE sptr get_new(void){
- if (fp_verbose) UHD_LOGV(always) << " make_recv_buff: " << _info->len << std::endl;
+ if (fp_verbose) UHD_LOGGER_DEBUG("E100") << " make_recv_buff: " << _info->len ;
_info->flags = RB_USER_PROCESS; //claim the frame
return make(this, _mem, _info->len);
}
@@ -69,18 +69,18 @@ public:
_mem(mem), _info(info), _len(len), _fd(fd) { /* NOP */ }
void release(void){
- if (fp_verbose) UHD_LOGV(always) << "send buff: commit " << size() << std::endl;
+ if (fp_verbose) UHD_LOGGER_DEBUG("E100") << "send buff: commit " << size() ;
_info->len = _len;//size();
_info->flags = RB_USER; //release the frame
if (::write(_fd, NULL, 0) < 0){ //notifies the kernel
- UHD_LOGV(rarely) << UHD_THROW_SITE_INFO("write error") << std::endl;
+ UHD_LOGGER_ERROR("E100") << UHD_THROW_SITE_INFO("write error") ;
}
}
UHD_INLINE bool ready(void){return _info->flags & RB_KERNEL;}
UHD_INLINE sptr get_new(void){
- if (fp_verbose) UHD_LOGV(always) << " make_send_buff: " << _len << std::endl;
+ if (fp_verbose) UHD_LOGGER_DEBUG("E100") << " make_send_buff: " << _len ;
_info->flags = RB_USER_PROCESS; //claim the frame
return make(this, _mem, _len);
}
@@ -112,13 +112,13 @@ public:
//print sizes summary
UHD_LOG
- << "page_size: " << page_size << std::endl
- << "frame_size: " << _frame_size << std::endl
- << "num_pages_rx_flags: " << _rb_size.num_pages_rx_flags << std::endl
- << "num_rx_frames: " << _rb_size.num_rx_frames << std::endl
- << "num_pages_tx_flags: " << _rb_size.num_pages_tx_flags << std::endl
- << "num_tx_frames: " << _rb_size.num_tx_frames << std::endl
- << "map_size: " << _map_size << std::endl
+ << "page_size: " << page_size
+ << "frame_size: " << _frame_size
+ << "num_pages_rx_flags: " << _rb_size.num_pages_rx_flags
+ << "num_rx_frames: " << _rb_size.num_rx_frames
+ << "num_pages_tx_flags: " << _rb_size.num_pages_tx_flags
+ << "num_tx_frames: " << _rb_size.num_tx_frames
+ << "map_size: " << _map_size
;
//call mmap to get the memory
@@ -135,10 +135,10 @@ public:
//print offset summary
UHD_LOG
- << "recv_info_off: " << recv_info_off << std::endl
- << "recv_buff_off: " << recv_buff_off << std::endl
- << "send_info_off: " << send_info_off << std::endl
- << "send_buff_off: " << send_buff_off << std::endl
+ << "recv_info_off: " << recv_info_off
+ << "recv_buff_off: " << recv_buff_off
+ << "send_info_off: " << send_info_off
+ << "send_buff_off: " << send_buff_off
;
//pointers to sections in the mapped memory
@@ -170,12 +170,12 @@ public:
}
~e100_mmap_zero_copy_impl(void){
- UHD_LOG << "cleanup: munmap" << std::endl;
+ UHD_LOGGER_DEBUG("E100")<< "cleanup: munmap" ;
::munmap(_mapped_mem, _map_size);
}
managed_recv_buffer::sptr get_recv_buff(double timeout){
- if (fp_verbose) UHD_LOGV(always) << "get_recv_buff: " << _recv_index << std::endl;
+ if (fp_verbose) UHD_LOGGER_DEBUG("E100") << "get_recv_buff: " << _recv_index ;
e100_mmap_zero_copy_mrb &mrb = *_mrb_pool[_recv_index];
//poll/wait for a ready frame
@@ -185,7 +185,7 @@ public:
pfd.fd = _fd;
pfd.events = POLLIN;
ssize_t poll_ret = ::poll(&pfd, 1, size_t(timeout*1e3/poll_breakout));
- if (fp_verbose) UHD_LOGV(always) << " POLLIN: " << poll_ret << std::endl;
+ if (fp_verbose) UHD_LOGGER_DEBUG("E100") << " POLLIN: " << poll_ret ;
if (poll_ret > 0) goto found_user_frame; //good poll, continue on
}
return managed_recv_buffer::sptr(); //timed-out for real
@@ -207,7 +207,7 @@ public:
}
managed_send_buffer::sptr get_send_buff(double timeout){
- if (fp_verbose) UHD_LOGV(always) << "get_send_buff: " << _send_index << std::endl;
+ if (fp_verbose) UHD_LOGGER_DEBUG("E100") << "get_send_buff: " << _send_index ;
e100_mmap_zero_copy_msb &msb = *_msb_pool[_send_index];
//poll/wait for a ready frame
@@ -216,7 +216,7 @@ public:
pfd.fd = _fd;
pfd.events = POLLOUT;
ssize_t poll_ret = ::poll(&pfd, 1, size_t(timeout*1e3));
- if (fp_verbose) UHD_LOGV(always) << " POLLOUT: " << poll_ret << std::endl;
+ if (fp_verbose) UHD_LOGGER_DEBUG("E100") << " POLLOUT: " << poll_ret ;
if (poll_ret <= 0) return managed_send_buffer::sptr();
}
diff --git a/host/lib/usrp/e100/fpga_downloader.cpp b/host/lib/usrp/e100/fpga_downloader.cpp
index 9abde32f7..bfb207f39 100644
--- a/host/lib/usrp/e100/fpga_downloader.cpp
+++ b/host/lib/usrp/e100/fpga_downloader.cpp
@@ -23,18 +23,13 @@
#include <uhd/device.hpp>
#include <uhd/image_loader.hpp>
#include <uhd/types/device_addr.hpp>
-#include <uhd/utils/msg.hpp>
+#include <uhd/utils/log.hpp>
#include <uhd/utils/paths.hpp>
#include <uhd/utils/static.hpp>
#include "e100_impl.hpp"
#else //special case when this file is externally included
#include <stdexcept>
#include <iostream>
-#define UHD_MSG(type) std::cout
-namespace uhd{
- typedef std::runtime_error os_error;
- typedef std::runtime_error io_error;
-}
#endif
#include <sstream>
@@ -246,7 +241,7 @@ static void send_file_to_fpga(const std::string &file_name, gpio &error, gpio &d
throw uhd::os_error("INIT_B went high, error occured.");
if (!done.get_value())
- UHD_MSG(status) << "Configuration complete." << std::endl;
+ UHD_LOGGER_INFO("E100") << "Configuration complete.";
} while (bitstream.gcount() == BUF_SIZE);
}
@@ -260,20 +255,20 @@ void e100_load_fpga(const std::string &bin_file){
gpio gpio_init_b(INIT_B, IN);
gpio gpio_done (DONE, IN);
- UHD_MSG(status) << "Loading FPGA image: " << bin_file << "... " << std::flush;
+ UHD_LOGGER_INFO("E100") << "Loading FPGA image: " << bin_file << "... ";
// if(std::system("/sbin/rmmod usrp_e") != 0){
-// UHD_MSG(warning) << "USRP-E100 FPGA downloader: could not unload usrp_e module" << std::endl;
+// UHD_LOGGER_WARNING("E100") << "USRP-E100 FPGA downloader: could not unload usrp_e module" ;
// }
prepare_fpga_for_configuration(gpio_prog_b, gpio_init_b);
- UHD_MSG(status) << "done = " << gpio_done.get_value() << std::endl;
+ UHD_LOGGER_INFO("E100") << "done = " << gpio_done.get_value();
send_file_to_fpga(bin_file, gpio_init_b, gpio_done);
// if(std::system("/sbin/modprobe usrp_e") != 0){
-// UHD_MSG(warning) << "USRP-E100 FPGA downloader: could not load usrp_e module" << std::endl;
+// UHD_LOGGER_WARNING("E100") << "USRP-E100 FPGA downloader: could not load usrp_e module" ;
// }
}
diff --git a/host/lib/usrp/e100/io_impl.cpp b/host/lib/usrp/e100/io_impl.cpp
index aedf79d5f..acd14f17b 100644
--- a/host/lib/usrp/e100/io_impl.cpp
+++ b/host/lib/usrp/e100/io_impl.cpp
@@ -20,7 +20,7 @@
#include "../../transport/super_recv_packet_handler.hpp"
#include "../../transport/super_send_packet_handler.hpp"
#include "e100_impl.hpp"
-#include <uhd/utils/msg.hpp>
+
#include <uhd/utils/log.hpp>
#include <uhd/utils/tasks.hpp>
#include <boost/bind.hpp>
generated by cgit v1.2.3 (git 2.46.0) at 2025-11-04 10:07:12 +0000