2 files changed, 13 insertions, 1 deletions
diff --git a/host/lib/usrp/cores/tx_dsp_core_200.cpp b/host/lib/usrp/cores/tx_dsp_core_200.cpp
index 4e1a3e44d..c5de4e361 100644
--- a/host/lib/usrp/cores/tx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/tx_dsp_core_200.cpp
@@ -60,13 +60,23 @@ public:
     {
         //init the tx control registers
         this->clear();
+        this->set_underflow_policy("next_packet");
     }
 
     void clear(void){
         _iface->poke32(REG_TX_CTRL_CLEAR_STATE, 1); //reset
         _iface->poke32(REG_TX_CTRL_NUM_CHAN, 0);    //1 channel
         _iface->poke32(REG_TX_CTRL_REPORT_SID, _sid);
-        _iface->poke32(REG_TX_CTRL_POLICY, FLAG_TX_CTRL_POLICY_NEXT_PACKET);
+    }
+
+    void set_underflow_policy(const std::string &policy){
+        if (policy == "next_packet"){
+            _iface->poke32(REG_TX_CTRL_POLICY, FLAG_TX_CTRL_POLICY_NEXT_PACKET);
+        }
+        else if (policy == "next_burst"){
+            _iface->poke32(REG_TX_CTRL_POLICY, FLAG_TX_CTRL_POLICY_NEXT_BURST);
+        }
+        else throw uhd::value_error("USRP TX cannot handle requested underflow policy: " + policy);
     }
 
     void set_tick_rate(const double rate){
diff --git a/host/lib/usrp/cores/tx_dsp_core_200.hpp b/host/lib/usrp/cores/tx_dsp_core_200.hpp
index 50d128df4..4b39a5b07 100644
--- a/host/lib/usrp/cores/tx_dsp_core_200.hpp
+++ b/host/lib/usrp/cores/tx_dsp_core_200.hpp
@@ -50,6 +50,8 @@ public:
 
     virtual void set_updates(const size_t cycles_per_up, const size_t packets_per_up) = 0;
 
+    virtual void set_underflow_policy(const std::string &policy) = 0;
+
 };
 
 #endif /* INCLUDED_LIBUHD_USRP_TX_DSP_CORE_200_HPP */