diff options
Diffstat (limited to 'host/lib/usrp/common')
23 files changed, 427 insertions, 426 deletions
diff --git a/host/lib/usrp/common/ad9361_ctrl.cpp b/host/lib/usrp/common/ad9361_ctrl.cpp index 654311424..0dc5e7919 100644 --- a/host/lib/usrp/common/ad9361_ctrl.cpp +++ b/host/lib/usrp/common/ad9361_ctrl.cpp @@ -36,12 +36,12 @@ using namespace uhd::usrp; class ad9361_io_spi : public ad9361_io { public: - ad9361_io_spi(uhd::spi_iface::sptr spi_iface, boost::uint32_t slave_num) : + ad9361_io_spi(uhd::spi_iface::sptr spi_iface, uint32_t slave_num) : _spi_iface(spi_iface), _slave_num(slave_num) { } virtual ~ad9361_io_spi() { } - virtual boost::uint8_t peek8(boost::uint32_t reg) + virtual uint8_t peek8(uint32_t reg) { boost::lock_guard<boost::mutex> lock(_mutex); @@ -49,16 +49,16 @@ public: config.mosi_edge = uhd::spi_config_t::EDGE_FALL; config.miso_edge = uhd::spi_config_t::EDGE_FALL; //TODO (Ashish): FPGA SPI workaround. This should be EDGE_RISE - boost::uint32_t rd_word = AD9361_SPI_READ_CMD | - ((boost::uint32_t(reg) << AD9361_SPI_ADDR_SHIFT) & AD9361_SPI_ADDR_MASK); + uint32_t rd_word = AD9361_SPI_READ_CMD | + ((uint32_t(reg) << AD9361_SPI_ADDR_SHIFT) & AD9361_SPI_ADDR_MASK); - boost::uint32_t val = (_spi_iface->read_spi(_slave_num, config, rd_word, AD9361_SPI_NUM_BITS)); + uint32_t val = (_spi_iface->read_spi(_slave_num, config, rd_word, AD9361_SPI_NUM_BITS)); val &= 0xFF; - return static_cast<boost::uint8_t>(val); + return static_cast<uint8_t>(val); } - virtual void poke8(boost::uint32_t reg, boost::uint8_t val) + virtual void poke8(uint32_t reg, uint8_t val) { boost::lock_guard<boost::mutex> lock(_mutex); @@ -66,24 +66,24 @@ public: config.mosi_edge = uhd::spi_config_t::EDGE_FALL; config.miso_edge = uhd::spi_config_t::EDGE_FALL; //TODO (Ashish): FPGA SPI workaround. This should be EDGE_RISE - boost::uint32_t wr_word = AD9361_SPI_WRITE_CMD | - ((boost::uint32_t(reg) << AD9361_SPI_ADDR_SHIFT) & AD9361_SPI_ADDR_MASK) | - ((boost::uint32_t(val) << AD9361_SPI_DATA_SHIFT) & AD9361_SPI_DATA_MASK); + uint32_t wr_word = AD9361_SPI_WRITE_CMD | + ((uint32_t(reg) << AD9361_SPI_ADDR_SHIFT) & AD9361_SPI_ADDR_MASK) | + ((uint32_t(val) << AD9361_SPI_DATA_SHIFT) & AD9361_SPI_DATA_MASK); _spi_iface->write_spi(_slave_num, config, wr_word, AD9361_SPI_NUM_BITS); } private: uhd::spi_iface::sptr _spi_iface; - boost::uint32_t _slave_num; + uint32_t _slave_num; boost::mutex _mutex; - static const boost::uint32_t AD9361_SPI_WRITE_CMD = 0x00800000; - static const boost::uint32_t AD9361_SPI_READ_CMD = 0x00000000; - static const boost::uint32_t AD9361_SPI_ADDR_MASK = 0x003FFF00; - static const boost::uint32_t AD9361_SPI_ADDR_SHIFT = 8; - static const boost::uint32_t AD9361_SPI_DATA_MASK = 0x000000FF; - static const boost::uint32_t AD9361_SPI_DATA_SHIFT = 0; - static const boost::uint32_t AD9361_SPI_NUM_BITS = 24; + static const uint32_t AD9361_SPI_WRITE_CMD = 0x00800000; + static const uint32_t AD9361_SPI_READ_CMD = 0x00000000; + static const uint32_t AD9361_SPI_ADDR_MASK = 0x003FFF00; + static const uint32_t AD9361_SPI_ADDR_SHIFT = 8; + static const uint32_t AD9361_SPI_DATA_MASK = 0x000000FF; + static const uint32_t AD9361_SPI_DATA_SHIFT = 0; + static const uint32_t AD9361_SPI_NUM_BITS = 24; }; /*********************************************************************** @@ -98,13 +98,13 @@ public: _device.initialize(); } - void set_timed_spi(uhd::spi_iface::sptr spi_iface, boost::uint32_t slave_num) + void set_timed_spi(uhd::spi_iface::sptr spi_iface, uint32_t slave_num) { _timed_spi = boost::make_shared<ad9361_io_spi>(spi_iface, slave_num); _use_timed_spi(); } - void set_safe_spi(uhd::spi_iface::sptr spi_iface, boost::uint32_t slave_num) + void set_safe_spi(uhd::spi_iface::sptr spi_iface, uint32_t slave_num) { _safe_spi = boost::make_shared<ad9361_io_spi>(spi_iface, slave_num); } @@ -327,7 +327,7 @@ private: ad9361_ctrl::sptr ad9361_ctrl::make_spi( ad9361_params::sptr client_settings, uhd::spi_iface::sptr spi_iface, - boost::uint32_t slave_num + uint32_t slave_num ) { boost::shared_ptr<ad9361_io_spi> spi_io_iface = boost::make_shared<ad9361_io_spi>(spi_iface, slave_num); return sptr(new ad9361_ctrl_impl(client_settings, spi_io_iface)); diff --git a/host/lib/usrp/common/ad9361_ctrl.hpp b/host/lib/usrp/common/ad9361_ctrl.hpp index 5770c3ec4..5a10e4b5f 100644 --- a/host/lib/usrp/common/ad9361_ctrl.hpp +++ b/host/lib/usrp/common/ad9361_ctrl.hpp @@ -58,11 +58,11 @@ public: static sptr make_spi( ad9361_params::sptr client_settings, uhd::spi_iface::sptr spi_iface, - boost::uint32_t slave_num + uint32_t slave_num ); - virtual void set_timed_spi(uhd::spi_iface::sptr spi_iface, boost::uint32_t slave_num) = 0; - virtual void set_safe_spi(uhd::spi_iface::sptr spi_iface, boost::uint32_t slave_num) = 0; + virtual void set_timed_spi(uhd::spi_iface::sptr spi_iface, uint32_t slave_num) = 0; + virtual void set_safe_spi(uhd::spi_iface::sptr spi_iface, uint32_t slave_num) = 0; //! Get a list of gain names for RX or TX static std::vector<std::string> get_gain_names(const std::string &/*which*/) diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_client.h b/host/lib/usrp/common/ad9361_driver/ad9361_client.h index e9ea1404a..921045fbd 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_client.h +++ b/host/lib/usrp/common/ad9361_driver/ad9361_client.h @@ -51,10 +51,10 @@ typedef enum { * Interface timing */ typedef struct { - boost::uint8_t rx_clk_delay; - boost::uint8_t rx_data_delay; - boost::uint8_t tx_clk_delay; - boost::uint8_t tx_data_delay; + uint8_t rx_clk_delay; + uint8_t rx_data_delay; + uint8_t tx_clk_delay; + uint8_t tx_data_delay; } digital_interface_delays_t; class ad9361_params { @@ -76,8 +76,8 @@ public: virtual ~ad9361_io() {} - virtual boost::uint8_t peek8(boost::uint32_t reg) = 0; - virtual void poke8(boost::uint32_t reg, boost::uint8_t val) = 0; + virtual uint8_t peek8(uint32_t reg) = 0; + virtual void poke8(uint32_t reg, uint8_t val) = 0; }; diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp index 095017bb6..45ebf78bf 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp @@ -25,7 +25,7 @@ #include <uhd/exception.hpp> #include <uhd/utils/log.hpp> #include <uhd/utils/msg.hpp> -#include <boost/cstdint.hpp> +#include <stdint.h> #include <boost/date_time/posix_time/posix_time.hpp> #include <boost/thread/thread.hpp> #include <boost/scoped_array.hpp> @@ -107,9 +107,9 @@ const double ad9361_device_t::DEFAULT_TX_FREQ = 850e6; * how many taps are in the filter, and given a vector of the taps * themselves. */ -void ad9361_device_t::_program_fir_filter(direction_t direction, chain_t chain, int num_taps, boost::uint16_t *coeffs) +void ad9361_device_t::_program_fir_filter(direction_t direction, chain_t chain, int num_taps, uint16_t *coeffs) { - boost::uint16_t base; + uint16_t base; /* RX and TX filters use largely identical sets of programming registers. Select the appropriate bank of registers here. */ @@ -120,9 +120,9 @@ void ad9361_device_t::_program_fir_filter(direction_t direction, chain_t chain, } /* Encode number of filter taps for programming register */ - boost::uint8_t reg_numtaps = (((num_taps / 16) - 1) & 0x07) << 5; + uint8_t reg_numtaps = (((num_taps / 16) - 1) & 0x07) << 5; - boost::uint8_t reg_chain = 0; + uint8_t reg_chain = 0; switch (chain) { case CHAIN_1: reg_chain = 0x01 << 3; @@ -182,25 +182,25 @@ void ad9361_device_t::_program_fir_filter(direction_t direction, chain_t chain, /* Program the RX FIR Filter. */ -void ad9361_device_t::_setup_rx_fir(size_t num_taps, boost::int32_t decimation) +void ad9361_device_t::_setup_rx_fir(size_t num_taps, int32_t decimation) { if (not (decimation == 1 or decimation == 2 or decimation == 4)) { throw uhd::runtime_error("[ad9361_device_t] Invalid Rx FIR decimation."); } - boost::scoped_array<boost::uint16_t> coeffs(new boost::uint16_t[num_taps]); + boost::scoped_array<uint16_t> coeffs(new uint16_t[num_taps]); for (size_t i = 0; i < num_taps; i++) { switch (num_taps) { case 128: - coeffs[i] = boost::uint16_t((decimation==4) ? fir_128_x4_coeffs[i] : hb127_coeffs[i]); + coeffs[i] = uint16_t((decimation==4) ? fir_128_x4_coeffs[i] : hb127_coeffs[i]); break; case 96: - coeffs[i] = boost::uint16_t((decimation==4) ? fir_96_x4_coeffs[i] : hb95_coeffs[i]); + coeffs[i] = uint16_t((decimation==4) ? fir_96_x4_coeffs[i] : hb95_coeffs[i]); break; case 64: - coeffs[i] = boost::uint16_t((decimation==4) ? fir_64_x4_coeffs[i] : hb63_coeffs[i]); + coeffs[i] = uint16_t((decimation==4) ? fir_64_x4_coeffs[i] : hb63_coeffs[i]); break; case 48: - coeffs[i] = boost::uint16_t((decimation==4) ? fir_48_x4_coeffs[i] : hb47_coeffs[i]); + coeffs[i] = uint16_t((decimation==4) ? fir_48_x4_coeffs[i] : hb47_coeffs[i]); break; default: throw uhd::runtime_error("[ad9361_device_t] Unsupported number of Rx FIR taps."); @@ -211,7 +211,7 @@ void ad9361_device_t::_setup_rx_fir(size_t num_taps, boost::int32_t decimation) } /* Program the TX FIR Filter. */ -void ad9361_device_t::_setup_tx_fir(size_t num_taps, boost::int32_t interpolation) +void ad9361_device_t::_setup_tx_fir(size_t num_taps, int32_t interpolation) { if (not (interpolation == 1 or interpolation == 2 or interpolation == 4)) { throw uhd::runtime_error("[ad9361_device_t] Invalid Tx FIR interpolation."); @@ -219,20 +219,20 @@ void ad9361_device_t::_setup_tx_fir(size_t num_taps, boost::int32_t interpolatio if (interpolation == 1 and num_taps > 64) { throw uhd::runtime_error("[ad9361_device_t] Too many Tx FIR taps for interpolation value."); } - boost::scoped_array<boost::uint16_t> coeffs(new boost::uint16_t[num_taps]); + boost::scoped_array<uint16_t> coeffs(new uint16_t[num_taps]); for (size_t i = 0; i < num_taps; i++) { switch (num_taps) { case 128: - coeffs[i] = boost::uint16_t((interpolation==4) ? fir_128_x4_coeffs[i] : hb127_coeffs[i]); + coeffs[i] = uint16_t((interpolation==4) ? fir_128_x4_coeffs[i] : hb127_coeffs[i]); break; case 96: - coeffs[i] = boost::uint16_t((interpolation==4) ? fir_96_x4_coeffs[i] : hb95_coeffs[i]); + coeffs[i] = uint16_t((interpolation==4) ? fir_96_x4_coeffs[i] : hb95_coeffs[i]); break; case 64: - coeffs[i] = boost::uint16_t((interpolation==4) ? fir_64_x4_coeffs[i] : hb63_coeffs[i]); + coeffs[i] = uint16_t((interpolation==4) ? fir_64_x4_coeffs[i] : hb63_coeffs[i]); break; case 48: - coeffs[i] = boost::uint16_t((interpolation==4) ? fir_48_x4_coeffs[i] : hb47_coeffs[i]); + coeffs[i] = uint16_t((interpolation==4) ? fir_48_x4_coeffs[i] : hb47_coeffs[i]); break; default: throw uhd::runtime_error("[ad9361_device_t] Unsupported number of Tx FIR taps."); @@ -335,16 +335,16 @@ double ad9361_device_t::_calibrate_baseband_rx_analog_filter(double req_rfbw) } double rxtune_clk = ((1.4 * bbbw * 2 * M_PI) / M_LN2); - _rx_bbf_tunediv = std::min<boost::uint16_t>(511, boost::uint16_t(std::ceil(_bbpll_freq / rxtune_clk))); + _rx_bbf_tunediv = std::min<uint16_t>(511, uint16_t(std::ceil(_bbpll_freq / rxtune_clk))); _regs.bbftune_config = (_regs.bbftune_config & 0xFE) | ((_rx_bbf_tunediv >> 8) & 0x0001); double bbbw_mhz = bbbw / 1e6; double temp = ((bbbw_mhz - std::floor(bbbw_mhz)) * 1000) / 7.8125; - boost::uint8_t bbbw_khz = std::min<boost::uint8_t>(127, boost::uint8_t(std::floor(temp + 0.5))); + uint8_t bbbw_khz = std::min<uint8_t>(127, uint8_t(std::floor(temp + 0.5))); /* Set corner frequencies and dividers. */ - _io_iface->poke8(0x1fb, (boost::uint8_t) (bbbw_mhz)); + _io_iface->poke8(0x1fb, (uint8_t) (bbbw_mhz)); _io_iface->poke8(0x1fc, bbbw_khz); _io_iface->poke8(0x1f8, (_rx_bbf_tunediv & 0x00FF)); _io_iface->poke8(0x1f9, _regs.bbftune_config); @@ -402,7 +402,7 @@ double ad9361_device_t::_calibrate_baseband_tx_analog_filter(double req_rfbw) } double txtune_clk = ((1.6 * bbbw * 2 * M_PI) / M_LN2); - boost::uint16_t txbbfdiv = std::min<boost::uint16_t>(511, boost::uint16_t(std::ceil(_bbpll_freq / txtune_clk))); + uint16_t txbbfdiv = std::min<uint16_t>(511, uint16_t(std::ceil(_bbpll_freq / txtune_clk))); _regs.bbftune_mode = (_regs.bbftune_mode & 0xFE) | ((txbbfdiv >> 8) & 0x0001); @@ -481,7 +481,7 @@ double ad9361_device_t::_calibrate_secondary_tx_filter(double req_rfbw) cap = 63; } - boost::uint8_t reg0d0, reg0d1, reg0d2; + uint8_t reg0d0, reg0d1, reg0d2; /* Translate baseband bandwidths to register settings. */ if ((bbbw_mhz * 2) <= 9) { @@ -526,14 +526,14 @@ double ad9361_device_t::_calibrate_secondary_tx_filter(double req_rfbw) * UG570 page 33 states that this filter should be calibrated to 2.5 * bbbw */ double ad9361_device_t::_calibrate_rx_TIAs(double req_rfbw) { - boost::uint8_t reg1eb = _io_iface->peek8(0x1eb) & 0x3F; - boost::uint8_t reg1ec = _io_iface->peek8(0x1ec) & 0x7F; - boost::uint8_t reg1e6 = _io_iface->peek8(0x1e6) & 0x07; - boost::uint8_t reg1db = 0x00; - boost::uint8_t reg1dc = 0x00; - boost::uint8_t reg1dd = 0x00; - boost::uint8_t reg1de = 0x00; - boost::uint8_t reg1df = 0x00; + uint8_t reg1eb = _io_iface->peek8(0x1eb) & 0x3F; + uint8_t reg1ec = _io_iface->peek8(0x1ec) & 0x7F; + uint8_t reg1e6 = _io_iface->peek8(0x1e6) & 0x07; + uint8_t reg1db = 0x00; + uint8_t reg1dc = 0x00; + uint8_t reg1dd = 0x00; + uint8_t reg1de = 0x00; + uint8_t reg1df = 0x00; double bbbw = req_rfbw / 2.0; @@ -572,12 +572,12 @@ double ad9361_device_t::_calibrate_rx_TIAs(double req_rfbw) if (CTIA_fF > 2920) { reg1dc = 0x40; reg1de = 0x40; - boost::uint8_t temp = (boost::uint8_t) std::min<boost::uint8_t>(127, - boost::uint8_t(std::floor(0.5 + ((CTIA_fF - 400.0) / 320.0)))); + uint8_t temp = (uint8_t) std::min<uint8_t>(127, + uint8_t(std::floor(0.5 + ((CTIA_fF - 400.0) / 320.0)))); reg1dd = temp; reg1df = temp; } else { - boost::uint8_t temp = boost::uint8_t(std::floor(0.5 + ((CTIA_fF - 400.0) / 40.0)) + 0x40); + uint8_t temp = uint8_t(std::floor(0.5 + ((CTIA_fF - 400.0) / 40.0)) + 0x40); reg1dc = temp; reg1de = temp; reg1dd = 0; @@ -613,9 +613,9 @@ void ad9361_device_t::_setup_adc() bbbw_mhz = 0.20; } - boost::uint8_t rxbbf_c3_msb = _io_iface->peek8(0x1eb) & 0x3F; - boost::uint8_t rxbbf_c3_lsb = _io_iface->peek8(0x1ec) & 0x7F; - boost::uint8_t rxbbf_r2346 = _io_iface->peek8(0x1e6) & 0x07; + uint8_t rxbbf_c3_msb = _io_iface->peek8(0x1eb) & 0x3F; + uint8_t rxbbf_c3_lsb = _io_iface->peek8(0x1ec) & 0x7F; + uint8_t rxbbf_r2346 = _io_iface->peek8(0x1e6) & 0x07; double fsadc = _adcclock_freq / 1e6; @@ -644,71 +644,71 @@ void ad9361_device_t::_setup_adc() /* Calculate the values for all 40 settings registers. * * DO NOT TOUCH THIS UNLESS YOU KNOW EXACTLY WHAT YOU ARE DOING. kthx.*/ - boost::uint8_t data[40]; + uint8_t data[40]; data[0] = 0; data[1] = 0; data[2] = 0; data[3] = 0x24; data[4] = 0x24; data[5] = 0; data[6] = 0; - data[7] = std::min<boost::uint8_t>(124, boost::uint8_t(std::floor(-0.5 + data[7] = std::min<uint8_t>(124, uint8_t(std::floor(-0.5 + (80.0 * scale_snr * scale_res * std::min<double>(1.0, sqrt(maxsnr * fsadc / 640.0)))))); double data007 = data[7]; - data[8] = std::min<boost::uint8_t>(255, boost::uint8_t(std::floor(0.5 + data[8] = std::min<uint8_t>(255, uint8_t(std::floor(0.5 + ((20.0 * (640.0 / fsadc) * ((data007 / 80.0)) / (scale_res * scale_cap)))))); - data[10] = std::min<boost::uint8_t>(127, boost::uint8_t(std::floor(-0.5 + (77.0 * scale_res + data[10] = std::min<uint8_t>(127, uint8_t(std::floor(-0.5 + (77.0 * scale_res * std::min<double>(1.0, sqrt(maxsnr * fsadc / 640.0)))))); double data010 = data[10]; - data[9] = std::min<boost::uint8_t>(127, boost::uint8_t(std::floor(0.8 * data010))); - data[11] = std::min<boost::uint8_t>(255, boost::uint8_t(std::floor(0.5 + data[9] = std::min<uint8_t>(127, uint8_t(std::floor(0.8 * data010))); + data[11] = std::min<uint8_t>(255, uint8_t(std::floor(0.5 + (20.0 * (640.0 / fsadc) * ((data010 / 77.0) / (scale_res * scale_cap)))))); - data[12] = std::min<boost::uint8_t>(127, boost::uint8_t(std::floor(-0.5 + data[12] = std::min<uint8_t>(127, uint8_t(std::floor(-0.5 + (80.0 * scale_res * std::min<double>(1.0, sqrt(maxsnr * fsadc / 640.0)))))); double data012 = data[12]; - data[13] = std::min<boost::uint8_t>(255, boost::uint8_t(std::floor(-1.5 + data[13] = std::min<uint8_t>(255, uint8_t(std::floor(-1.5 + (20.0 * (640.0 / fsadc) * ((data012 / 80.0) / (scale_res * scale_cap)))))); - data[14] = 21 * boost::uint8_t(std::floor(0.1 * 640.0 / fsadc)); - data[15] = std::min<boost::uint8_t>(127, boost::uint8_t(1.025 * data007)); + data[14] = 21 * uint8_t(std::floor(0.1 * 640.0 / fsadc)); + data[15] = std::min<uint8_t>(127, uint8_t(1.025 * data007)); double data015 = data[15]; - data[16] = std::min<boost::uint8_t>(127, boost::uint8_t(std::floor((data015 + data[16] = std::min<uint8_t>(127, uint8_t(std::floor((data015 * (0.98 + (0.02 * std::max<double>(1.0, (640.0 / fsadc) / maxsnr))))))); data[17] = data[15]; - data[18] = std::min<boost::uint8_t>(127, boost::uint8_t(0.975 * (data010))); + data[18] = std::min<uint8_t>(127, uint8_t(0.975 * (data010))); double data018 = data[18]; - data[19] = std::min<boost::uint8_t>(127, boost::uint8_t(std::floor((data018 + data[19] = std::min<uint8_t>(127, uint8_t(std::floor((data018 * (0.98 + (0.02 * std::max<double>(1.0, (640.0 / fsadc) / maxsnr))))))); data[20] = data[18]; - data[21] = std::min<boost::uint8_t>(127, boost::uint8_t(0.975 * data012)); + data[21] = std::min<uint8_t>(127, uint8_t(0.975 * data012)); double data021 = data[21]; - data[22] = std::min<boost::uint8_t>(127, boost::uint8_t(std::floor((data021 + data[22] = std::min<uint8_t>(127, uint8_t(std::floor((data021 * (0.98 + (0.02 * std::max<double>(1.0, (640.0 / fsadc) / maxsnr))))))); data[23] = data[21]; data[24] = 0x2e; - data[25] = boost::uint8_t(std::floor(128.0 + std::min<double>(63.0, + data[25] = uint8_t(std::floor(128.0 + std::min<double>(63.0, 63.0 * (fsadc / 640.0)))); - data[26] = boost::uint8_t(std::floor(std::min<double>(63.0, 63.0 * (fsadc / 640.0) + data[26] = uint8_t(std::floor(std::min<double>(63.0, 63.0 * (fsadc / 640.0) * (0.92 + (0.08 * (640.0 / fsadc)))))); - data[27] = boost::uint8_t(std::floor(std::min<double>(63.0, + data[27] = uint8_t(std::floor(std::min<double>(63.0, 32.0 * sqrt(fsadc / 640.0)))); - data[28] = boost::uint8_t(std::floor(128.0 + std::min<double>(63.0, + data[28] = uint8_t(std::floor(128.0 + std::min<double>(63.0, 63.0 * (fsadc / 640.0)))); - data[29] = boost::uint8_t(std::floor(std::min<double>(63.0, + data[29] = uint8_t(std::floor(std::min<double>(63.0, 63.0 * (fsadc / 640.0) * (0.92 + (0.08 * (640.0 / fsadc)))))); - data[30] = boost::uint8_t(std::floor(std::min<double>(63.0, + data[30] = uint8_t(std::floor(std::min<double>(63.0, 32.0 * sqrt(fsadc / 640.0)))); - data[31] = boost::uint8_t(std::floor(128.0 + std::min<double>(63.0, + data[31] = uint8_t(std::floor(128.0 + std::min<double>(63.0, 63.0 * (fsadc / 640.0)))); - data[32] = boost::uint8_t(std::floor(std::min<double>(63.0, + data[32] = uint8_t(std::floor(std::min<double>(63.0, 63.0 * (fsadc / 640.0) * (0.92 + (0.08 * (640.0 / fsadc)))))); - data[33] = boost::uint8_t(std::floor(std::min<double>(63.0, + data[33] = uint8_t(std::floor(std::min<double>(63.0, 63.0 * sqrt(fsadc / 640.0)))); - data[34] = std::min<boost::uint8_t>(127, boost::uint8_t(std::floor(64.0 + data[34] = std::min<uint8_t>(127, uint8_t(std::floor(64.0 * sqrt(fsadc / 640.0)))); data[35] = 0x40; data[36] = 0x40; @@ -848,8 +848,8 @@ void ad9361_device_t::_tx_quadrature_cal_routine() { * 3) Re-read 0A3 to get bits [5:0] because maybe they changed? * 4) Update only the TX NCO freq bits in 0A3. * 5) Profit (I hope). */ - boost::uint8_t reg0a3 = _io_iface->peek8(0x0a3); - boost::uint8_t nco_freq = (reg0a3 & 0xC0); + uint8_t reg0a3 = _io_iface->peek8(0x0a3); + uint8_t nco_freq = (reg0a3 & 0xC0); _io_iface->poke8(0x0a0, 0x15 | (nco_freq >> 1)); reg0a3 = _io_iface->peek8(0x0a3); _io_iface->poke8(0x0a3, (reg0a3 & 0x3F) | nco_freq); @@ -916,7 +916,7 @@ void ad9361_device_t::_calibrate_tx_quadrature() /* This calibration must be done in a certain order, and for both TX_A * and TX_B, separately. Store the original setting so that we can * restore it later. */ - boost::uint8_t orig_reg_inputsel = _regs.inputsel; + uint8_t orig_reg_inputsel = _regs.inputsel; /*********************************************************************** * TX1/2-A Calibration @@ -951,9 +951,9 @@ void ad9361_device_t::_calibrate_tx_quadrature() * Note that this table is fixed for all frequency settings. */ void ad9361_device_t::_program_mixer_gm_subtable() { - boost::uint8_t gain[] = { 0x78, 0x74, 0x70, 0x6C, 0x68, 0x64, 0x60, 0x5C, 0x58, + uint8_t gain[] = { 0x78, 0x74, 0x70, 0x6C, 0x68, 0x64, 0x60, 0x5C, 0x58, 0x54, 0x50, 0x4C, 0x48, 0x30, 0x18, 0x00 }; - boost::uint8_t gm[] = { 0x00, 0x0D, 0x15, 0x1B, 0x21, 0x25, 0x29, 0x2C, 0x2F, 0x31, + uint8_t gm[] = { 0x00, 0x0D, 0x15, 0x1B, 0x21, 0x25, 0x29, 0x2C, 0x2F, 0x31, 0x33, 0x34, 0x35, 0x3A, 0x3D, 0x3E }; /* Start the clock. */ @@ -984,8 +984,8 @@ void ad9361_device_t::_program_mixer_gm_subtable() void ad9361_device_t::_program_gain_table() { /* Figure out which gain table we should be using for our current * frequency band. */ - boost::uint8_t (*gain_table)[3] = NULL; - boost::uint8_t new_gain_table; + uint8_t (*gain_table)[3] = NULL; + uint8_t new_gain_table; if (_rx_freq < 1300e6) { gain_table = gain_table_sub_1300mhz; new_gain_table = 1; @@ -1012,7 +1012,7 @@ void ad9361_device_t::_program_gain_table() { _io_iface->poke8(0x137, 0x1A); /* IT'S PROGRAMMING TIME. */ - boost::uint8_t index = 0; + uint8_t index = 0; for (; index < 77; index++) { _io_iface->poke8(0x130, index); _io_iface->poke8(0x131, gain_table[index][0]); @@ -1118,18 +1118,18 @@ void ad9361_device_t::_setup_synth(direction_t direction, double vcorate) throw uhd::runtime_error("[ad9361_device_t] vcoindex > 53"); /* Parse the values out of the LUT based on our calculated index... */ - boost::uint8_t vco_output_level = synth_cal_lut[vcoindex][0]; - boost::uint8_t vco_varactor = synth_cal_lut[vcoindex][1]; - boost::uint8_t vco_bias_ref = synth_cal_lut[vcoindex][2]; - boost::uint8_t vco_bias_tcf = synth_cal_lut[vcoindex][3]; - boost::uint8_t vco_cal_offset = synth_cal_lut[vcoindex][4]; - boost::uint8_t vco_varactor_ref = synth_cal_lut[vcoindex][5]; - boost::uint8_t charge_pump_curr = synth_cal_lut[vcoindex][6]; - boost::uint8_t loop_filter_c2 = synth_cal_lut[vcoindex][7]; - boost::uint8_t loop_filter_c1 = synth_cal_lut[vcoindex][8]; - boost::uint8_t loop_filter_r1 = synth_cal_lut[vcoindex][9]; - boost::uint8_t loop_filter_c3 = synth_cal_lut[vcoindex][10]; - boost::uint8_t loop_filter_r3 = synth_cal_lut[vcoindex][11]; + uint8_t vco_output_level = synth_cal_lut[vcoindex][0]; + uint8_t vco_varactor = synth_cal_lut[vcoindex][1]; + uint8_t vco_bias_ref = synth_cal_lut[vcoindex][2]; + uint8_t vco_bias_tcf = synth_cal_lut[vcoindex][3]; + uint8_t vco_cal_offset = synth_cal_lut[vcoindex][4]; + uint8_t vco_varactor_ref = synth_cal_lut[vcoindex][5]; + uint8_t charge_pump_curr = synth_cal_lut[vcoindex][6]; + uint8_t loop_filter_c2 = synth_cal_lut[vcoindex][7]; + uint8_t loop_filter_c1 = synth_cal_lut[vcoindex][8]; + uint8_t loop_filter_r1 = synth_cal_lut[vcoindex][9]; + uint8_t loop_filter_c3 = synth_cal_lut[vcoindex][10]; + uint8_t loop_filter_r3 = synth_cal_lut[vcoindex][11]; /* ... annnd program! */ if (direction == RX) { @@ -1566,7 +1566,7 @@ void ad9361_device_t::initialize() boost::this_thread::sleep(boost::posix_time::milliseconds(20)); /* Check device ID to make sure iface works */ - boost::uint32_t device_id = (_io_iface->peek8(0x037) & 0x8); + uint32_t device_id = (_io_iface->peek8(0x037) & 0x8); if (device_id != 0x8) { throw uhd::runtime_error(str(boost::format("[ad9361_device_t::initialize] Device ID readback failure. Expected: 0x8, Received: 0x%x") % device_id)); } @@ -1631,9 +1631,9 @@ void ad9361_device_t::initialize() /* Data delay for TX and RX data clocks */ digital_interface_delays_t timing = _client_params->get_digital_interface_timing(); - boost::uint8_t rx_delays = ((timing.rx_clk_delay & 0xF) << 4) + uint8_t rx_delays = ((timing.rx_clk_delay & 0xF) << 4) | (timing.rx_data_delay & 0xF); - boost::uint8_t tx_delays = ((timing.tx_clk_delay & 0xF) << 4) + uint8_t tx_delays = ((timing.tx_clk_delay & 0xF) << 4) | (timing.tx_data_delay & 0xF); _io_iface->poke8(0x006, rx_delays); _io_iface->poke8(0x007, tx_delays); @@ -1811,7 +1811,7 @@ double ad9361_device_t::set_clock_rate(const double req_rate) /* We must be in the SLEEP / WAIT state to do this. If we aren't already * there, transition the ENSM to State 0. */ - boost::uint8_t current_state = _io_iface->peek8(0x017) & 0x0F; + uint8_t current_state = _io_iface->peek8(0x017) & 0x0F; switch (current_state) { case 0x05: /* We are in the ALERT state. */ @@ -1833,8 +1833,8 @@ double ad9361_device_t::set_clock_rate(const double req_rate) /* Store the current chain / antenna selections so that we can restore * them at the end of this routine; all chains will be enabled from * within setup_rates for calibration purposes. */ - boost::uint8_t orig_tx_chains = _regs.txfilt & 0xC0; - boost::uint8_t orig_rx_chains = _regs.rxfilt & 0xC0; + uint8_t orig_tx_chains = _regs.txfilt & 0xC0; + uint8_t orig_rx_chains = _regs.rxfilt & 0xC0; /* Call into the clock configuration / settings function. This is where * all the hard work gets done. */ @@ -1962,8 +1962,8 @@ void ad9361_device_t::set_active_chains(bool tx1, bool tx2, bool rx1, bool rx2) } /* Check for FDD state */ - boost::uint8_t set_back_to_fdd = 0; - boost::uint8_t ensm_state = _io_iface->peek8(0x017) & 0x0F; + uint8_t set_back_to_fdd = 0; + uint8_t ensm_state = _io_iface->peek8(0x017) & 0x0F; if (ensm_state == 0xA) // FDD { /* Put into ALERT state (via the FDD flush state). */ @@ -2124,7 +2124,7 @@ double ad9361_device_t::set_gain(direction_t direction, chain_t chain, const dou * outside this function. */ double atten = AD9361_MAX_GAIN - value; - boost::uint32_t attenreg = boost::uint32_t(atten * 4); + uint32_t attenreg = uint32_t(atten * 4); if (chain == CHAIN_1) { _tx1_gain = value; _io_iface->poke8(0x073, attenreg & 0xFF); @@ -2166,8 +2166,8 @@ void ad9361_device_t::data_port_loopback(const bool loopback_enabled) * -0.25dB / bit 9bit resolution.*/ double ad9361_device_t::get_rssi(chain_t chain) { - boost::uint32_t reg_rssi = 0; - boost::uint8_t lsb_bit_pos = 0; + uint32_t reg_rssi = 0; + uint8_t lsb_bit_pos = 0; if (chain == CHAIN_1) { reg_rssi = 0x1A7; lsb_bit_pos = 0; @@ -2175,9 +2175,9 @@ double ad9361_device_t::get_rssi(chain_t chain) reg_rssi = 0x1A9; lsb_bit_pos = 1; } - boost::uint8_t msbs = _io_iface->peek8(reg_rssi); - boost::uint8_t lsb = ((_io_iface->peek8(0x1AB)) >> lsb_bit_pos) & 0x01; - boost::uint16_t val = ((msbs << 1) | lsb); + uint8_t msbs = _io_iface->peek8(reg_rssi); + uint8_t lsb = ((_io_iface->peek8(0x1AB)) >> lsb_bit_pos) & 0x01; + uint16_t val = ((msbs << 1) | lsb); double rssi = (-0.25f * ((double)val)); //-0.25dB/lsb (See Gain Control Users Guide p. 25) return rssi; } @@ -2190,7 +2190,7 @@ double ad9361_device_t::get_rssi(chain_t chain) double ad9361_device_t::_get_temperature(const double cal_offset, const double timeout) { //set 0x01D[0] to 1 to disable AuxADC GPIO reading - boost::uint8_t tmp = 0; + uint8_t tmp = 0; tmp = _io_iface->peek8(0x01D); _io_iface->poke8(0x01D, (tmp | 0x01)); _io_iface->poke8(0x00B, 0); //set offset to 0 @@ -2209,7 +2209,7 @@ double ad9361_device_t::_get_temperature(const double cal_offset, const double t } _io_iface->poke8(0x00C, 0x00); //clear read flag - boost::uint8_t temp = _io_iface->peek8(0x00E); //read temperature. + uint8_t temp = _io_iface->peek8(0x00E); //read temperature. double tmp_temp = temp/1.140f; //according to ADI driver tmp_temp = tmp_temp + cal_offset; //Constant offset acquired by one point calibration. @@ -2275,9 +2275,9 @@ void ad9361_device_t::set_iq_balance_auto(direction_t direction, const bool on) * the gain configuration will be reloaded. */ void ad9361_device_t::_setup_agc(chain_t chain, gain_mode_t gain_mode) { - boost::uint8_t gain_mode_reg = 0; - boost::uint8_t gain_mode_prev = 0; - boost::uint8_t gain_mode_bits_pos = 0; + uint8_t gain_mode_reg = 0; + uint8_t gain_mode_prev = 0; + uint8_t gain_mode_bits_pos = 0; gain_mode_reg = _io_iface->peek8(0x0FA); gain_mode_prev = (gain_mode_reg & 0x0F); @@ -2306,7 +2306,7 @@ void ad9361_device_t::_setup_agc(chain_t chain, gain_mode_t gain_mode) throw uhd::runtime_error("[ad9361_device_t] Gain mode does not exist"); } _io_iface->poke8(0x0FA, gain_mode_reg); - boost::uint8_t gain_mode_status = _io_iface->peek8(0x0FA); + uint8_t gain_mode_status = _io_iface->peek8(0x0FA); gain_mode_status = (gain_mode_status & 0x0F); /*Check if gain mode configuration needs to be reprogrammed*/ if (((gain_mode_prev == 0) && (gain_mode_status != 0)) || ((gain_mode_prev != 0) && (gain_mode_status == 0))) { @@ -2434,16 +2434,16 @@ double ad9361_device_t::set_bw_filter(direction_t direction, const double rf_bw) return (2.0 * set_analog_bb_bw); } -void ad9361_device_t::_set_fir_taps(direction_t direction, chain_t chain, const std::vector<boost::int16_t>& taps) +void ad9361_device_t::_set_fir_taps(direction_t direction, chain_t chain, const std::vector<int16_t>& taps) { size_t num_taps = taps.size(); size_t num_taps_avail = _get_num_fir_taps(direction); if(num_taps == num_taps_avail) { - boost::scoped_array<boost::uint16_t> coeffs(new boost::uint16_t[num_taps_avail]); + boost::scoped_array<uint16_t> coeffs(new uint16_t[num_taps_avail]); for (size_t i = 0; i < num_taps_avail; i++) { - coeffs[i] = boost::uint16_t(taps[i]); + coeffs[i] = uint16_t(taps[i]); } _program_fir_filter(direction, chain, num_taps_avail, coeffs.get()); } else if(num_taps < num_taps_avail){ @@ -2455,7 +2455,7 @@ void ad9361_device_t::_set_fir_taps(direction_t direction, chain_t chain, const size_t ad9361_device_t::_get_num_fir_taps(direction_t direction) { - boost::uint8_t num = 0; + uint8_t num = 0; if(direction == RX) num = _io_iface->peek8(0x0F5); else @@ -2466,7 +2466,7 @@ size_t ad9361_device_t::_get_num_fir_taps(direction_t direction) size_t ad9361_device_t::_get_fir_dec_int(direction_t direction) { - boost::uint8_t dec_int = 0; + uint8_t dec_int = 0; if(direction == RX) dec_int = _io_iface->peek8(0x003); else @@ -2484,12 +2484,12 @@ size_t ad9361_device_t::_get_fir_dec_int(direction_t direction) return dec_int; } -std::vector<boost::int16_t> ad9361_device_t::_get_fir_taps(direction_t direction, chain_t chain) +std::vector<int16_t> ad9361_device_t::_get_fir_taps(direction_t direction, chain_t chain) { int base; size_t num_taps = _get_num_fir_taps(direction); - boost::uint8_t config; - boost::uint8_t reg_numtaps = (((num_taps / 16) - 1) & 0x07) << 5; + uint8_t config; + uint8_t reg_numtaps = (((num_taps / 16) - 1) & 0x07) << 5; config = reg_numtaps | 0x02; //start the programming clock if(chain == CHAIN_1) @@ -2510,17 +2510,17 @@ std::vector<boost::int16_t> ad9361_device_t::_get_fir_taps(direction_t direction _io_iface->poke8(base+5,config); - std::vector<boost::int16_t> taps; - boost::uint8_t lower_val; - boost::uint8_t higher_val; - boost::uint16_t coeff; + std::vector<int16_t> taps; + uint8_t lower_val; + uint8_t higher_val; + uint16_t coeff; for(size_t i = 0;i < num_taps;i++) { _io_iface->poke8(base,0x00+i); lower_val = _io_iface->peek8(base+3); higher_val = _io_iface->peek8(base+4); coeff = ((higher_val << 8) | lower_val); - taps.push_back(boost::int16_t(coeff)); + taps.push_back(int16_t(coeff)); } config = (config & (~(1 << 1))); //disable filter clock @@ -2569,16 +2569,16 @@ filter_info_base::sptr ad9361_device_t::_get_filter_lp_bb(direction_t direction) * For TX direction the INT3 is returned. */ filter_info_base::sptr ad9361_device_t::_get_filter_dec_int_3(direction_t direction) { - boost::uint8_t enable = 0; + uint8_t enable = 0; double rate = _adcclock_freq; double full_scale; size_t dec = 0; size_t interpol = 0; filter_info_base::filter_type type = filter_info_base::DIGITAL_I16; std::string name; - boost::int16_t taps_array_rx[] = {55, 83, 0, -393, -580, 0, 1914, 4041, 5120, 4041, 1914, 0, -580, -393, 0, 83, 55}; - boost::int16_t taps_array_tx[] = {36, -19, 0, -156, -12, 0, 479, 233, 0, -1215, -993, 0, 3569, 6277, 8192, 6277, 3569, 0, -993, -1215, 0, 223, 479, 0, -12, -156, 0, -19, 36}; - std::vector<boost::int16_t> taps; + int16_t taps_array_rx[] = {55, 83, 0, -393, -580, 0, 1914, 4041, 5120, 4041, 1914, 0, -580, -393, 0, 83, 55}; + int16_t taps_array_tx[] = {36, -19, 0, -156, -12, 0, 479, 233, 0, -1215, -993, 0, 3569, 6277, 8192, 6277, 3569, 0, -993, -1215, 0, 223, 479, 0, -12, -156, 0, -19, 36}; + std::vector<int16_t> taps; filter_info_base::sptr ret; @@ -2590,14 +2590,14 @@ filter_info_base::sptr ad9361_device_t::_get_filter_dec_int_3(direction_t direct enable = _io_iface->peek8(0x003); enable = ((enable >> 4) & 0x03); - taps.assign(taps_array_rx, taps_array_rx + sizeof(taps_array_rx) / sizeof(boost::int16_t) ); + taps.assign(taps_array_rx, taps_array_rx + sizeof(taps_array_rx) / sizeof(int16_t) ); } else { full_scale = 8192; dec = 1; interpol = 3; - boost::uint8_t use_dac_clk_div = _io_iface->peek8(0x00A); + uint8_t use_dac_clk_div = _io_iface->peek8(0x00A); use_dac_clk_div = ((use_dac_clk_div >> 3) & 0x01); if(use_dac_clk_div == 1) { @@ -2611,24 +2611,24 @@ filter_info_base::sptr ad9361_device_t::_get_filter_dec_int_3(direction_t direct rate /= 3; } - taps.assign(taps_array_tx, taps_array_tx + sizeof(taps_array_tx) / sizeof(boost::int16_t) ); + taps.assign(taps_array_tx, taps_array_tx + sizeof(taps_array_tx) / sizeof(int16_t) ); } - ret = filter_info_base::sptr(new digital_filter_base<boost::int16_t>(type, (enable != 2) ? true : false, 2, rate, interpol, dec, full_scale, taps.size(), taps)); + ret = filter_info_base::sptr(new digital_filter_base<int16_t>(type, (enable != 2) ? true : false, 2, rate, interpol, dec, full_scale, taps.size(), taps)); return ret; } filter_info_base::sptr ad9361_device_t::_get_filter_hb_3(direction_t direction) { - boost::uint8_t enable = 0; + uint8_t enable = 0; double rate = _adcclock_freq; double full_scale = 0; size_t dec = 1; size_t interpol = 1; filter_info_base::filter_type type = filter_info_base::DIGITAL_I16; - boost::int16_t taps_array_rx[] = {1, 4, 6, 4, 1}; - boost::int16_t taps_array_tx[] = {1, 2, 1}; - std::vector<boost::int16_t> taps; + int16_t taps_array_rx[] = {1, 4, 6, 4, 1}; + int16_t taps_array_tx[] = {1, 2, 1}; + std::vector<int16_t> taps; if(direction == RX) { @@ -2637,12 +2637,12 @@ filter_info_base::sptr ad9361_device_t::_get_filter_hb_3(direction_t direction) enable = _io_iface->peek8(0x003); enable = ((enable >> 4) & 0x03); - taps.assign(taps_array_rx, taps_array_rx + sizeof(taps_array_rx) / sizeof(boost::int16_t) ); + taps.assign(taps_array_rx, taps_array_rx + sizeof(taps_array_rx) / sizeof(int16_t) ); } else { full_scale = 2; interpol = 2; - boost::uint8_t use_dac_clk_div = _io_iface->peek8(0x00A); + uint8_t use_dac_clk_div = _io_iface->peek8(0x00A); use_dac_clk_div = ((use_dac_clk_div >> 3) & 0x01); if(use_dac_clk_div == 1) { @@ -2655,26 +2655,26 @@ filter_info_base::sptr ad9361_device_t::_get_filter_hb_3(direction_t direction) { rate /= 2; } - taps.assign(taps_array_tx, taps_array_tx + sizeof(taps_array_tx) / sizeof(boost::int16_t) ); + taps.assign(taps_array_tx, taps_array_tx + sizeof(taps_array_tx) / sizeof(int16_t) ); } - filter_info_base::sptr hb = filter_info_base::sptr(new digital_filter_base<boost::int16_t>(type, (enable != 1) ? true : false, 2, rate, interpol, dec, full_scale, taps.size(), taps)); + filter_info_base::sptr hb = filter_info_base::sptr(new digital_filter_base<int16_t>(type, (enable != 1) ? true : false, 2, rate, interpol, dec, full_scale, taps.size(), taps)); return hb; } filter_info_base::sptr ad9361_device_t::_get_filter_hb_2(direction_t direction) { - boost::uint8_t enable = 0; + uint8_t enable = 0; double rate = _adcclock_freq; double full_scale = 0; size_t dec = 1; size_t interpol = 1; filter_info_base::filter_type type = filter_info_base::DIGITAL_I16; - boost::int16_t taps_array[] = {-9, 0, 73, 128, 73, 0, -9}; - std::vector<boost::int16_t> taps(taps_array, taps_array + sizeof(taps_array) / sizeof(boost::int16_t) ); + int16_t taps_array[] = {-9, 0, 73, 128, 73, 0, -9}; + std::vector<int16_t> taps(taps_array, taps_array + sizeof(taps_array) / sizeof(int16_t) ); - digital_filter_base<boost::int16_t>::sptr hb_3 = boost::dynamic_pointer_cast<digital_filter_base<boost::int16_t> >(_get_filter_hb_3(direction)); - digital_filter_base<boost::int16_t>::sptr dec_int_3 = boost::dynamic_pointer_cast<digital_filter_base<boost::int16_t> >(_get_filter_dec_int_3(direction)); + digital_filter_base<int16_t>::sptr hb_3 = boost::dynamic_pointer_cast<digital_filter_base<int16_t> >(_get_filter_hb_3(direction)); + digital_filter_base<int16_t>::sptr dec_int_3 = boost::dynamic_pointer_cast<digital_filter_base<int16_t> >(_get_filter_dec_int_3(direction)); if(direction == RX) { @@ -2714,24 +2714,24 @@ filter_info_base::sptr ad9361_device_t::_get_filter_hb_2(direction_t direction) } } - filter_info_base::sptr hb(new digital_filter_base<boost::int16_t>(type, (enable == 0) ? true : false, 3, rate, interpol, dec, full_scale, taps.size(), taps)); + filter_info_base::sptr hb(new digital_filter_base<int16_t>(type, (enable == 0) ? true : false, 3, rate, interpol, dec, full_scale, taps.size(), taps)); return hb; } filter_info_base::sptr ad9361_device_t::_get_filter_hb_1(direction_t direction) { - boost::uint8_t enable = 0; + uint8_t enable = 0; double rate = 0; double full_scale = 0; size_t dec = 1; size_t interpol = 1; filter_info_base::filter_type type = filter_info_base::DIGITAL_I16; - std::vector<boost::int16_t> taps; - boost::int16_t taps_rx_array[] = {-8, 0, 42, 0, -147, 0, 619, 1013, 619, 0, -147, 0, 42, 0, -8}; - boost::int16_t taps_tx_array[] = {-53, 0, 313, 0, -1155, 0, 4989, 8192, 4989, 0, -1155, 0, 313, 0, -53}; + std::vector<int16_t> taps; + int16_t taps_rx_array[] = {-8, 0, 42, 0, -147, 0, 619, 1013, 619, 0, -147, 0, 42, 0, -8}; + int16_t taps_tx_array[] = {-53, 0, 313, 0, -1155, 0, 4989, 8192, 4989, 0, -1155, 0, 313, 0, -53}; - digital_filter_base<boost::int16_t>::sptr hb_2 = boost::dynamic_pointer_cast<digital_filter_base<boost::int16_t> >(_get_filter_hb_2(direction)); + digital_filter_base<int16_t>::sptr hb_2 = boost::dynamic_pointer_cast<digital_filter_base<int16_t> >(_get_filter_hb_2(direction)); if(direction == RX) { @@ -2740,7 +2740,7 @@ filter_info_base::sptr ad9361_device_t::_get_filter_hb_1(direction_t direction) enable = _io_iface->peek8(0x003); enable = ((enable >> 2) & 0x01); rate = hb_2->get_output_rate(); - taps.assign(taps_rx_array, taps_rx_array + sizeof(taps_rx_array) / sizeof(boost::int16_t) ); + taps.assign(taps_rx_array, taps_rx_array + sizeof(taps_rx_array) / sizeof(int16_t) ); } else if (direction == TX) { full_scale = 8192; interpol = 2; @@ -2751,10 +2751,10 @@ filter_info_base::sptr ad9361_device_t::_get_filter_hb_1(direction_t direction) { rate /= 2; } - taps.assign(taps_tx_array, taps_tx_array + sizeof(taps_tx_array) / sizeof(boost::int16_t) ); + taps.assign(taps_tx_array, taps_tx_array + sizeof(taps_tx_array) / sizeof(int16_t) ); } - filter_info_base::sptr hb(new digital_filter_base<boost::int16_t>(type, (enable == 0) ? true : false, 4, rate, interpol, dec, full_scale, taps.size(), taps)); + filter_info_base::sptr hb(new digital_filter_base<int16_t>(type, (enable == 0) ? true : false, 4, rate, interpol, dec, full_scale, taps.size(), taps)); return hb; } @@ -2764,9 +2764,9 @@ filter_info_base::sptr ad9361_device_t::_get_filter_fir(direction_t direction, c size_t dec = 1; size_t interpol = 1; size_t max_num_taps = 128; - boost::uint8_t enable = 1; + uint8_t enable = 1; - digital_filter_base<boost::int16_t>::sptr hb_1 = boost::dynamic_pointer_cast<digital_filter_base<boost::int16_t> >(_get_filter_hb_1(direction)); + digital_filter_base<int16_t>::sptr hb_1 = boost::dynamic_pointer_cast<digital_filter_base<int16_t> >(_get_filter_hb_1(direction)); if(direction == RX) { @@ -2794,14 +2794,14 @@ filter_info_base::sptr ad9361_device_t::_get_filter_fir(direction_t direction, c } max_num_taps = _get_num_fir_taps(direction); - filter_info_base::sptr fir(new digital_filter_fir<boost::int16_t>(filter_info_base::DIGITAL_FIR_I16, (enable == 0) ? true : false, 5, rate, interpol, dec, 32767, max_num_taps, _get_fir_taps(direction, chain))); + filter_info_base::sptr fir(new digital_filter_fir<int16_t>(filter_info_base::DIGITAL_FIR_I16, (enable == 0) ? true : false, 5, rate, interpol, dec, 32767, max_num_taps, _get_fir_taps(direction, chain))); return fir; } void ad9361_device_t::_set_filter_fir(direction_t direction, chain_t channel, filter_info_base::sptr filter) { - digital_filter_fir<boost::int16_t>::sptr fir = boost::dynamic_pointer_cast<digital_filter_fir<boost::int16_t> >(filter); + digital_filter_fir<int16_t>::sptr fir = boost::dynamic_pointer_cast<digital_filter_fir<int16_t> >(filter); //only write taps. Ignore everything else for now _set_fir_taps(direction, channel, fir->get_taps()); } diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.h b/host/lib/usrp/common/ad9361_driver/ad9361_device.h index d0e8a7e39..ae065d78e 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.h +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.h @@ -167,10 +167,10 @@ public: static const double DEFAULT_TX_FREQ; private: //Methods - void _program_fir_filter(direction_t direction, int num_taps, boost::uint16_t *coeffs); - void _setup_tx_fir(size_t num_taps, boost::int32_t interpolation); - void _setup_rx_fir(size_t num_taps, boost::int32_t decimation); - void _program_fir_filter(direction_t direction, chain_t chain, int num_taps, boost::uint16_t *coeffs); + void _program_fir_filter(direction_t direction, int num_taps, uint16_t *coeffs); + void _setup_tx_fir(size_t num_taps, int32_t interpolation); + void _setup_rx_fir(size_t num_taps, int32_t decimation); + void _program_fir_filter(direction_t direction, chain_t chain, int num_taps, uint16_t *coeffs); void _setup_tx_fir(size_t num_taps); void _setup_rx_fir(size_t num_taps); void _calibrate_lock_bbpll(); @@ -197,8 +197,8 @@ private: //Methods void _configure_bb_dc_tracking(); void _configure_rx_iq_tracking(); void _setup_agc(chain_t chain, gain_mode_t gain_mode); - void _set_fir_taps(direction_t direction, chain_t chain, const std::vector<boost::int16_t>& taps); - std::vector<boost::int16_t> _get_fir_taps(direction_t direction, chain_t chain); + void _set_fir_taps(direction_t direction, chain_t chain, const std::vector<int16_t>& taps); + std::vector<int16_t> _get_fir_taps(direction_t direction, chain_t chain); size_t _get_num_fir_taps(direction_t direction); size_t _get_fir_dec_int(direction_t direction); filter_info_base::sptr _get_filter_lp_tia_sec(direction_t direction); @@ -214,13 +214,13 @@ private: //Methods private: //Members typedef struct { - boost::uint8_t vcodivs; - boost::uint8_t inputsel; - boost::uint8_t rxfilt; - boost::uint8_t txfilt; - boost::uint8_t bbpll; - boost::uint8_t bbftune_config; - boost::uint8_t bbftune_mode; + uint8_t vcodivs; + uint8_t inputsel; + uint8_t rxfilt; + uint8_t txfilt; + uint8_t bbpll; + uint8_t bbftune_config; + uint8_t bbftune_mode; } chip_regs_t; struct filter_query_helper @@ -256,11 +256,11 @@ private: //Members // if another call to set_clock_rate() actually has the same value. double _req_clock_rate; double _req_coreclk; - boost::uint16_t _rx_bbf_tunediv; - boost::uint8_t _curr_gain_table; + uint16_t _rx_bbf_tunediv; + uint8_t _curr_gain_table; double _rx1_gain, _rx2_gain, _tx1_gain, _tx2_gain; - boost::int32_t _tfir_factor; - boost::int32_t _rfir_factor; + int32_t _tfir_factor; + int32_t _rfir_factor; gain_mode_t _rx1_agc_mode, _rx2_agc_mode; bool _rx1_agc_enable, _rx2_agc_enable; //Register soft-copies diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_filter_taps.h b/host/lib/usrp/common/ad9361_driver/ad9361_filter_taps.h index 97ff858fd..927d9e2a7 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_filter_taps.h +++ b/host/lib/usrp/common/ad9361_driver/ad9361_filter_taps.h @@ -18,7 +18,7 @@ #ifndef INCLUDED_AD9361_FILTER_TAPS_HPP #define INCLUDED_AD9361_FILTER_TAPS_HPP -#include <boost/cstdint.hpp> +#include <stdint.h> /* A default 128-tap filter that can be used for generic circumstances. */ /* static uint16_t default_128tap_coeffs[] = { @@ -63,25 +63,25 @@ static uint16_t lte10mhz_tx_coeffs[] = { /************************************************************/ /* 127 tap Halfband designed with: round(2^16 * halfgen4(0.9/4,32)) (center tap tweaked to 32767) */ -static boost::int16_t hb127_coeffs[] = { +static int16_t hb127_coeffs[] = { -0,0,1,-0,-2,0,3,-0,-5,0,8,-0,-11,0,17,-0,-24,0,33,-0,-45,0,61,-0,-80,0,104,-0,-134,0,169,-0, -213,0,264,-0,-327,0,401,-0,-489,0,595,-0,-724,0,880,-0,-1075,0,1323,-0,-1652,0,2114,-0,-2819,0,4056,-0,-6883,0,20837,32767, 20837,0,-6883,-0,4056,0,-2819,-0,2114,0,-1652,-0,1323,0,-1075,-0,880,0,-724,-0,595,0,-489,-0,401,0,-327,-0,264,0,-213,-0, 169,0,-134,-0,104,0,-80,-0,61,0,-45,-0,33,0,-24,-0,17,0,-11,-0,8,0,-5,-0,3,0,-2,-0,1,0,-0, 0 }; /* 95 tap Halfband designed with: round(2^16 * halfgen4(0.9/4,24)) (center tap tweaked to 32767) */ -static boost::int16_t hb95_coeffs[] = { +static int16_t hb95_coeffs[] = { -4,0,8,-0,-14,0,23,-0,-36,0,52,-0,-75,0,104,-0,-140,0,186,-0,-243,0,314,-0,-400,0,505,-0,-634,0,793,-0, -993,0,1247,-0,-1585,0,2056,-0,-2773,0,4022,-0,-6862,0,20830,32767,20830,0,-6862,-0,4022,0,-2773,-0,2056,0,-1585,-0,1247,0,-993,-0, 793,0,-634,-0,505,0,-400,-0,314,0,-243,-0,186,0,-140,-0,104,0,-75,-0,52,0,-36,-0,23,0,-14,-0,8,0,-4,0}; /* 63 tap Halfband designed with: round(2^16 * halfgen4(0.9/4,16)) (center tap tweaked to 32767) */ -static boost::int16_t hb63_coeffs[] = { +static int16_t hb63_coeffs[] = { -58,0,83,-0,-127,0,185,-0,-262,0,361,-0,-488,0,648,-0,-853,0,1117,-0,-1466,0,1954,-0,-2689,0,3960,-0,-6825,0,20818,32767, 20818,0,-6825,-0,3960,0,-2689,-0,1954,0,-1466,-0,1117,0,-853,-0,648,0,-488,-0,361,0,-262,-0,185,0,-127,-0,83,0,-58,0}; /* 47 tap Halfband designed with: round(2^16 * halfgen4(0.85/4,12)) (center tap tweaked to 32767) */ -static boost::int16_t hb47_coeffs[] = { +static int16_t hb47_coeffs[] = { -50,0,98,-0,-181,0,307,-0,-489,0,747,-0,-1109,0,1628,-0,-2413,0,3750,-0,-6693,0,20773,32767,20773,0,-6693,-0,3750,0,-2413,-0, 1628,0,-1109,-0,747,0,-489,-0,307,0,-181,-0,98,0,-50,0}; @@ -91,7 +91,7 @@ static boost::int16_t hb47_coeffs[] = { /************************************************************/ /* 128 tap equiripple FIR low-pass designed with: round(2^16 * fir1(127,0.25)); */ -static boost::int16_t fir_128_x4_coeffs[] = { +static int16_t fir_128_x4_coeffs[] = { -15,-27,-23,-6,17,33,31,9,-23,-47,-45,-13,34,69,67,21,-49,-102,-99,-32,69,146,143,48,-96,-204,-200,-69,129,278,275,97,-170, -372,-371,-135,222,494,497,187,-288,-654,-665,-258,376,875,902,363,-500,-1201,-1265,-530,699,1748,1906,845,-1089,-2922,-3424, -1697,2326,7714,12821,15921,15921,12821,7714,2326,-1697,-3424,-2922,-1089,845,1906,1748,699,-530,-1265,-1201,-500,363,902,875, @@ -99,20 +99,20 @@ static boost::int16_t fir_128_x4_coeffs[] = { 67,69,34,-13,-45,-47,-23,9,31,33,17,-6,-23,-27,-15}; /* 96 tap equiripple FIR low-pass designed with: round(2^16 * fir1(95,0.25)); */ -static boost::int16_t fir_96_x4_coeffs[] = { +static int16_t fir_96_x4_coeffs[] = { -18,-35,-33,-11,23,50,51,18,-37,-83,-86,-31,62,140,145,54,-98,-224,-232,-88,149,343,356,138,-218,-509,-530,-211,313,743,781, 320,-447,-1089,-1163,-494,658,1663,1830,819,-1062,-2868,-3379,-1682,2314,7695,12812,15924,15924,12812,7695,2314,-1682,-3379, -2868,-1062,819,1830,1663,658,-494,-1163,-1089,-447,320,781,743,313,-211,-530,-509,-218,138,356,343,149,-88,-232,-224,-98,54, 145,140,62,-31,-86,-83,-37,18,51,50,23,-11,-33,-35,-18}; /* 64 tap equiripple FIR low-pass designed with: round(2^16 * fir1(63,0.25)); */ -static boost::int16_t fir_64_x4_coeffs[] = { +static int16_t fir_64_x4_coeffs[] = { -25,-54,-56,-22,41,102,117,50,-87,-223,-253,-109,174,443,496,215,-317,-809,-903,-398,550,1434,1623,744,-987,-2715,-3251, -1640,2279,7638,12782,15928,15928,12782,7638,2279,-1640,-3251,-2715,-987,744,1623,1434,550,-398,-903,-809,-317,215,496, 443,174,-109,-253,-223,-87,50,117,102,41,-22,-56,-54,-25}; /* 48 tap equiripple FIR low-pass designed with: round(2^16 * fir1(47,0.25)); */ -static boost::int16_t fir_48_x4_coeffs[] = { +static int16_t fir_48_x4_coeffs[] = { -32,-74,-84,-39,68,191,237,114,-183,-508,-609,-287,419,1149,1358,647,-887,-2508,-3073,-1580,2230,7555,12736,15928,15928, 12736,7555,2230,-1580,-3073,-2508,-887,647,1358,1149,419,-287,-609,-508,-183,114,237,191,68,-39,-84,-74,-32}; diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_gain_tables.h b/host/lib/usrp/common/ad9361_driver/ad9361_gain_tables.h index 8cd958e23..99794697a 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_gain_tables.h +++ b/host/lib/usrp/common/ad9361_driver/ad9361_gain_tables.h @@ -18,9 +18,9 @@ #ifndef INCLUDED_AD9361_GAIN_TABLES_HPP #define INCLUDED_AD9361_GAIN_TABLES_HPP -#include <boost/cstdint.hpp> +#include <stdint.h> -boost::uint8_t gain_table_sub_1300mhz[77][3] = { +uint8_t gain_table_sub_1300mhz[77][3] = { { 0x00, 0x00, 0x20 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x01, 0x00 }, { 0x00, 0x02, 0x00 }, { 0x00, 0x03, 0x00 }, { 0x00, 0x04, 0x00 }, { 0x00, 0x05, 0x00 }, { 0x01, 0x03, 0x20 }, @@ -49,7 +49,7 @@ boost::uint8_t gain_table_sub_1300mhz[77][3] = { { 0x6E, 0x38, 0x20 }, { 0x6F, 0x38, 0x20 } }; -boost::uint8_t gain_table_1300mhz_to_4000mhz[77][3] = { +uint8_t gain_table_1300mhz_to_4000mhz[77][3] = { { 0x00, 0x00, 0x20 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x01, 0x00 }, { 0x00, 0x02, 0x00 }, { 0x00, 0x03, 0x00 }, { 0x00, 0x04, 0x00 }, { 0x00, 0x05, 0x00 }, { 0x01, 0x03, 0x20 }, @@ -78,7 +78,7 @@ boost::uint8_t gain_table_1300mhz_to_4000mhz[77][3] = { { 0x6E, 0x38, 0x20 }, { 0x6F, 0x38, 0x20 } }; -boost::uint8_t gain_table_4000mhz_to_6000mhz[77][3] = { +uint8_t gain_table_4000mhz_to_6000mhz[77][3] = { { 0x00, 0x00, 0x20 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x00, 0x00 }, { 0x00, 0x01, 0x00 }, { 0x00, 0x02, 0x00 }, { 0x00, 0x03, 0x00 }, { 0x01, 0x01, 0x20 }, diff --git a/host/lib/usrp/common/ad936x_manager.cpp b/host/lib/usrp/common/ad936x_manager.cpp index e7af411fa..2b6d69c15 100644 --- a/host/lib/usrp/common/ad936x_manager.cpp +++ b/host/lib/usrp/common/ad936x_manager.cpp @@ -113,15 +113,15 @@ class ad936x_manager_impl : public ad936x_manager { // Create test word boost::hash_combine(hash, i); - const boost::uint32_t word32 = boost::uint32_t(hash) & 0xfff0fff0; + const uint32_t word32 = uint32_t(hash) & 0xfff0fff0; // Write test word to codec_idle idle register (on TX side) poker_functor(word32); // Read back values - TX is lower 32-bits and RX is upper 32-bits - const boost::uint64_t rb_word64 = peeker_functor(); - const boost::uint32_t rb_tx = boost::uint32_t(rb_word64 >> 32); - const boost::uint32_t rb_rx = boost::uint32_t(rb_word64 & 0xffffffff); + const uint64_t rb_word64 = peeker_functor(); + const uint32_t rb_tx = uint32_t(rb_word64 >> 32); + const uint32_t rb_rx = uint32_t(rb_word64 & 0xffffffff); // Compare TX and RX values to test word bool test_fail = word32 != rb_tx or word32 != rb_rx; diff --git a/host/lib/usrp/common/adf4001_ctrl.cpp b/host/lib/usrp/common/adf4001_ctrl.cpp index 001b68b7a..01a35dbec 100644 --- a/host/lib/usrp/common/adf4001_ctrl.cpp +++ b/host/lib/usrp/common/adf4001_ctrl.cpp @@ -47,47 +47,47 @@ adf4001_regs_t::adf4001_regs_t(void) { } -boost::uint32_t adf4001_regs_t::get_reg(boost::uint8_t addr) { - boost::uint32_t reg = 0; +uint32_t adf4001_regs_t::get_reg(uint8_t addr) { + uint32_t reg = 0; switch (addr) { case 0: - reg |= (boost::uint32_t(ref_counter) & 0x003FFF) << 2; - reg |= (boost::uint32_t(anti_backlash_width) & 0x000003) << 16; - reg |= (boost::uint32_t(lock_detect_precision) & 0x000001) << 20; + reg |= (uint32_t(ref_counter) & 0x003FFF) << 2; + reg |= (uint32_t(anti_backlash_width) & 0x000003) << 16; + reg |= (uint32_t(lock_detect_precision) & 0x000001) << 20; break; case 1: - reg |= (boost::uint32_t(n) & 0x001FFF) << 8; - reg |= (boost::uint32_t(charge_pump_gain) & 0x000001) << 21; + reg |= (uint32_t(n) & 0x001FFF) << 8; + reg |= (uint32_t(charge_pump_gain) & 0x000001) << 21; break; case 2: - reg |= (boost::uint32_t(counter_reset) & 0x000001) << 2; - reg |= (boost::uint32_t(power_down) & 0x000001) << 3; - reg |= (boost::uint32_t(muxout) & 0x000007) << 4; - reg |= (boost::uint32_t(phase_detector_polarity) & 0x000001) << 7; - reg |= (boost::uint32_t(charge_pump_mode) & 0x000001) << 8; - reg |= (boost::uint32_t(fastlock_mode) & 0x000003) << 9; - reg |= (boost::uint32_t(timer_counter_control) & 0x00000F) << 11; - reg |= (boost::uint32_t(charge_pump_current_1) & 0x000007) << 15; - reg |= (boost::uint32_t(charge_pump_current_2) & 0x000007) << 18; - reg |= (boost::uint32_t(power_down) & 0x000002) << 21; + reg |= (uint32_t(counter_reset) & 0x000001) << 2; + reg |= (uint32_t(power_down) & 0x000001) << 3; + reg |= (uint32_t(muxout) & 0x000007) << 4; + reg |= (uint32_t(phase_detector_polarity) & 0x000001) << 7; + reg |= (uint32_t(charge_pump_mode) & 0x000001) << 8; + reg |= (uint32_t(fastlock_mode) & 0x000003) << 9; + reg |= (uint32_t(timer_counter_control) & 0x00000F) << 11; + reg |= (uint32_t(charge_pump_current_1) & 0x000007) << 15; + reg |= (uint32_t(charge_pump_current_2) & 0x000007) << 18; + reg |= (uint32_t(power_down) & 0x000002) << 21; break; case 3: - reg |= (boost::uint32_t(counter_reset) & 0x000001) << 2; - reg |= (boost::uint32_t(power_down) & 0x000001) << 3; - reg |= (boost::uint32_t(muxout) & 0x000007) << 4; - reg |= (boost::uint32_t(phase_detector_polarity) & 0x000001) << 7; - reg |= (boost::uint32_t(charge_pump_mode) & 0x000001) << 8; - reg |= (boost::uint32_t(fastlock_mode) & 0x000003) << 9; - reg |= (boost::uint32_t(timer_counter_control) & 0x00000F) << 11; - reg |= (boost::uint32_t(charge_pump_current_1) & 0x000007) << 15; - reg |= (boost::uint32_t(charge_pump_current_2) & 0x000007) << 18; - reg |= (boost::uint32_t(power_down) & 0x000002) << 20; + reg |= (uint32_t(counter_reset) & 0x000001) << 2; + reg |= (uint32_t(power_down) & 0x000001) << 3; + reg |= (uint32_t(muxout) & 0x000007) << 4; + reg |= (uint32_t(phase_detector_polarity) & 0x000001) << 7; + reg |= (uint32_t(charge_pump_mode) & 0x000001) << 8; + reg |= (uint32_t(fastlock_mode) & 0x000003) << 9; + reg |= (uint32_t(timer_counter_control) & 0x00000F) << 11; + reg |= (uint32_t(charge_pump_current_1) & 0x000007) << 15; + reg |= (uint32_t(charge_pump_current_2) & 0x000007) << 18; + reg |= (uint32_t(power_down) & 0x000002) << 20; break; default: break; } - reg |= (boost::uint32_t(addr) & 0x03); + reg |= (uint32_t(addr) & 0x03); return reg; } @@ -140,8 +140,8 @@ void adf4001_ctrl::program_regs(void) { } -void adf4001_ctrl::write_reg(boost::uint8_t addr) { - boost::uint32_t reg = adf4001_regs.get_reg(addr); //load the reg data +void adf4001_ctrl::write_reg(uint8_t addr) { + uint32_t reg = adf4001_regs.get_reg(addr); //load the reg data spi_iface->transact_spi(slaveno, spi_config, diff --git a/host/lib/usrp/common/adf4001_ctrl.hpp b/host/lib/usrp/common/adf4001_ctrl.hpp index e801ae0c4..c6813f43c 100644 --- a/host/lib/usrp/common/adf4001_ctrl.hpp +++ b/host/lib/usrp/common/adf4001_ctrl.hpp @@ -25,7 +25,7 @@ #include "spi_core_3000.hpp" #include <uhd/types/serial.hpp> -#include <boost/cstdint.hpp> +#include <stdint.h> #include <boost/thread/thread.hpp> namespace uhd { namespace usrp { @@ -34,14 +34,14 @@ class adf4001_regs_t { public: /* Function prototypes */ - boost::uint32_t get_reg(boost::uint8_t addr); + uint32_t get_reg(uint8_t addr); adf4001_regs_t(void); /* Register values / addresses */ - boost::uint16_t ref_counter; //14 bits - boost::uint16_t n; //13 bits - boost::uint8_t charge_pump_current_1; //3 bits - boost::uint8_t charge_pump_current_2; //3 bits + uint16_t ref_counter; //14 bits + uint16_t n; //13 bits + uint8_t charge_pump_current_1; //3 bits + uint8_t charge_pump_current_2; //3 bits enum anti_backlash_width_t { ANTI_BACKLASH_WIDTH_2_9NS = 0, @@ -133,7 +133,7 @@ private: adf4001_regs_t adf4001_regs; void program_regs(void); - void write_reg(boost::uint8_t addr); + void write_reg(uint8_t addr); }; }} diff --git a/host/lib/usrp/common/adf435x.hpp b/host/lib/usrp/common/adf435x.hpp index d08c6b9dd..ff7b1a2f4 100644 --- a/host/lib/usrp/common/adf435x.hpp +++ b/host/lib/usrp/common/adf435x.hpp @@ -33,7 +33,7 @@ class adf435x_iface { public: typedef boost::shared_ptr<adf435x_iface> sptr; - typedef boost::function<void(std::vector<boost::uint32_t>)> write_fn_t; + typedef boost::function<void(std::vector<uint32_t>)> write_fn_t; static sptr make_adf4350(write_fn_t write); static sptr make_adf4351(write_fn_t write); @@ -162,8 +162,8 @@ public: uhd::range_t int_range = get_int_range(); double pfd_freq = 0; - boost::uint16_t R = 0, BS = 0, N = 0, FRAC = 0, MOD = 0; - boost::uint16_t RFdiv = static_cast<boost::uint16_t>(rf_divider_range.start()); + uint16_t R = 0, BS = 0, N = 0, FRAC = 0, MOD = 0; + uint16_t RFdiv = static_cast<uint16_t>(rf_divider_range.start()); bool D = false, T = false; //Reference doubler for 50% duty cycle @@ -171,7 +171,7 @@ public: //increase RF divider until acceptable VCO frequency double vco_freq = target_freq; - while (vco_freq < VCO_FREQ_MIN && RFdiv < static_cast<boost::uint16_t>(rf_divider_range.stop())) { + while (vco_freq < VCO_FREQ_MIN && RFdiv < static_cast<uint16_t>(rf_divider_range.stop())) { vco_freq *= 2; RFdiv *= 2; } @@ -202,10 +202,10 @@ public: if (pfd_freq > PFD_FREQ_MAX) continue; //First, ignore fractional part of tuning - N = boost::uint16_t(std::floor(feedback_freq/pfd_freq)); + N = uint16_t(std::floor(feedback_freq/pfd_freq)); //keep N > minimum int divider requirement - if (N < static_cast<boost::uint16_t>(int_range.start())) continue; + if (N < static_cast<uint16_t>(int_range.start())) continue; for(BS=1; BS <= 255; BS+=1){ //keep the band select frequency at or below band_sel_freq_max @@ -217,7 +217,7 @@ public: //Fractional-N calculation MOD = 4095; //max fractional accuracy - FRAC = static_cast<boost::uint16_t>(boost::math::round((feedback_freq/pfd_freq - N)*MOD)); + FRAC = static_cast<uint16_t>(boost::math::round((feedback_freq/pfd_freq - N)*MOD)); if (int_n_mode) { if (FRAC > (MOD / 2)) { //Round integer such that actual freq is closest to target N++; @@ -247,7 +247,7 @@ public: _regs.frac_12_bit = FRAC; _regs.int_16_bit = N; _regs.mod_12_bit = MOD; - _regs.clock_divider_12_bit = std::max<boost::uint16_t>(1, boost::uint16_t(std::ceil(PHASE_RESYNC_TIME*pfd_freq/MOD))); + _regs.clock_divider_12_bit = std::max<uint16_t>(1, uint16_t(std::ceil(PHASE_RESYNC_TIME*pfd_freq/MOD))); _regs.feedback_select = _fb_after_divider ? adf435x_regs_t::FEEDBACK_SELECT_DIVIDED : adf435x_regs_t::FEEDBACK_SELECT_FUNDAMENTAL; @@ -261,7 +261,7 @@ public: _regs.reference_doubler = D ? adf435x_regs_t::REFERENCE_DOUBLER_ENABLED : adf435x_regs_t::REFERENCE_DOUBLER_DISABLED; - _regs.band_select_clock_div = boost::uint8_t(BS); + _regs.band_select_clock_div = uint8_t(BS); _regs.rf_divider_select = static_cast<typename adf435x_regs_t::rf_divider_select_t>(_get_rfdiv_setting(RFdiv)); _regs.ldf = int_n_mode ? adf435x_regs_t::LDF_INT_N : @@ -277,16 +277,16 @@ public: << boost::format("ADF 435X Settings: R=%d, BS=%d, N=%d, FRAC=%d, MOD=%d, T=%d, D=%d, RFdiv=%d" ) % R % BS % N % FRAC % MOD % T % D % RFdiv << std::endl; - UHD_ASSERT_THROW((_regs.frac_12_bit & ((boost::uint16_t)~0xFFF)) == 0); - UHD_ASSERT_THROW((_regs.mod_12_bit & ((boost::uint16_t)~0xFFF)) == 0); - UHD_ASSERT_THROW((_regs.clock_divider_12_bit & ((boost::uint16_t)~0xFFF)) == 0); - UHD_ASSERT_THROW((_regs.r_counter_10_bit & ((boost::uint16_t)~0x3FF)) == 0); + UHD_ASSERT_THROW((_regs.frac_12_bit & ((uint16_t)~0xFFF)) == 0); + UHD_ASSERT_THROW((_regs.mod_12_bit & ((uint16_t)~0xFFF)) == 0); + UHD_ASSERT_THROW((_regs.clock_divider_12_bit & ((uint16_t)~0xFFF)) == 0); + UHD_ASSERT_THROW((_regs.r_counter_10_bit & ((uint16_t)~0x3FF)) == 0); UHD_ASSERT_THROW(vco_freq >= VCO_FREQ_MIN and vco_freq <= VCO_FREQ_MAX); - UHD_ASSERT_THROW(RFdiv >= static_cast<boost::uint16_t>(rf_divider_range.start())); - UHD_ASSERT_THROW(RFdiv <= static_cast<boost::uint16_t>(rf_divider_range.stop())); - UHD_ASSERT_THROW(_regs.int_16_bit >= static_cast<boost::uint16_t>(int_range.start())); - UHD_ASSERT_THROW(_regs.int_16_bit <= static_cast<boost::uint16_t>(int_range.stop())); + UHD_ASSERT_THROW(RFdiv >= static_cast<uint16_t>(rf_divider_range.start())); + UHD_ASSERT_THROW(RFdiv <= static_cast<uint16_t>(rf_divider_range.stop())); + UHD_ASSERT_THROW(_regs.int_16_bit >= static_cast<uint16_t>(int_range.start())); + UHD_ASSERT_THROW(_regs.int_16_bit <= static_cast<uint16_t>(int_range.stop())); if (flush) commit(); return actual_freq; @@ -296,8 +296,8 @@ public: { //reset counters _regs.counter_reset = adf435x_regs_t::COUNTER_RESET_ENABLED; - std::vector<boost::uint32_t> regs; - regs.push_back(_regs.get_reg(boost::uint32_t(2))); + std::vector<uint32_t> regs; + regs.push_back(_regs.get_reg(uint32_t(2))); _write_fn(regs); _regs.counter_reset = adf435x_regs_t::COUNTER_RESET_DISABLED; @@ -305,14 +305,14 @@ public: //correct power-up sequence to write registers (5, 4, 3, 2, 1, 0) regs.clear(); for (int addr = 5; addr >= 0; addr--) { - regs.push_back(_regs.get_reg(boost::uint32_t(addr))); + regs.push_back(_regs.get_reg(uint32_t(addr))); } _write_fn(regs); } protected: uhd::range_t _get_rfdiv_range(); - int _get_rfdiv_setting(boost::uint16_t div); + int _get_rfdiv_setting(uint16_t div); write_fn_t _write_fn; adf435x_regs_t _regs; @@ -334,7 +334,7 @@ inline uhd::range_t adf435x_impl<adf4351_regs_t>::_get_rfdiv_range() } template <> -inline int adf435x_impl<adf4350_regs_t>::_get_rfdiv_setting(boost::uint16_t div) +inline int adf435x_impl<adf4350_regs_t>::_get_rfdiv_setting(uint16_t div) { switch (div) { case 1: return int(adf4350_regs_t::RF_DIVIDER_SELECT_DIV1); @@ -347,7 +347,7 @@ inline int adf435x_impl<adf4350_regs_t>::_get_rfdiv_setting(boost::uint16_t div) } template <> -inline int adf435x_impl<adf4351_regs_t>::_get_rfdiv_setting(boost::uint16_t div) +inline int adf435x_impl<adf4351_regs_t>::_get_rfdiv_setting(uint16_t div) { switch (div) { case 1: return int(adf4351_regs_t::RF_DIVIDER_SELECT_DIV1); diff --git a/host/lib/usrp/common/adf5355.cpp b/host/lib/usrp/common/adf5355.cpp index bb0906724..ee9b54622 100644 --- a/host/lib/usrp/common/adf5355.cpp +++ b/host/lib/usrp/common/adf5355.cpp @@ -46,9 +46,9 @@ static const double ADF5355_MIN_OUTB_FREQ = (3.4e9 * 2); static const double ADF5355_PHASE_RESYNC_TIME = 400e-6; -static const boost::uint32_t ADF5355_MOD1 = 16777216; -static const boost::uint32_t ADF5355_MAX_MOD2 = 16384; -static const boost::uint16_t ADF5355_MIN_INT_PRESCALER_89 = 75; +static const uint32_t ADF5355_MOD1 = 16777216; +static const uint32_t ADF5355_MAX_MOD2 = 16384; +static const uint16_t ADF5355_MIN_INT_PRESCALER_89 = 75; class adf5355_impl : public adf5355_iface { @@ -164,31 +164,31 @@ public: adf5355_regs_t::REFERENCE_DOUBLER_ENABLED : adf5355_regs_t::REFERENCE_DOUBLER_DISABLED; _regs.r_counter_10_bit = ref_div_factor; - UHD_ASSERT_THROW((_regs.r_counter_10_bit & ((boost::uint16_t)~0x3FF)) == 0); + UHD_ASSERT_THROW((_regs.r_counter_10_bit & ((uint16_t)~0x3FF)) == 0); //----------------------------------------------------------- //Set timeouts (code from ADI driver) - _regs.timeout = clamp<boost::uint16_t>( - static_cast<boost::uint16_t>(ceil(_pfd_freq / (20e3 * 30))), 1, 1023); - UHD_ASSERT_THROW((_regs.timeout & ((boost::uint16_t)~0x3FF)) == 0); + _regs.timeout = clamp<uint16_t>( + static_cast<uint16_t>(ceil(_pfd_freq / (20e3 * 30))), 1, 1023); + UHD_ASSERT_THROW((_regs.timeout & ((uint16_t)~0x3FF)) == 0); _regs.synth_lock_timeout = - static_cast<boost::uint8_t>(ceil((_pfd_freq * 2) / (100e3 * _regs.timeout))); - UHD_ASSERT_THROW((_regs.synth_lock_timeout & ((boost::uint16_t)~0x1F)) == 0); + static_cast<uint8_t>(ceil((_pfd_freq * 2) / (100e3 * _regs.timeout))); + UHD_ASSERT_THROW((_regs.synth_lock_timeout & ((uint16_t)~0x1F)) == 0); _regs.auto_level_timeout = - static_cast<boost::uint8_t>(ceil((_pfd_freq * 5) / (100e3 * _regs.timeout))); + static_cast<uint8_t>(ceil((_pfd_freq * 5) / (100e3 * _regs.timeout))); //----------------------------------------------------------- //Set VCO band divider _regs.vco_band_div = - static_cast<boost::uint8_t>(ceil(_pfd_freq / 2.4e6)); + static_cast<uint8_t>(ceil(_pfd_freq / 2.4e6)); //----------------------------------------------------------- //Set ADC delay (code from ADI driver) _regs.adc_enable = adf5355_regs_t::ADC_ENABLE_ENABLED; _regs.adc_conversion = adf5355_regs_t::ADC_CONVERSION_ENABLED; - _regs.adc_clock_divider = clamp<boost::uint8_t>( - static_cast<boost::uint8_t>(ceil(((_pfd_freq / 100e3) - 2) / 4)), 1, 255); - _wait_time_us = static_cast<boost::uint32_t>( + _regs.adc_clock_divider = clamp<uint8_t>( + static_cast<uint8_t>(ceil(((_pfd_freq / 100e3) - 2) / 4)), 1, 255); + _wait_time_us = static_cast<uint32_t>( ceil(16e6 / (_pfd_freq / ((4 * _regs.adc_clock_divider) + 2)))); //----------------------------------------------------------- @@ -196,7 +196,7 @@ public: _regs.phase_resync = adf5355_regs_t::PHASE_RESYNC_DISABLED; // Disabled during development _regs.phase_adjust = adf5355_regs_t::PHASE_ADJUST_DISABLED; _regs.sd_load_reset = adf5355_regs_t::SD_LOAD_RESET_ON_REG0_UPDATE; - _regs.phase_resync_clk_div = static_cast<boost::uint16_t>( + _regs.phase_resync_clk_div = static_cast<uint16_t>( floor(ADF5355_PHASE_RESYNC_TIME * _pfd_freq)); _rewrite_regs = true; @@ -247,14 +247,14 @@ public: if (target_freq > ADF5355_MAX_OUT_FREQ or target_freq < ADF5355_MIN_OUT_FREQ) { throw uhd::runtime_error("requested frequency out of range."); } - if ((boost::uint32_t) freq_resolution == 0) { + if ((uint32_t) freq_resolution == 0) { throw uhd::runtime_error("requested resolution cannot be less than 1."); } /* Calculate target VCOout frequency */ //Increase RF divider until acceptable VCO frequency double target_vco_freq = target_freq; - boost::uint32_t rf_divider = 1; + uint32_t rf_divider = 1; while (target_vco_freq < ADF5355_MIN_VCO_FREQ && rf_divider < 64) { target_vco_freq *= 2; rf_divider *= 2; @@ -278,17 +278,17 @@ public: } double N = prescaler_input_freq / _pfd_freq; - boost::uint16_t INT = static_cast<boost::uint16_t>(floor(N)); - boost::uint32_t FRAC1 = static_cast<boost::uint32_t>(floor((N - INT) * ADF5355_MOD1)); + uint16_t INT = static_cast<uint16_t>(floor(N)); + uint32_t FRAC1 = static_cast<uint32_t>(floor((N - INT) * ADF5355_MOD1)); double residue = ADF5355_MOD1 * (N - (INT + FRAC1 / ADF5355_MOD1)); double gcd = boost::math::gcd(static_cast<int>(_pfd_freq), static_cast<int>(freq_resolution)); - boost::uint16_t MOD2 = static_cast<boost::uint16_t>(floor(_pfd_freq / gcd)); + uint16_t MOD2 = static_cast<uint16_t>(floor(_pfd_freq / gcd)); if (MOD2 > ADF5355_MAX_MOD2) { MOD2 = ADF5355_MAX_MOD2; } - boost::uint16_t FRAC2 = ceil(residue * MOD2); + uint16_t FRAC2 = ceil(residue * MOD2); double coerced_vco_freq = _pfd_freq * ( todbl(INT) + ( @@ -317,9 +317,9 @@ public: // ADI: Tests have shown that the optimal bleed set is the following: // 4/N < IBLEED/ICP < 10/N */ /* - boost::uint32_t cp_curr_ua = - (static_cast<boost::uint32_t>(_regs.charge_pump_current) + 1) * 315; - _regs.cp_bleed_current = clamp<boost::uint8_t>( + uint32_t cp_curr_ua = + (static_cast<uint32_t>(_regs.charge_pump_current) + 1) * 315; + _regs.cp_bleed_current = clamp<uint8_t>( ceil((todbl(400)*cp_curr_ua) / (_regs.int_16_bit*375)), 1, 255); _regs.negative_bleed = adf5355_regs_t::NEGATIVE_BLEED_ENABLED; _regs.gated_bleed = adf5355_regs_t::GATED_BLEED_DISABLED; @@ -335,7 +335,7 @@ public: //For a full state sync write registers in reverse order 12 - 0 addr_vtr_t regs; for (int addr = 12; addr >= 0; addr--) { - regs.push_back(_regs.get_reg(boost::uint32_t(addr))); + regs.push_back(_regs.get_reg(uint32_t(addr))); } _write_fn(regs); _rewrite_regs = false; @@ -359,12 +359,12 @@ public: } private: //Members - typedef std::vector<boost::uint32_t> addr_vtr_t; + typedef std::vector<uint32_t> addr_vtr_t; write_fn_t _write_fn; adf5355_regs_t _regs; bool _rewrite_regs; - boost::uint32_t _wait_time_us; + uint32_t _wait_time_us; double _ref_freq; double _pfd_freq; double _fb_after_divider; diff --git a/host/lib/usrp/common/adf5355.hpp b/host/lib/usrp/common/adf5355.hpp index fb262cc9f..55294cda1 100644 --- a/host/lib/usrp/common/adf5355.hpp +++ b/host/lib/usrp/common/adf5355.hpp @@ -20,12 +20,13 @@ #include <boost/function.hpp> #include <vector> +#include <stdint.h> class adf5355_iface { public: typedef boost::shared_ptr<adf5355_iface> sptr; - typedef boost::function<void(std::vector<boost::uint32_t>)> write_fn_t; + typedef boost::function<void(std::vector<uint32_t>)> write_fn_t; static sptr make(write_fn_t write); diff --git a/host/lib/usrp/common/async_packet_handler.hpp b/host/lib/usrp/common/async_packet_handler.hpp index fef03483f..20409c77a 100644 --- a/host/lib/usrp/common/async_packet_handler.hpp +++ b/host/lib/usrp/common/async_packet_handler.hpp @@ -31,11 +31,11 @@ namespace uhd{ namespace usrp{ const to_host_type &to_host, async_metadata_t &metadata, const transport::vrt::if_packet_info_t &if_packet_info, - const boost::uint32_t *vrt_hdr, + const uint32_t *vrt_hdr, const double tick_rate, const size_t channel = 0 ){ - const boost::uint32_t *payload = vrt_hdr + if_packet_info.num_header_words32; + const uint32_t *payload = vrt_hdr + if_packet_info.num_header_words32; //load into metadata metadata.channel = channel; diff --git a/host/lib/usrp/common/fifo_ctrl_excelsior.cpp b/host/lib/usrp/common/fifo_ctrl_excelsior.cpp index f55d1ef41..a9995a161 100644 --- a/host/lib/usrp/common/fifo_ctrl_excelsior.cpp +++ b/host/lib/usrp/common/fifo_ctrl_excelsior.cpp @@ -38,7 +38,7 @@ static const size_t POKE32_CMD = (1 << 8); static const size_t PEEK32_CMD = 0; static const double ACK_TIMEOUT = 0.5; static const double MASSIVE_TIMEOUT = 10.0; //for when we wait on a timed command -static const boost::uint32_t MAX_SEQS_OUT = 15; +static const uint32_t MAX_SEQS_OUT = 15; #define SPI_DIV _config.spi_base + 0 #define SPI_CTRL _config.spi_base + 4 @@ -46,7 +46,7 @@ static const boost::uint32_t MAX_SEQS_OUT = 15; #define SPI_DIVIDER 4 struct ctrl_result_t{ - boost::uint32_t msg[2]; + uint32_t msg[2]; }; class fifo_ctrl_excelsior_impl : public fifo_ctrl_excelsior{ @@ -90,9 +90,9 @@ public: void handle_msg1(void){ managed_recv_buffer::sptr buff = _xport->get_recv_buff(); if (not buff) return; - const boost::uint32_t *pkt = buff->cast<const boost::uint32_t *>(); + const uint32_t *pkt = buff->cast<const uint32_t *>(); vrt::if_packet_info_t packet_info; - packet_info.num_packet_words32 = buff->size()/sizeof(boost::uint32_t); + packet_info.num_packet_words32 = buff->size()/sizeof(uint32_t); try{ vrt::if_hdr_unpack_le(pkt, packet_info); } @@ -107,7 +107,7 @@ public: } else if (packet_info.has_sid and packet_info.sid >= _config.async_sid_base and packet_info.sid <= _config.async_sid_base + _config.num_async_chan){ async_metadata_t metadata; - load_metadata_from_buff(uhd::wtohx<boost::uint32_t>, metadata, packet_info, pkt, _tick_rate, packet_info.sid - _config.async_sid_base); + load_metadata_from_buff(uhd::wtohx<uint32_t>, metadata, packet_info, pkt, _tick_rate, packet_info.sid - _config.async_sid_base); _async_fifo.push_with_pop_on_full(metadata); standard_async_msg_prints(metadata); } @@ -119,7 +119,7 @@ public: /******************************************************************* * Peek and poke 32 bit implementation ******************************************************************/ - void poke32(const wb_addr_type addr, const boost::uint32_t data){ + void poke32(const wb_addr_type addr, const uint32_t data){ boost::mutex::scoped_lock lock(_mutex); this->send_pkt(addr, data, POKE32_CMD); @@ -127,7 +127,7 @@ public: this->wait_for_ack(_seq_out-MAX_SEQS_OUT); } - boost::uint32_t peek32(const wb_addr_type addr){ + uint32_t peek32(const wb_addr_type addr){ boost::mutex::scoped_lock lock(_mutex); this->send_pkt(addr, 0, PEEK32_CMD); @@ -138,11 +138,11 @@ public: /******************************************************************* * Peek and poke 16 bit not implemented ******************************************************************/ - void poke16(const wb_addr_type, const boost::uint16_t){ + void poke16(const wb_addr_type, const uint16_t){ throw uhd::not_implemented_error("poke16 not implemented in fifo ctrl module"); } - boost::uint16_t peek16(const wb_addr_type){ + uint16_t peek16(const wb_addr_type){ throw uhd::not_implemented_error("peek16 not implemented in fifo ctrl module"); } @@ -158,24 +158,24 @@ public: _ctrl_word_cache = 0; // force update first time around } - boost::uint32_t transact_spi( + uint32_t transact_spi( int which_slave, const spi_config_t &config, - boost::uint32_t data, + uint32_t data, size_t num_bits, bool readback ){ boost::mutex::scoped_lock lock(_mutex); //load control word - boost::uint32_t ctrl_word = 0; + uint32_t ctrl_word = 0; ctrl_word |= ((which_slave & 0xffffff) << 0); ctrl_word |= ((num_bits & 0x3ff) << 24); if (config.mosi_edge == spi_config_t::EDGE_FALL) ctrl_word |= (1 << 31); if (config.miso_edge == spi_config_t::EDGE_RISE) ctrl_word |= (1 << 30); //load data word (must be in upper bits) - const boost::uint32_t data_out = data << (32 - num_bits); + const uint32_t data_out = data << (32 - num_bits); //conditionally send control word if (_ctrl_word_cache != ctrl_word){ @@ -223,18 +223,18 @@ private: /******************************************************************* * Primary control and interaction private methods ******************************************************************/ - UHD_INLINE void send_pkt(wb_addr_type addr, boost::uint32_t data, int cmd){ + UHD_INLINE void send_pkt(wb_addr_type addr, uint32_t data, int cmd){ managed_send_buffer::sptr buff = _xport->get_send_buff(); if (not buff){ throw uhd::runtime_error("fifo ctrl timed out getting a send buffer"); } - boost::uint32_t *pkt = buff->cast<boost::uint32_t *>(); + uint32_t *pkt = buff->cast<uint32_t *>(); //load packet info vrt::if_packet_info_t packet_info; packet_info.packet_type = vrt::if_packet_info_t::PACKET_TYPE_CONTEXT; packet_info.num_payload_words32 = 2; - packet_info.num_payload_bytes = packet_info.num_payload_words32*sizeof(boost::uint32_t); + packet_info.num_payload_bytes = packet_info.num_payload_words32*sizeof(uint32_t); packet_info.packet_count = ++_seq_out; packet_info.tsf = _time.to_ticks(_tick_rate); packet_info.sob = false; @@ -249,21 +249,21 @@ private: vrt::if_hdr_pack_le(pkt, packet_info); //load payload - const boost::uint32_t ctrl_word = (addr/4 & 0xff) | cmd | (_seq_out << 16); + const uint32_t ctrl_word = (addr/4 & 0xff) | cmd | (_seq_out << 16); pkt[packet_info.num_header_words32+0] = uhd::htowx(ctrl_word); pkt[packet_info.num_header_words32+1] = uhd::htowx(data); //send the buffer over the interface - buff->commit(sizeof(boost::uint32_t)*(packet_info.num_packet_words32)); + buff->commit(sizeof(uint32_t)*(packet_info.num_packet_words32)); } - UHD_INLINE bool wraparound_lt16(const boost::int16_t i0, const boost::int16_t i1){ + UHD_INLINE bool wraparound_lt16(const int16_t i0, const int16_t i1){ if (((i0 ^ i1) & 0x8000) == 0) //same sign bits - return boost::uint16_t(i0) < boost::uint16_t(i1); - return boost::int16_t(i1 - i0) > 0; + return uint16_t(i0) < uint16_t(i1); + return int16_t(i1 - i0) > 0; } - UHD_INLINE boost::uint32_t wait_for_ack(const boost::uint16_t seq_to_ack){ + UHD_INLINE uint32_t wait_for_ack(const uint16_t seq_to_ack){ while (wraparound_lt16(_seq_ack, seq_to_ack)){ ctrl_result_t res = ctrl_result_t(); @@ -280,13 +280,13 @@ private: zero_copy_if::sptr _xport; const fifo_ctrl_excelsior_config _config; boost::mutex _mutex; - boost::uint16_t _seq_out; - boost::uint16_t _seq_ack; + uint16_t _seq_out; + uint16_t _seq_ack; uhd::time_spec_t _time; bool _use_time; double _tick_rate; double _timeout; - boost::uint32_t _ctrl_word_cache; + uint32_t _ctrl_word_cache; bounded_buffer<async_metadata_t> _async_fifo; bounded_buffer<ctrl_result_t> _ctrl_fifo; task::sptr _msg_task; diff --git a/host/lib/usrp/common/fx2_ctrl.cpp b/host/lib/usrp/common/fx2_ctrl.cpp index 7ae97e4d0..c69223747 100644 --- a/host/lib/usrp/common/fx2_ctrl.cpp +++ b/host/lib/usrp/common/fx2_ctrl.cpp @@ -21,7 +21,7 @@ #include <uhd/transport/usb_control.hpp> #include <boost/functional/hash.hpp> #include <boost/thread/thread.hpp> -#include <boost/cstdint.hpp> +#include <stdint.h> #include <fstream> #include <sstream> #include <string> @@ -35,7 +35,7 @@ using namespace uhd::usrp; static const bool load_img_msg = true; -typedef boost::uint32_t hash_type; +typedef uint32_t hash_type; /*********************************************************************** * Helper Functions @@ -259,7 +259,7 @@ public: file.read((char *)buf, sizeof(buf)); const std::streamsize n = file.gcount(); if(n == 0) continue; - int ret = usrp_control_write(VRQ_FPGA_LOAD, 0, FL_XFER, buf, boost::uint16_t(n)); + int ret = usrp_control_write(VRQ_FPGA_LOAD, 0, FL_XFER, buf, uint16_t(n)); if (ret < 0 or std::streamsize(ret) != n) { throw uhd::io_error("usrp_load_fpga: fpga load error"); } @@ -281,7 +281,7 @@ public: { if (load_img_msg) UHD_MSG(status) << "Loading EEPROM image: " << filestring << "..." << std::flush; const char *filename = filestring.c_str(); - const boost::uint16_t i2c_addr = 0x50; + const uint16_t i2c_addr = 0x50; unsigned int addr; unsigned char data[256]; @@ -381,11 +381,11 @@ public: UHD_ASSERT_THROW(usrp_control_write_cmd(VRQ_FPGA_SET_RESET, on, 0) >= 0); } - int usrp_control_write(boost::uint8_t request, - boost::uint16_t value, - boost::uint16_t index, + int usrp_control_write(uint8_t request, + uint16_t value, + uint16_t index, unsigned char *buff, - boost::uint16_t length) + uint16_t length) { return _ctrl_transport->submit(VRT_VENDOR_OUT, // bmReqeustType request, // bRequest @@ -396,11 +396,11 @@ public: } - int usrp_control_read(boost::uint8_t request, - boost::uint16_t value, - boost::uint16_t index, + int usrp_control_read(uint8_t request, + uint16_t value, + uint16_t index, unsigned char *buff, - boost::uint16_t length) + uint16_t length) { return _ctrl_transport->submit(VRT_VENDOR_IN, // bmReqeustType request, // bRequest @@ -411,26 +411,26 @@ public: } - int usrp_control_write_cmd(boost::uint8_t request, boost::uint16_t value, boost::uint16_t index) + int usrp_control_write_cmd(uint8_t request, uint16_t value, uint16_t index) { return usrp_control_write(request, value, index, 0, 0); } byte_vector_t read_eeprom( - boost::uint16_t addr, - boost::uint16_t offset, + uint16_t addr, + uint16_t offset, size_t num_bytes ){ - this->write_i2c(addr, byte_vector_t(1, boost::uint8_t(offset))); + this->write_i2c(addr, byte_vector_t(1, uint8_t(offset))); return this->read_i2c(addr, num_bytes); } - int usrp_i2c_write(boost::uint16_t i2c_addr, unsigned char *buf, boost::uint16_t len) + int usrp_i2c_write(uint16_t i2c_addr, unsigned char *buf, uint16_t len) { return usrp_control_write(VRQ_I2C_WRITE, i2c_addr, 0, buf, len); } - int usrp_i2c_read(boost::uint16_t i2c_addr, unsigned char *buf, boost::uint16_t len) + int usrp_i2c_read(uint16_t i2c_addr, unsigned char *buf, uint16_t len) { return usrp_control_read(VRQ_I2C_READ, i2c_addr, 0, buf, len); } @@ -438,7 +438,7 @@ public: static const bool iface_debug = false; static const size_t max_i2c_data_bytes = 64; - void write_i2c(boost::uint16_t addr, const byte_vector_t &bytes) + void write_i2c(uint16_t addr, const byte_vector_t &bytes) { UHD_ASSERT_THROW(bytes.size() < max_i2c_data_bytes); @@ -448,7 +448,7 @@ public: uhd::runtime_error("USRP: failed i2c write"); } - byte_vector_t read_i2c(boost::uint16_t addr, size_t num_bytes) + byte_vector_t read_i2c(uint16_t addr, size_t num_bytes) { UHD_ASSERT_THROW(num_bytes < max_i2c_data_bytes); diff --git a/host/lib/usrp/common/fx2_ctrl.hpp b/host/lib/usrp/common/fx2_ctrl.hpp index 9f8cec296..40f91b9b6 100644 --- a/host/lib/usrp/common/fx2_ctrl.hpp +++ b/host/lib/usrp/common/fx2_ctrl.hpp @@ -87,11 +87,11 @@ public: * \param buff buffer to place data * \return number of bytes read or error */ - virtual int usrp_control_read(boost::uint8_t request, - boost::uint16_t value, - boost::uint16_t index, + virtual int usrp_control_read(uint8_t request, + uint16_t value, + uint16_t index, unsigned char *buff, - boost::uint16_t length) = 0; + uint16_t length) = 0; /*! * Submit an OUT transfer @@ -101,11 +101,11 @@ public: * \param buff buffer of data to be sent * \return number of bytes written or error */ - virtual int usrp_control_write(boost::uint8_t request, - boost::uint16_t value, - boost::uint16_t index, + virtual int usrp_control_write(uint8_t request, + uint16_t value, + uint16_t index, unsigned char *buff, - boost::uint16_t length) = 0; + uint16_t length) = 0; /*! * Perform an I2C write @@ -115,9 +115,9 @@ public: * \return number of bytes written or error */ - virtual int usrp_i2c_write(boost::uint16_t i2c_addr, + virtual int usrp_i2c_write(uint16_t i2c_addr, unsigned char *buf, - boost::uint16_t len) = 0; + uint16_t len) = 0; /*! * Perform an I2C read @@ -127,9 +127,9 @@ public: * \return number of bytes read or error */ - virtual int usrp_i2c_read(boost::uint16_t i2c_addr, + virtual int usrp_i2c_read(uint16_t i2c_addr, unsigned char *buf, - boost::uint16_t len) = 0; + uint16_t len) = 0; //! enable/disable the rx path virtual void usrp_rx_enable(bool on) = 0; diff --git a/host/lib/usrp/common/max287x.hpp b/host/lib/usrp/common/max287x.hpp index 540f5207f..9022e0f02 100644 --- a/host/lib/usrp/common/max287x.hpp +++ b/host/lib/usrp/common/max287x.hpp @@ -40,7 +40,7 @@ class max287x_iface public: typedef boost::shared_ptr<max287x_iface> sptr; - typedef boost::function<void(std::vector<boost::uint32_t>)> write_fn; + typedef boost::function<void(std::vector<uint32_t>)> write_fn; /** * LD Pin Modes @@ -207,7 +207,7 @@ public: * Set phase * @param phase the phase offset */ - virtual void set_phase(boost::uint16_t phase) = 0; + virtual void set_phase(uint16_t phase) = 0; /** * Write values configured by the set_* functions. @@ -251,7 +251,7 @@ public: virtual void set_clock_divider_mode(clock_divider_mode_t mode); virtual void set_cycle_slip_mode(bool enabled); virtual void set_low_noise_and_spur(low_noise_and_spur_t mode); - virtual void set_phase(boost::uint16_t phase); + virtual void set_phase(uint16_t phase); virtual void commit(); virtual bool can_sync(); virtual void config_for_sync(bool enable); @@ -877,7 +877,7 @@ void max287x<max287x_regs_t>::set_low_noise_and_spur(low_noise_and_spur_t mode) } template <typename max287x_regs_t> -void max287x<max287x_regs_t>::set_phase(boost::uint16_t phase) +void max287x<max287x_regs_t>::set_phase(uint16_t phase) { _regs.phase_12_bit = phase & 0xFFF; } @@ -885,26 +885,26 @@ void max287x<max287x_regs_t>::set_phase(boost::uint16_t phase) template <typename max287x_regs_t> void max287x<max287x_regs_t>::commit() { - std::vector<boost::uint32_t> regs; - std::set<boost::uint32_t> changed_regs; + std::vector<uint32_t> regs; + std::set<uint32_t> changed_regs; // Get only regs with changes if (_write_all_regs) { for (int addr = 5; addr >= 0; addr--) - regs.push_back(_regs.get_reg(boost::uint32_t(addr))); + regs.push_back(_regs.get_reg(uint32_t(addr))); } else { try { - changed_regs = _regs.template get_changed_addrs<boost::uint32_t> (); + changed_regs = _regs.template get_changed_addrs<uint32_t> (); for (int addr = 5; addr >= 0; addr--) { - if (changed_regs.find(boost::uint32_t(addr)) != changed_regs.end()) - regs.push_back(_regs.get_reg(boost::uint32_t(addr))); + if (changed_regs.find(uint32_t(addr)) != changed_regs.end()) + regs.push_back(_regs.get_reg(uint32_t(addr))); } } catch (uhd::runtime_error&) { // No saved state - write all regs for (int addr = 5; addr >= 0; addr--) - regs.push_back(_regs.get_reg(boost::uint32_t(addr))); + regs.push_back(_regs.get_reg(uint32_t(addr))); } } diff --git a/host/lib/usrp/common/recv_packet_demuxer.cpp b/host/lib/usrp/common/recv_packet_demuxer.cpp index db0f71280..8d9dcee9e 100644 --- a/host/lib/usrp/common/recv_packet_demuxer.cpp +++ b/host/lib/usrp/common/recv_packet_demuxer.cpp @@ -39,12 +39,12 @@ public: delete this; } - boost::uint32_t buff[10]; + uint32_t buff[10]; }; -static UHD_INLINE boost::uint32_t extract_sid(managed_recv_buffer::sptr &buff){ +static UHD_INLINE uint32_t extract_sid(managed_recv_buffer::sptr &buff){ //ASSUME that the data is in little endian format - return uhd::wtohx(buff->cast<const boost::uint32_t *>()[1]); + return uhd::wtohx(buff->cast<const uint32_t *>()[1]); } recv_packet_demuxer::~recv_packet_demuxer(void){ @@ -56,7 +56,7 @@ public: recv_packet_demuxer_impl( transport::zero_copy_if::sptr transport, const size_t size, - const boost::uint32_t sid_base + const uint32_t sid_base ): _transport(transport), _sid_base(sid_base), _queues(size) { @@ -92,19 +92,19 @@ public: vrt::if_packet_info_t info; info.packet_type = vrt::if_packet_info_t::PACKET_TYPE_DATA; info.num_payload_words32 = 1; - info.num_payload_bytes = info.num_payload_words32*sizeof(boost::uint32_t); + info.num_payload_bytes = info.num_payload_words32*sizeof(uint32_t); info.has_sid = true; info.sid = _sid_base + index; vrt::if_hdr_pack_le(mrb->buff, info); mrb->buff[info.num_header_words32] = rx_metadata_t::ERROR_CODE_OVERFLOW; - return mrb->make(mrb, mrb->buff, info.num_packet_words32*sizeof(boost::uint32_t)); + return mrb->make(mrb, mrb->buff, info.num_packet_words32*sizeof(uint32_t)); } } } private: transport::zero_copy_if::sptr _transport; - const boost::uint32_t _sid_base; + const uint32_t _sid_base; boost::mutex _mutex; struct channel_guts_type{ channel_guts_type(void): wrapper(container){} @@ -114,6 +114,6 @@ private: std::vector<channel_guts_type> _queues; }; -recv_packet_demuxer::sptr recv_packet_demuxer::make(transport::zero_copy_if::sptr transport, const size_t size, const boost::uint32_t sid_base){ +recv_packet_demuxer::sptr recv_packet_demuxer::make(transport::zero_copy_if::sptr transport, const size_t size, const uint32_t sid_base){ return sptr(new recv_packet_demuxer_impl(transport, size, sid_base)); } diff --git a/host/lib/usrp/common/recv_packet_demuxer.hpp b/host/lib/usrp/common/recv_packet_demuxer.hpp index a03f25f47..fc9b005a5 100644 --- a/host/lib/usrp/common/recv_packet_demuxer.hpp +++ b/host/lib/usrp/common/recv_packet_demuxer.hpp @@ -21,7 +21,7 @@ #include <uhd/config.hpp> #include <uhd/transport/zero_copy.hpp> #include <boost/shared_ptr.hpp> -#include <boost/cstdint.hpp> +#include <stdint.h> namespace uhd{ namespace usrp{ @@ -32,7 +32,7 @@ namespace uhd{ namespace usrp{ virtual ~recv_packet_demuxer(void) = 0; //! Make a new demuxer from a transport and parameters - static sptr make(transport::zero_copy_if::sptr transport, const size_t size, const boost::uint32_t sid_base); + static sptr make(transport::zero_copy_if::sptr transport, const size_t size, const uint32_t sid_base); //! Get a buffer at the given index from the transport virtual transport::managed_recv_buffer::sptr get_recv_buff(const size_t index, const double timeout) = 0; diff --git a/host/lib/usrp/common/recv_packet_demuxer_3000.hpp b/host/lib/usrp/common/recv_packet_demuxer_3000.hpp index ec930f3ad..3ad76f1a0 100644 --- a/host/lib/usrp/common/recv_packet_demuxer_3000.hpp +++ b/host/lib/usrp/common/recv_packet_demuxer_3000.hpp @@ -20,7 +20,7 @@ #include <uhd/config.hpp> #include <uhd/transport/zero_copy.hpp> -#include <boost/cstdint.hpp> +#include <stdint.h> #include <boost/thread.hpp> #include <uhd/utils/msg.hpp> #include <uhd/utils/atomic.hpp> @@ -44,7 +44,7 @@ namespace uhd{ namespace usrp{ _xport(xport) {/*NOP*/} - transport::managed_recv_buffer::sptr get_recv_buff(const boost::uint32_t sid, const double timeout) + transport::managed_recv_buffer::sptr get_recv_buff(const uint32_t sid, const double timeout) { const time_spec_t exit_time = time_spec_t(timeout) + time_spec_t::get_system_time(); transport::managed_recv_buffer::sptr buff; @@ -59,7 +59,7 @@ namespace uhd{ namespace usrp{ return buff; } - transport::managed_recv_buffer::sptr _internal_get_recv_buff(const boost::uint32_t sid, const double timeout) + transport::managed_recv_buffer::sptr _internal_get_recv_buff(const uint32_t sid, const double timeout) { transport::managed_recv_buffer::sptr buff; @@ -99,7 +99,7 @@ namespace uhd{ namespace usrp{ buff = _xport->get_recv_buff(timeout); if (buff) { - const boost::uint32_t new_sid = uhd::wtohx(buff->cast<const boost::uint32_t *>()[1]); + const uint32_t new_sid = uhd::wtohx(buff->cast<const uint32_t *>()[1]); if (new_sid != sid) { boost::mutex::scoped_lock l(mutex); @@ -118,7 +118,7 @@ namespace uhd{ namespace usrp{ return buff; } - void realloc_sid(const boost::uint32_t sid) + void realloc_sid(const uint32_t sid) { boost::mutex::scoped_lock l(mutex); while(not _queues[sid].empty()) //allocated and clears if already allocated @@ -127,10 +127,10 @@ namespace uhd{ namespace usrp{ } } - transport::zero_copy_if::sptr make_proxy(const boost::uint32_t sid); + transport::zero_copy_if::sptr make_proxy(const uint32_t sid); typedef std::queue<transport::managed_recv_buffer::sptr> queue_type_t; - std::map<boost::uint32_t, queue_type_t> _queues; + std::map<uint32_t, queue_type_t> _queues; transport::zero_copy_if::sptr _xport; #ifdef RECV_PACKET_DEMUXER_3000_THREAD_SAFE uhd::atomic_uint32_t _claimed; @@ -141,7 +141,7 @@ namespace uhd{ namespace usrp{ struct recv_packet_demuxer_proxy_3000 : transport::zero_copy_if { - recv_packet_demuxer_proxy_3000(recv_packet_demuxer_3000::sptr demux, transport::zero_copy_if::sptr xport, const boost::uint32_t sid): + recv_packet_demuxer_proxy_3000(recv_packet_demuxer_3000::sptr demux, transport::zero_copy_if::sptr xport, const uint32_t sid): _demux(demux), _xport(xport), _sid(sid) { _demux->realloc_sid(_sid); //causes clear @@ -167,10 +167,10 @@ namespace uhd{ namespace usrp{ recv_packet_demuxer_3000::sptr _demux; transport::zero_copy_if::sptr _xport; - const boost::uint32_t _sid; + const uint32_t _sid; }; - inline transport::zero_copy_if::sptr recv_packet_demuxer_3000::make_proxy(const boost::uint32_t sid) + inline transport::zero_copy_if::sptr recv_packet_demuxer_3000::make_proxy(const uint32_t sid) { return transport::zero_copy_if::sptr(new recv_packet_demuxer_proxy_3000(this->shared_from_this(), _xport, sid)); } diff --git a/host/lib/usrp/common/usrp3_fw_ctrl_iface.cpp b/host/lib/usrp/common/usrp3_fw_ctrl_iface.cpp index ef541e37f..16ee84140 100644 --- a/host/lib/usrp/common/usrp3_fw_ctrl_iface.cpp +++ b/host/lib/usrp/common/usrp3_fw_ctrl_iface.cpp @@ -32,7 +32,7 @@ namespace uhd { namespace usrp { namespace usrp3 { //---------------------------------------------------------- uhd::wb_iface::sptr usrp3_fw_ctrl_iface::make( uhd::transport::udp_simple::sptr udp_xport, - const boost::uint16_t product_id, + const uint16_t product_id, const bool verbose) { return wb_iface::sptr(new usrp3_fw_ctrl_iface(udp_xport, product_id, verbose)); @@ -44,7 +44,7 @@ uhd::wb_iface::sptr usrp3_fw_ctrl_iface::make( usrp3_fw_ctrl_iface::usrp3_fw_ctrl_iface( uhd::transport::udp_simple::sptr udp_xport, - const boost::uint16_t product_id, + const uint16_t product_id, const bool verbose) : _product_id(product_id), _verbose(verbose), _udp_xport(udp_xport), _seq_num(0) @@ -64,7 +64,7 @@ void usrp3_fw_ctrl_iface::flush() _flush(); } -void usrp3_fw_ctrl_iface::poke32(const wb_addr_type addr, const boost::uint32_t data) +void usrp3_fw_ctrl_iface::poke32(const wb_addr_type addr, const uint32_t data) { boost::mutex::scoped_lock lock(_mutex); @@ -81,7 +81,7 @@ void usrp3_fw_ctrl_iface::poke32(const wb_addr_type addr, const boost::uint32_t } } -boost::uint32_t usrp3_fw_ctrl_iface::peek32(const wb_addr_type addr) +uint32_t usrp3_fw_ctrl_iface::peek32(const wb_addr_type addr) { boost::mutex::scoped_lock lock(_mutex); @@ -98,13 +98,13 @@ boost::uint32_t usrp3_fw_ctrl_iface::peek32(const wb_addr_type addr) return 0; } -void usrp3_fw_ctrl_iface::_poke32(const wb_addr_type addr, const boost::uint32_t data) +void usrp3_fw_ctrl_iface::_poke32(const wb_addr_type addr, const uint32_t data) { //Load request struct fw_comm_pkt_t request; - request.id = uhd::htonx<boost::uint32_t>(FW_COMM_GENERATE_ID(_product_id)); - request.flags = uhd::htonx<boost::uint32_t>(FW_COMM_FLAGS_ACK | FW_COMM_CMD_POKE32); - request.sequence = uhd::htonx<boost::uint32_t>(_seq_num++); + request.id = uhd::htonx<uint32_t>(FW_COMM_GENERATE_ID(_product_id)); + request.flags = uhd::htonx<uint32_t>(FW_COMM_FLAGS_ACK | FW_COMM_CMD_POKE32); + request.sequence = uhd::htonx<uint32_t>(_seq_num++); request.addr = uhd::htonx(addr); request.data_words = 1; request.data[0] = uhd::htonx(data); @@ -119,7 +119,7 @@ void usrp3_fw_ctrl_iface::_poke32(const wb_addr_type addr, const boost::uint32_t if (nbytes == 0) throw uhd::io_error("udp fw poke32 - reply timed out"); //Sanity checks - const size_t flags = uhd::ntohx<boost::uint32_t>(reply.flags); + const size_t flags = uhd::ntohx<uint32_t>(reply.flags); UHD_ASSERT_THROW(nbytes == sizeof(reply)); UHD_ASSERT_THROW(not (flags & FW_COMM_FLAGS_ERROR_MASK)); UHD_ASSERT_THROW(flags & FW_COMM_CMD_POKE32); @@ -129,13 +129,13 @@ void usrp3_fw_ctrl_iface::_poke32(const wb_addr_type addr, const boost::uint32_t UHD_ASSERT_THROW(reply.data[0] == request.data[0]); } -boost::uint32_t usrp3_fw_ctrl_iface::_peek32(const wb_addr_type addr) +uint32_t usrp3_fw_ctrl_iface::_peek32(const wb_addr_type addr) { //Load request struct fw_comm_pkt_t request; - request.id = uhd::htonx<boost::uint32_t>(FW_COMM_GENERATE_ID(_product_id)); - request.flags = uhd::htonx<boost::uint32_t>(FW_COMM_FLAGS_ACK | FW_COMM_CMD_PEEK32); - request.sequence = uhd::htonx<boost::uint32_t>(_seq_num++); + request.id = uhd::htonx<uint32_t>(FW_COMM_GENERATE_ID(_product_id)); + request.flags = uhd::htonx<uint32_t>(FW_COMM_FLAGS_ACK | FW_COMM_CMD_PEEK32); + request.sequence = uhd::htonx<uint32_t>(_seq_num++); request.addr = uhd::htonx(addr); request.data_words = 1; request.data[0] = 0; @@ -150,7 +150,7 @@ boost::uint32_t usrp3_fw_ctrl_iface::_peek32(const wb_addr_type addr) if (nbytes == 0) throw uhd::io_error("udp fw peek32 - reply timed out"); //Sanity checks - const size_t flags = uhd::ntohx<boost::uint32_t>(reply.flags); + const size_t flags = uhd::ntohx<uint32_t>(reply.flags); UHD_ASSERT_THROW(nbytes == sizeof(reply)); UHD_ASSERT_THROW(not (flags & FW_COMM_FLAGS_ERROR_MASK)); UHD_ASSERT_THROW(flags & FW_COMM_CMD_PEEK32); @@ -159,7 +159,7 @@ boost::uint32_t usrp3_fw_ctrl_iface::_peek32(const wb_addr_type addr) UHD_ASSERT_THROW(reply.addr == request.addr); //return result! - return uhd::ntohx<boost::uint32_t>(reply.data[0]); + return uhd::ntohx<uint32_t>(reply.data[0]); } void usrp3_fw_ctrl_iface::_flush(void) @@ -172,7 +172,7 @@ void usrp3_fw_ctrl_iface::_flush(void) std::vector<std::string> usrp3_fw_ctrl_iface::discover_devices( const std::string& addr_hint, const std::string& port, - boost::uint16_t product_id) + uint16_t product_id) { std::vector<std::string> addrs; @@ -190,9 +190,9 @@ std::vector<std::string> usrp3_fw_ctrl_iface::discover_devices( //Send dummy request fw_comm_pkt_t request; - request.id = uhd::htonx<boost::uint32_t>(FW_COMM_GENERATE_ID(product_id)); - request.flags = uhd::htonx<boost::uint32_t>(FW_COMM_FLAGS_ACK|FW_COMM_CMD_ECHO); - request.sequence = uhd::htonx<boost::uint32_t>(std::rand()); + request.id = uhd::htonx<uint32_t>(FW_COMM_GENERATE_ID(product_id)); + request.flags = uhd::htonx<uint32_t>(FW_COMM_FLAGS_ACK|FW_COMM_CMD_ECHO); + request.sequence = uhd::htonx<uint32_t>(std::rand()); udp_bcast_xport->send(boost::asio::buffer(&request, sizeof(request))); //loop for replies until timeout @@ -213,18 +213,18 @@ std::vector<std::string> usrp3_fw_ctrl_iface::discover_devices( return addrs; } -boost::uint32_t usrp3_fw_ctrl_iface::get_iface_id( +uint32_t usrp3_fw_ctrl_iface::get_iface_id( const std::string& addr, const std::string& port, - boost::uint16_t product_id) + uint16_t product_id) { uhd::transport::udp_simple::sptr udp_xport = uhd::transport::udp_simple::make_connected(addr, port); //Send dummy request fw_comm_pkt_t request; - request.id = uhd::htonx<boost::uint32_t>(FW_COMM_GENERATE_ID(product_id)); - request.flags = uhd::htonx<boost::uint32_t>(FW_COMM_FLAGS_ACK|FW_COMM_CMD_ECHO); - request.sequence = uhd::htonx<boost::uint32_t>(std::rand()); + request.id = uhd::htonx<uint32_t>(FW_COMM_GENERATE_ID(product_id)); + request.flags = uhd::htonx<uint32_t>(FW_COMM_FLAGS_ACK|FW_COMM_CMD_ECHO); + request.sequence = uhd::htonx<uint32_t>(std::rand()); udp_xport->send(boost::asio::buffer(&request, sizeof(request))); //loop for replies until timeout @@ -237,7 +237,7 @@ boost::uint32_t usrp3_fw_ctrl_iface::get_iface_id( request.flags == reply->flags && request.sequence == reply->sequence) { - return uhd::ntohx<boost::uint32_t>(reply->data[0]); + return uhd::ntohx<uint32_t>(reply->data[0]); } else { throw uhd::io_error("udp get_iface_id - bad response"); } diff --git a/host/lib/usrp/common/usrp3_fw_ctrl_iface.hpp b/host/lib/usrp/common/usrp3_fw_ctrl_iface.hpp index 33286861b..9dc35ef9e 100644 --- a/host/lib/usrp/common/usrp3_fw_ctrl_iface.hpp +++ b/host/lib/usrp/common/usrp3_fw_ctrl_iface.hpp @@ -30,38 +30,38 @@ class usrp3_fw_ctrl_iface : public uhd::wb_iface public: usrp3_fw_ctrl_iface( uhd::transport::udp_simple::sptr udp_xport, - const boost::uint16_t product_id, + const uint16_t product_id, const bool verbose); virtual ~usrp3_fw_ctrl_iface(); // -- uhd::wb_iface -- - void poke32(const wb_addr_type addr, const boost::uint32_t data); - boost::uint32_t peek32(const wb_addr_type addr); + void poke32(const wb_addr_type addr, const uint32_t data); + uint32_t peek32(const wb_addr_type addr); void flush(); static uhd::wb_iface::sptr make( uhd::transport::udp_simple::sptr udp_xport, - const boost::uint16_t product_id, + const uint16_t product_id, const bool verbose = true); // -- uhd::wb_iface -- static std::vector<std::string> discover_devices( const std::string& addr_hint, const std::string& port, - boost::uint16_t product_id); + uint16_t product_id); - static boost::uint32_t get_iface_id( + static uint32_t get_iface_id( const std::string& addr, const std::string& port, - boost::uint16_t product_id); + uint16_t product_id); private: - void _poke32(const wb_addr_type addr, const boost::uint32_t data); - boost::uint32_t _peek32(const wb_addr_type addr); + void _poke32(const wb_addr_type addr, const uint32_t data); + uint32_t _peek32(const wb_addr_type addr); void _flush(void); - const boost::uint16_t _product_id; + const uint16_t _product_id; const bool _verbose; uhd::transport::udp_simple::sptr _udp_xport; - boost::uint32_t _seq_num; + uint32_t _seq_num; boost::mutex _mutex; static const size_t NUM_RETRIES = 3; |