1 files changed, 25 insertions, 25 deletions

diff --git a/host/lib/usrp/common/fifo_ctrl_excelsior.cpp b/host/lib/usrp/common/fifo_ctrl_excelsior.cpp
index f55d1ef41..a9995a161 100644
--- a/host/lib/usrp/common/fifo_ctrl_excelsior.cpp
+++ b/host/lib/usrp/common/fifo_ctrl_excelsior.cpp
@@ -38,7 +38,7 @@ static const size_t POKE32_CMD = (1 << 8);
 static const size_t PEEK32_CMD = 0;
 static const double ACK_TIMEOUT = 0.5;
 static const double MASSIVE_TIMEOUT = 10.0; //for when we wait on a timed command
-static const boost::uint32_t MAX_SEQS_OUT = 15;
+static const uint32_t MAX_SEQS_OUT = 15;
 
 #define SPI_DIV _config.spi_base + 0
 #define SPI_CTRL _config.spi_base + 4
@@ -46,7 +46,7 @@ static const boost::uint32_t MAX_SEQS_OUT = 15;
 #define SPI_DIVIDER 4
 
 struct ctrl_result_t{
-    boost::uint32_t msg[2];
+    uint32_t msg[2];
 };
 
 class fifo_ctrl_excelsior_impl : public fifo_ctrl_excelsior{
@@ -90,9 +90,9 @@ public:
     void handle_msg1(void){
         managed_recv_buffer::sptr buff = _xport->get_recv_buff();
         if (not buff) return;
-        const boost::uint32_t *pkt = buff->cast<const boost::uint32_t *>();
+        const uint32_t *pkt = buff->cast<const uint32_t *>();
         vrt::if_packet_info_t packet_info;
-        packet_info.num_packet_words32 = buff->size()/sizeof(boost::uint32_t);
+        packet_info.num_packet_words32 = buff->size()/sizeof(uint32_t);
         try{
             vrt::if_hdr_unpack_le(pkt, packet_info);
         }
@@ -107,7 +107,7 @@ public:
         }
         else if (packet_info.has_sid and packet_info.sid >= _config.async_sid_base and packet_info.sid <= _config.async_sid_base + _config.num_async_chan){
             async_metadata_t metadata;
-            load_metadata_from_buff(uhd::wtohx<boost::uint32_t>, metadata, packet_info, pkt, _tick_rate, packet_info.sid - _config.async_sid_base);
+            load_metadata_from_buff(uhd::wtohx<uint32_t>, metadata, packet_info, pkt, _tick_rate, packet_info.sid - _config.async_sid_base);
             _async_fifo.push_with_pop_on_full(metadata);
             standard_async_msg_prints(metadata);
         }
@@ -119,7 +119,7 @@ public:
     /*******************************************************************
      * Peek and poke 32 bit implementation
      ******************************************************************/
-    void poke32(const wb_addr_type addr, const boost::uint32_t data){
+    void poke32(const wb_addr_type addr, const uint32_t data){
         boost::mutex::scoped_lock lock(_mutex);
 
         this->send_pkt(addr, data, POKE32_CMD);
@@ -127,7 +127,7 @@ public:
         this->wait_for_ack(_seq_out-MAX_SEQS_OUT);
     }
 
-    boost::uint32_t peek32(const wb_addr_type addr){
+    uint32_t peek32(const wb_addr_type addr){
         boost::mutex::scoped_lock lock(_mutex);
 
         this->send_pkt(addr, 0, PEEK32_CMD);
@@ -138,11 +138,11 @@ public:
     /*******************************************************************
      * Peek and poke 16 bit not implemented
      ******************************************************************/
-    void poke16(const wb_addr_type, const boost::uint16_t){
+    void poke16(const wb_addr_type, const uint16_t){
         throw uhd::not_implemented_error("poke16 not implemented in fifo ctrl module");
     }
 
-    boost::uint16_t peek16(const wb_addr_type){
+    uint16_t peek16(const wb_addr_type){
         throw uhd::not_implemented_error("peek16 not implemented in fifo ctrl module");
     }
 
@@ -158,24 +158,24 @@ public:
         _ctrl_word_cache = 0; // force update first time around
     }
 
-    boost::uint32_t transact_spi(
+    uint32_t transact_spi(
         int which_slave,
         const spi_config_t &config,
-        boost::uint32_t data,
+        uint32_t data,
         size_t num_bits,
         bool readback
     ){
         boost::mutex::scoped_lock lock(_mutex);
 
         //load control word
-        boost::uint32_t ctrl_word = 0;
+        uint32_t ctrl_word = 0;
         ctrl_word |= ((which_slave & 0xffffff) << 0);
         ctrl_word |= ((num_bits & 0x3ff) << 24);
         if (config.mosi_edge == spi_config_t::EDGE_FALL) ctrl_word |= (1 << 31);
         if (config.miso_edge == spi_config_t::EDGE_RISE) ctrl_word |= (1 << 30);
 
         //load data word (must be in upper bits)
-        const boost::uint32_t data_out = data << (32 - num_bits);
+        const uint32_t data_out = data << (32 - num_bits);
 
         //conditionally send control word
         if (_ctrl_word_cache != ctrl_word){
@@ -223,18 +223,18 @@ private:
     /*******************************************************************
      * Primary control and interaction private methods
      ******************************************************************/
-    UHD_INLINE void send_pkt(wb_addr_type addr, boost::uint32_t data, int cmd){
+    UHD_INLINE void send_pkt(wb_addr_type addr, uint32_t data, int cmd){
         managed_send_buffer::sptr buff = _xport->get_send_buff();
         if (not buff){
             throw uhd::runtime_error("fifo ctrl timed out getting a send buffer");
         }
-        boost::uint32_t *pkt = buff->cast<boost::uint32_t *>();
+        uint32_t *pkt = buff->cast<uint32_t *>();
 
         //load packet info
         vrt::if_packet_info_t packet_info;
         packet_info.packet_type = vrt::if_packet_info_t::PACKET_TYPE_CONTEXT;
         packet_info.num_payload_words32 = 2;
-        packet_info.num_payload_bytes = packet_info.num_payload_words32*sizeof(boost::uint32_t);
+        packet_info.num_payload_bytes = packet_info.num_payload_words32*sizeof(uint32_t);
         packet_info.packet_count = ++_seq_out;
         packet_info.tsf = _time.to_ticks(_tick_rate);
         packet_info.sob = false;
@@ -249,21 +249,21 @@ private:
         vrt::if_hdr_pack_le(pkt, packet_info);
 
         //load payload
-        const boost::uint32_t ctrl_word = (addr/4 & 0xff) | cmd | (_seq_out << 16);
+        const uint32_t ctrl_word = (addr/4 & 0xff) | cmd | (_seq_out << 16);
         pkt[packet_info.num_header_words32+0] = uhd::htowx(ctrl_word);
         pkt[packet_info.num_header_words32+1] = uhd::htowx(data);
 
         //send the buffer over the interface
-        buff->commit(sizeof(boost::uint32_t)*(packet_info.num_packet_words32));
+        buff->commit(sizeof(uint32_t)*(packet_info.num_packet_words32));
     }
 
-    UHD_INLINE bool wraparound_lt16(const boost::int16_t i0, const boost::int16_t i1){
+    UHD_INLINE bool wraparound_lt16(const int16_t i0, const int16_t i1){
         if (((i0 ^ i1) & 0x8000) == 0) //same sign bits
-            return boost::uint16_t(i0) < boost::uint16_t(i1);
-        return boost::int16_t(i1 - i0) > 0;
+            return uint16_t(i0) < uint16_t(i1);
+        return int16_t(i1 - i0) > 0;
     }
 
-    UHD_INLINE boost::uint32_t wait_for_ack(const boost::uint16_t seq_to_ack){
+    UHD_INLINE uint32_t wait_for_ack(const uint16_t seq_to_ack){
 
         while (wraparound_lt16(_seq_ack, seq_to_ack)){
             ctrl_result_t res = ctrl_result_t();
@@ -280,13 +280,13 @@ private:
     zero_copy_if::sptr _xport;
     const fifo_ctrl_excelsior_config _config;
     boost::mutex _mutex;
-    boost::uint16_t _seq_out;
-    boost::uint16_t _seq_ack;
+    uint16_t _seq_out;
+    uint16_t _seq_ack;
     uhd::time_spec_t _time;
     bool _use_time;
     double _tick_rate;
     double _timeout;
-    boost::uint32_t _ctrl_word_cache;
+    uint32_t _ctrl_word_cache;
     bounded_buffer<async_metadata_t> _async_fifo;
     bounded_buffer<ctrl_result_t> _ctrl_fifo;
     task::sptr _msg_task;