diff options
Diffstat (limited to 'host/lib/include/uhdlib/usrp/common')
15 files changed, 604 insertions, 633 deletions
diff --git a/host/lib/include/uhdlib/usrp/common/ad9361_ctrl.hpp b/host/lib/include/uhdlib/usrp/common/ad9361_ctrl.hpp index f30694dbf..c059a3a09 100644 --- a/host/lib/include/uhdlib/usrp/common/ad9361_ctrl.hpp +++ b/host/lib/include/uhdlib/usrp/common/ad9361_ctrl.hpp @@ -45,27 +45,23 @@ public: virtual ~ad9361_ctrl(void) {} //! make a new codec control object - static sptr make_spi( - ad9361_params::sptr client_settings, + static sptr make_spi(ad9361_params::sptr client_settings, uhd::spi_iface::sptr spi_iface, - uint32_t slave_num - ); + uint32_t slave_num); static sptr make_spi( - ad9361_params::sptr client_settings, - ad9361_io::sptr spi_io_iface - ); + ad9361_params::sptr client_settings, ad9361_io::sptr spi_io_iface); //! Get a list of gain names for RX or TX - static std::vector<std::string> get_gain_names(const std::string &/*which*/) + static std::vector<std::string> get_gain_names(const std::string& /*which*/) { return std::vector<std::string>(1, "PGA"); } //! get the gain range for a particular gain element - static uhd::meta_range_t get_gain_range(const std::string &which) + static uhd::meta_range_t get_gain_range(const std::string& which) { - if(which[0] == 'R') { + if (which[0] == 'R') { return uhd::meta_range_t(0.0, 76.0, 1.0); } else { return uhd::meta_range_t(0.0, 89.75, 0.25); @@ -81,29 +77,28 @@ public: //! get the filter range for the frontend which static uhd::meta_range_t get_bw_filter_range(void) { - return uhd::meta_range_t(ad9361_device_t::AD9361_MIN_BW, ad9361_device_t::AD9361_MAX_BW); + return uhd::meta_range_t( + ad9361_device_t::AD9361_MIN_BW, ad9361_device_t::AD9361_MAX_BW); } //! get the clock rate range for the frontend static uhd::meta_range_t get_clock_rate_range(void) { - return uhd::meta_range_t( - ad9361_device_t::AD9361_MIN_CLOCK_RATE, - ad9361_device_t::AD9361_MAX_CLOCK_RATE - ); + return uhd::meta_range_t(ad9361_device_t::AD9361_MIN_CLOCK_RATE, + ad9361_device_t::AD9361_MAX_CLOCK_RATE); } //! set the filter bandwidth for the frontend's analog low pass - virtual double set_bw_filter(const std::string &/*which*/, const double /*bw*/) = 0; + virtual double set_bw_filter(const std::string& /*which*/, const double /*bw*/) = 0; //! set the gain for a particular gain element - virtual double set_gain(const std::string &which, const double value) = 0; + virtual double set_gain(const std::string& which, const double value) = 0; //! Enable or disable the AGC module - virtual void set_agc(const std::string &which, bool enable) = 0; + virtual void set_agc(const std::string& which, bool enable) = 0; //! configure the AGC module to slow or fast mode - virtual void set_agc_mode(const std::string &which, const std::string &mode) = 0; + virtual void set_agc_mode(const std::string& which, const std::string& mode) = 0; //! set a new clock rate, return the exact value virtual double set_clock_rate(const double rate) = 0; @@ -112,55 +107,60 @@ public: virtual void set_active_chains(bool tx1, bool tx2, bool rx1, bool rx2) = 0; //! set which timing mode is used - virtual void set_timing_mode(const std::string &timing_mode) = 0; + virtual void set_timing_mode(const std::string& timing_mode) = 0; //! tune the given frontend, return the exact value - virtual double tune(const std::string &which, const double value) = 0; + virtual double tune(const std::string& which, const double value) = 0; //! set the DC offset for I and Q manually - void set_dc_offset(const std::string &, const std::complex<double>) + void set_dc_offset(const std::string&, const std::complex<double>) { - //This feature should not be used according to Analog Devices - throw uhd::runtime_error("ad9361_ctrl::set_dc_offset this feature is not supported on this device."); + // This feature should not be used according to Analog Devices + throw uhd::runtime_error( + "ad9361_ctrl::set_dc_offset this feature is not supported on this device."); } //! enable or disable the BB/RF DC tracking feature - virtual void set_dc_offset_auto(const std::string &which, const bool on) = 0; + virtual void set_dc_offset_auto(const std::string& which, const bool on) = 0; //! set the IQ correction value manually - void set_iq_balance(const std::string &, const std::complex<double>) + void set_iq_balance(const std::string&, const std::complex<double>) { - //This feature should not be used according to Analog Devices - throw uhd::runtime_error("ad9361_ctrl::set_iq_balance this feature is not supported on this device."); + // This feature should not be used according to Analog Devices + throw uhd::runtime_error( + "ad9361_ctrl::set_iq_balance this feature is not supported on this device."); } //! enable or disable the quadrature calibration - virtual void set_iq_balance_auto(const std::string &which, const bool on) = 0; + virtual void set_iq_balance_auto(const std::string& which, const bool on) = 0; //! get the current frequency for the given frontend - virtual double get_freq(const std::string &which) = 0; + virtual double get_freq(const std::string& which) = 0; //! turn on/off Catalina's data port loopback virtual void data_port_loopback(const bool on) = 0; //! read internal RSSI sensor - virtual sensor_value_t get_rssi(const std::string &which) = 0; + virtual sensor_value_t get_rssi(const std::string& which) = 0; //! read the internal temp sensor virtual sensor_value_t get_temperature() = 0; //! List all available filters by name - virtual std::vector<std::string> get_filter_names(const std::string &which) = 0; + virtual std::vector<std::string> get_filter_names(const std::string& which) = 0; //! Return a list of all filters - virtual filter_info_base::sptr get_filter(const std::string &which, const std::string &filter_name) = 0; + virtual filter_info_base::sptr get_filter( + const std::string& which, const std::string& filter_name) = 0; //! Write back a filter - virtual void set_filter(const std::string &which, const std::string &filter_name, const filter_info_base::sptr) = 0; + virtual void set_filter(const std::string& which, + const std::string& filter_name, + const filter_info_base::sptr) = 0; virtual void output_digital_test_tone(bool enb) = 0; }; -}} +}} // namespace uhd::usrp #endif /* INCLUDED_AD9361_CTRL_HPP */ diff --git a/host/lib/include/uhdlib/usrp/common/ad936x_manager.hpp b/host/lib/include/uhdlib/usrp/common/ad936x_manager.hpp index 2d21d55e7..d65983c72 100644 --- a/host/lib/include/uhdlib/usrp/common/ad936x_manager.hpp +++ b/host/lib/include/uhdlib/usrp/common/ad936x_manager.hpp @@ -8,15 +8,15 @@ #ifndef INCLUDED_AD9361_MANAGER_HPP #define INCLUDED_AD9361_MANAGER_HPP -#include <uhd/types/wb_iface.hpp> -#include <uhd/utils/math.hpp> #include <uhd/property_tree.hpp> #include <uhd/types/direction.hpp> +#include <uhd/types/wb_iface.hpp> +#include <uhd/utils/math.hpp> #include <uhdlib/usrp/common/ad9361_ctrl.hpp> -#include <boost/format.hpp> -#include <memory> #include <stdint.h> +#include <boost/format.hpp> #include <functional> +#include <memory> namespace uhd { namespace usrp { @@ -45,12 +45,9 @@ public: * \param codec_ctrl The actual AD936x control object * \param n_frontends Number of frontends (1 or 2) */ - static sptr make( - const ad9361_ctrl::sptr &codec_ctrl, - const size_t n_frontends - ); + static sptr make(const ad9361_ctrl::sptr& codec_ctrl, const size_t n_frontends); - virtual ~ad936x_manager(void) {}; + virtual ~ad936x_manager(void){}; /*! Put the AD936x into a default state. * @@ -67,14 +64,13 @@ public: * * \param iface An interface to the associated radio control core * \param iface The radio control core's address to write the loopback value - * \param iface The radio control core's readback address to read back the returned value + * \param iface The radio control core's readback address to read back the returned + * value * * \throws a uhd::runtime_error if the loopback value didn't match. */ - virtual void loopback_self_test( - std::function<void(uint32_t)> poker_functor, - std::function<uint64_t()> peeker_functor - ) = 0; + virtual void loopback_self_test(std::function<void(uint32_t)> poker_functor, + std::function<uint64_t()> peeker_functor) = 0; /*! Determine a tick rate that will work with a given sampling rate * (assuming a DDC/DUC chain is also available elsewhere). @@ -97,10 +93,7 @@ public: * \returns a valid tick rate that can be used with the given rate * \throws a uhd::value_error if \p lcm_rate exceeds the max tick rate */ - virtual double get_auto_tick_rate( - const double lcm_rate, - size_t num_chans - ) = 0; + virtual double get_auto_tick_rate(const double lcm_rate, size_t num_chans) = 0; /*! Check if a given sampling rate is within the available analog bandwidth. * @@ -110,11 +103,9 @@ public: /*! Populate the property tree for the device frontend */ - virtual void populate_frontend_subtree( - uhd::property_tree::sptr subtree, - const std::string &key, - uhd::direction_t dir - ) = 0; + virtual void populate_frontend_subtree(uhd::property_tree::sptr subtree, + const std::string& key, + uhd::direction_t dir) = 0; }; /* class ad936x_manager */ diff --git a/host/lib/include/uhdlib/usrp/common/adf4001_ctrl.hpp b/host/lib/include/uhdlib/usrp/common/adf4001_ctrl.hpp index 8aa449539..0c1b06458 100644 --- a/host/lib/include/uhdlib/usrp/common/adf4001_ctrl.hpp +++ b/host/lib/include/uhdlib/usrp/common/adf4001_ctrl.hpp @@ -15,28 +15,28 @@ #include <uhd/types/serial.hpp> #include <uhdlib/usrp/cores/spi_core_3000.hpp> -#include <boost/thread/thread.hpp> #include <stdint.h> +#include <boost/thread/thread.hpp> namespace uhd { namespace usrp { -class adf4001_regs_t { +class adf4001_regs_t +{ public: - /* Function prototypes */ uint32_t get_reg(uint8_t addr); adf4001_regs_t(void); /* Register values / addresses */ - uint16_t ref_counter; //14 bits - uint16_t n; //13 bits - uint8_t charge_pump_current_1; //3 bits - uint8_t charge_pump_current_2; //3 bits + uint16_t ref_counter; // 14 bits + uint16_t n; // 13 bits + uint8_t charge_pump_current_1; // 3 bits + uint8_t charge_pump_current_2; // 3 bits enum anti_backlash_width_t { - ANTI_BACKLASH_WIDTH_2_9NS = 0, - ANTI_BACKLASH_WIDTH_1_3NS = 1, - ANTI_BACKLASH_WIDTH_6_0NS = 2, + ANTI_BACKLASH_WIDTH_2_9NS = 0, + ANTI_BACKLASH_WIDTH_1_3NS = 1, + ANTI_BACKLASH_WIDTH_6_0NS = 2, ANTI_BACKLASH_WIDTH_2_9NS_WAT = 3 }; anti_backlash_width_t anti_backlash_width; @@ -46,31 +46,25 @@ public: LOCK_DETECT_PRECISION_5CYC = 1 }; lock_detect_precision_t lock_detect_precision; - enum charge_pump_gain_t { - CHARGE_PUMP_GAIN_1 = 0, - CHARGE_PUMP_GAIN_2 = 1 - }; + enum charge_pump_gain_t { CHARGE_PUMP_GAIN_1 = 0, CHARGE_PUMP_GAIN_2 = 1 }; charge_pump_gain_t charge_pump_gain; - enum counter_reset_t { - COUNTER_RESET_NORMAL = 0, - COUNTER_RESET_RESET = 1 - }; - counter_reset_t counter_reset; + enum counter_reset_t { COUNTER_RESET_NORMAL = 0, COUNTER_RESET_RESET = 1 }; + counter_reset_t counter_reset; enum power_down_t { POWER_DOWN_NORMAL = 0, - POWER_DOWN_ASYNC = 1, - POWER_DOWN_SYNC = 3 + POWER_DOWN_ASYNC = 1, + POWER_DOWN_SYNC = 3 }; power_down_t power_down; enum muxout_t { MUXOUT_TRISTATE_OUT = 0, - MUXOUT_DLD = 1, - MUXOUT_NDIV = 2, - MUXOUT_AVDD = 3, - MUXOUT_RDIV = 4, - MUXOUT_NCH_OD_ALD = 5, - MUXOUT_SDO = 6, - MUXOUT_GND = 7 + MUXOUT_DLD = 1, + MUXOUT_NDIV = 2, + MUXOUT_AVDD = 3, + MUXOUT_RDIV = 4, + MUXOUT_NCH_OD_ALD = 5, + MUXOUT_SDO = 6, + MUXOUT_GND = 7 }; muxout_t muxout; enum phase_detector_polarity_t { @@ -78,20 +72,17 @@ public: PHASE_DETECTOR_POLARITY_POSITIVE = 1 }; phase_detector_polarity_t phase_detector_polarity; - enum charge_pump_mode_t { - CHARGE_PUMP_NORMAL = 0, - CHARGE_PUMP_TRISTATE = 1 - }; + enum charge_pump_mode_t { CHARGE_PUMP_NORMAL = 0, CHARGE_PUMP_TRISTATE = 1 }; charge_pump_mode_t charge_pump_mode; enum fastlock_mode_t { FASTLOCK_MODE_DISABLED = 0, - FASTLOCK_MODE_1 = 1, - FASTLOCK_MODE_2 = 2 + FASTLOCK_MODE_1 = 1, + FASTLOCK_MODE_2 = 2 }; fastlock_mode_t fastlock_mode; enum timer_counter_control_t { - TIMEOUT_3CYC = 0, - TIMEOUT_7CYC = 1, + TIMEOUT_3CYC = 0, + TIMEOUT_7CYC = 1, TIMEOUT_11CYC = 2, TIMEOUT_15CYC = 3, TIMEOUT_19CYC = 4, @@ -111,7 +102,8 @@ public: }; -class adf4001_ctrl { +class adf4001_ctrl +{ public: adf4001_ctrl(uhd::spi_iface::sptr _spi, int slaveno); virtual void set_lock_to_ext_ref(bool external); @@ -126,6 +118,6 @@ private: void write_reg(uint8_t addr); }; -}} +}} // namespace uhd::usrp #endif diff --git a/host/lib/include/uhdlib/usrp/common/adf435x.hpp b/host/lib/include/uhdlib/usrp/common/adf435x.hpp index 7989420dd..e805f9754 100644 --- a/host/lib/include/uhdlib/usrp/common/adf435x.hpp +++ b/host/lib/include/uhdlib/usrp/common/adf435x.hpp @@ -17,9 +17,9 @@ #include <uhd/utils/log.hpp> #include <uhdlib/utils/math.hpp> #include <uhdlib/utils/narrow.hpp> -#include <functional> #include <boost/math/special_functions/round.hpp> #include <boost/thread.hpp> +#include <functional> #include <vector> class adf435x_iface diff --git a/host/lib/include/uhdlib/usrp/common/adf535x.hpp b/host/lib/include/uhdlib/usrp/common/adf535x.hpp index 6af8556be..65e552844 100644 --- a/host/lib/include/uhdlib/usrp/common/adf535x.hpp +++ b/host/lib/include/uhdlib/usrp/common/adf535x.hpp @@ -17,8 +17,8 @@ #include <uhdlib/utils/narrow.hpp> #include <stdint.h> #include <boost/format.hpp> -#include <functional> #include <algorithm> +#include <functional> #include <iomanip> #include <utility> #include <vector> diff --git a/host/lib/include/uhdlib/usrp/common/apply_corrections.hpp b/host/lib/include/uhdlib/usrp/common/apply_corrections.hpp index fca566493..dffefffea 100644 --- a/host/lib/include/uhdlib/usrp/common/apply_corrections.hpp +++ b/host/lib/include/uhdlib/usrp/common/apply_corrections.hpp @@ -12,7 +12,7 @@ #include <uhd/property_tree.hpp> #include <string> -namespace uhd{ namespace usrp{ +namespace uhd { namespace usrp { void apply_tx_fe_corrections(property_tree::sptr sub_tree, // starts at mboards/x const std::string& db_serial, @@ -34,6 +34,6 @@ void apply_rx_fe_corrections(property_tree::sptr sub_tree, // starts at mboards/ const fs_path rx_fe_corr_path, const double rx_lo_freq // actual lo freq ); -}} //namespace uhd::usrp +}} // namespace uhd::usrp #endif /* INCLUDED_LIBUHD_USRP_COMMON_APPLY_CORRECTIONS_HPP */ diff --git a/host/lib/include/uhdlib/usrp/common/async_packet_handler.hpp b/host/lib/include/uhdlib/usrp/common/async_packet_handler.hpp index de9d17001..957afe7c1 100644 --- a/host/lib/include/uhdlib/usrp/common/async_packet_handler.hpp +++ b/host/lib/include/uhdlib/usrp/common/async_packet_handler.hpp @@ -14,61 +14,52 @@ #include <uhd/utils/byteswap.hpp> #include <uhd/utils/log.hpp> -namespace uhd{ namespace usrp{ +namespace uhd { namespace usrp { - template <typename to_host_type> - void load_metadata_from_buff( - const to_host_type &to_host, - async_metadata_t &metadata, - const transport::vrt::if_packet_info_t &if_packet_info, - const uint32_t *vrt_hdr, - const double tick_rate, - const size_t channel = 0 - ){ - const uint32_t *payload = vrt_hdr + if_packet_info.num_header_words32; +template <typename to_host_type> +void load_metadata_from_buff(const to_host_type& to_host, + async_metadata_t& metadata, + const transport::vrt::if_packet_info_t& if_packet_info, + const uint32_t* vrt_hdr, + const double tick_rate, + const size_t channel = 0) +{ + const uint32_t* payload = vrt_hdr + if_packet_info.num_header_words32; - //load into metadata - metadata.channel = channel; - metadata.has_time_spec = if_packet_info.has_tsf; - if (tick_rate == 0.0) { - metadata.time_spec = 0.0; - } else { - metadata.time_spec = time_spec_t::from_ticks(if_packet_info.tsf, tick_rate); - } - metadata.event_code = async_metadata_t::event_code_t(to_host(payload[0]) & 0xff); + // load into metadata + metadata.channel = channel; + metadata.has_time_spec = if_packet_info.has_tsf; + if (tick_rate == 0.0) { + metadata.time_spec = 0.0; + } else { + metadata.time_spec = time_spec_t::from_ticks(if_packet_info.tsf, tick_rate); + } + metadata.event_code = async_metadata_t::event_code_t(to_host(payload[0]) & 0xff); - //load user payload - for (size_t i = 1; i < if_packet_info.num_payload_words32; i++){ - if (i-1 == 4) break; //limit of 4 words32 - metadata.user_payload[i-1] = to_host(payload[i]); - } + // load user payload + for (size_t i = 1; i < if_packet_info.num_payload_words32; i++) { + if (i - 1 == 4) + break; // limit of 4 words32 + metadata.user_payload[i - 1] = to_host(payload[i]); } +} - UHD_INLINE void standard_async_msg_prints(const async_metadata_t &metadata) - { - if (metadata.event_code & - ( async_metadata_t::EVENT_CODE_UNDERFLOW - | async_metadata_t::EVENT_CODE_UNDERFLOW_IN_PACKET) - ) - { - UHD_LOG_FASTPATH("U") - } - else if (metadata.event_code & - ( async_metadata_t::EVENT_CODE_SEQ_ERROR - | async_metadata_t::EVENT_CODE_SEQ_ERROR_IN_BURST) - ) - { - UHD_LOG_FASTPATH("S") - } - else if (metadata.event_code & - async_metadata_t::EVENT_CODE_TIME_ERROR - ) - { - UHD_LOG_FASTPATH("L") - } +UHD_INLINE void standard_async_msg_prints(const async_metadata_t& metadata) +{ + if (metadata.event_code + & (async_metadata_t::EVENT_CODE_UNDERFLOW + | async_metadata_t::EVENT_CODE_UNDERFLOW_IN_PACKET)) { + UHD_LOG_FASTPATH("U") + } else if (metadata.event_code + & (async_metadata_t::EVENT_CODE_SEQ_ERROR + | async_metadata_t::EVENT_CODE_SEQ_ERROR_IN_BURST)) { + UHD_LOG_FASTPATH("S") + } else if (metadata.event_code & async_metadata_t::EVENT_CODE_TIME_ERROR) { + UHD_LOG_FASTPATH("L") } +} -}} //namespace uhd::usrp +}} // namespace uhd::usrp #endif /* INCLUDED_LIBUHD_USRP_COMMON_ASYNC_PACKET_HANDLER_HPP */ diff --git a/host/lib/include/uhdlib/usrp/common/fx2_ctrl.hpp b/host/lib/include/uhdlib/usrp/common/fx2_ctrl.hpp index 8579787f4..23498c96e 100644 --- a/host/lib/include/uhdlib/usrp/common/fx2_ctrl.hpp +++ b/host/lib/include/uhdlib/usrp/common/fx2_ctrl.hpp @@ -13,26 +13,27 @@ #include <uhd/utils/noncopyable.hpp> #include <memory> -#define FL_BEGIN 0 -#define FL_END 2 -#define FL_XFER 1 -#define USRP_HASH_SLOT_0_ADDR 0xe1e0 -#define USRP_HASH_SLOT_1_ADDR 0xe1f0 -#define VRQ_FPGA_LOAD 0x02 -#define VRQ_FPGA_SET_RESET 0x04 +#define FL_BEGIN 0 +#define FL_END 2 +#define FL_XFER 1 +#define USRP_HASH_SLOT_0_ADDR 0xe1e0 +#define USRP_HASH_SLOT_1_ADDR 0xe1f0 +#define VRQ_FPGA_LOAD 0x02 +#define VRQ_FPGA_SET_RESET 0x04 #define VRQ_FPGA_SET_TX_ENABLE 0x05 #define VRQ_FPGA_SET_RX_ENABLE 0x06 -#define VRQ_FPGA_SET_TX_RESET 0x0a -#define VRQ_FPGA_SET_RX_RESET 0x0b -#define VRQ_I2C_READ 0x81 -#define VRQ_I2C_WRITE 0x08 -#define VRQ_SET_LED 0x01 -#define VRT_VENDOR_IN 0xC0 -#define VRT_VENDOR_OUT 0x40 - -namespace uhd{ namespace usrp{ - -class fx2_ctrl : uhd::noncopyable, public uhd::i2c_iface{ +#define VRQ_FPGA_SET_TX_RESET 0x0a +#define VRQ_FPGA_SET_RX_RESET 0x0b +#define VRQ_I2C_READ 0x81 +#define VRQ_I2C_WRITE 0x08 +#define VRQ_SET_LED 0x01 +#define VRT_VENDOR_IN 0xC0 +#define VRT_VENDOR_OUT 0x40 + +namespace uhd { namespace usrp { + +class fx2_ctrl : uhd::noncopyable, public uhd::i2c_iface +{ public: typedef std::shared_ptr<fx2_ctrl> sptr; @@ -54,8 +55,7 @@ public: * \param filename name of firmware file * \param force reload firmware if already loaded */ - virtual void usrp_load_firmware(std::string filename, - bool force = false) = 0; + virtual void usrp_load_firmware(std::string filename, bool force = false) = 0; /*! * Load fpga file onto usrp @@ -79,10 +79,10 @@ public: * \return number of bytes read or error */ virtual int usrp_control_read(uint8_t request, - uint16_t value, - uint16_t index, - unsigned char *buff, - uint16_t length) = 0; + uint16_t value, + uint16_t index, + unsigned char* buff, + uint16_t length) = 0; /*! * Submit an OUT transfer @@ -94,10 +94,10 @@ public: * \return number of bytes written or error */ virtual int usrp_control_write(uint8_t request, - uint16_t value, - uint16_t index, - unsigned char *buff, - uint16_t length) = 0; + uint16_t value, + uint16_t index, + unsigned char* buff, + uint16_t length) = 0; /*! * Perform an I2C write @@ -107,9 +107,7 @@ public: * \return number of bytes written or error */ - virtual int usrp_i2c_write(uint16_t i2c_addr, - unsigned char *buf, - uint16_t len) = 0; + virtual int usrp_i2c_write(uint16_t i2c_addr, unsigned char* buf, uint16_t len) = 0; /*! * Perform an I2C read @@ -119,9 +117,7 @@ public: * \return number of bytes read or error */ - virtual int usrp_i2c_read(uint16_t i2c_addr, - unsigned char *buf, - uint16_t len) = 0; + virtual int usrp_i2c_read(uint16_t i2c_addr, unsigned char* buf, uint16_t len) = 0; //! enable/disable the rx path virtual void usrp_rx_enable(bool on) = 0; @@ -133,6 +129,6 @@ public: virtual void usrp_fpga_reset(bool on) = 0; }; -}} //namespace uhd::usrp +}} // namespace uhd::usrp #endif /* INCLUDED_LIBUHD_USRP_COMMON_FX2_CTRL_HPP */ diff --git a/host/lib/include/uhdlib/usrp/common/io_service_args.hpp b/host/lib/include/uhdlib/usrp/common/io_service_args.hpp index bdf1fa592..e294df8ee 100644 --- a/host/lib/include/uhdlib/usrp/common/io_service_args.hpp +++ b/host/lib/include/uhdlib/usrp/common/io_service_args.hpp @@ -64,13 +64,13 @@ struct io_service_args_t size_t num_poll_offload_threads = 1; //! CPU affinity of offload threads, if wait_mode is set to BLOCK - std::map<size_t,size_t> recv_offload_thread_cpu; + std::map<size_t, size_t> recv_offload_thread_cpu; //! CPU affinity of offload threads, if wait_mode is set to BLOCK std::map<size_t, size_t> send_offload_thread_cpu; //! CPU affinity of offload threads, if wait_mode is set to POLL - std::map<size_t,size_t> poll_offload_thread_cpu; + std::map<size_t, size_t> poll_offload_thread_cpu; }; /*! Reads I/O service args from provided dictionary diff --git a/host/lib/include/uhdlib/usrp/common/lmx2592.hpp b/host/lib/include/uhdlib/usrp/common/lmx2592.hpp index 9ee3f944f..74a4df437 100644 --- a/host/lib/include/uhdlib/usrp/common/lmx2592.hpp +++ b/host/lib/include/uhdlib/usrp/common/lmx2592.hpp @@ -12,9 +12,9 @@ #include <uhd/utils/math.hpp> #include <uhd/utils/safe_call.hpp> #include <boost/format.hpp> -#include <functional> #include <algorithm> #include <cstdint> +#include <functional> #include <utility> #include <vector> diff --git a/host/lib/include/uhdlib/usrp/common/max287x.hpp b/host/lib/include/uhdlib/usrp/common/max287x.hpp index 08ee5b16d..5e23649ef 100644 --- a/host/lib/include/uhdlib/usrp/common/max287x.hpp +++ b/host/lib/include/uhdlib/usrp/common/max287x.hpp @@ -16,13 +16,13 @@ #include <uhd/utils/log.hpp> #include <uhd/utils/math.hpp> #include <uhd/utils/safe_call.hpp> +#include <stdint.h> #include <boost/assign.hpp> -#include <functional> #include <boost/math/special_functions/round.hpp> -#include <vector> #include <chrono> +#include <functional> #include <thread> -#include <stdint.h> +#include <vector> /** * MAX287x interface @@ -37,7 +37,7 @@ public: /** * LD Pin Modes */ - typedef enum{ + typedef enum { LD_PIN_MODE_LOW, LD_PIN_MODE_DLD, LD_PIN_MODE_ALD, @@ -47,7 +47,7 @@ public: /** * MUXOUT Modes */ - typedef enum{ + typedef enum { MUXOUT_TRI_STATE, MUXOUT_HIGH, MUXOUT_LOW, @@ -62,7 +62,7 @@ public: /** * Charge Pump Currents */ - typedef enum{ + typedef enum { CHARGE_PUMP_CURRENT_0_32MA, CHARGE_PUMP_CURRENT_0_64MA, CHARGE_PUMP_CURRENT_0_96MA, @@ -84,7 +84,7 @@ public: /** * Output Powers */ - typedef enum{ + typedef enum { OUTPUT_POWER_M4DBM, OUTPUT_POWER_M1DBM, OUTPUT_POWER_2DBM, @@ -108,7 +108,8 @@ public: * @param write write function * @return shared pointer to object */ - template <typename max287X_t> static sptr make(write_fn write) + template <typename max287X_t> + static sptr make(write_fn write) { return sptr(new max287X_t(write)); } @@ -116,7 +117,7 @@ public: /** * Destructor */ - virtual ~max287x_iface() {}; + virtual ~max287x_iface(){}; /** * Power up the synthesizer @@ -142,10 +143,7 @@ public: * @return actual frequency */ virtual double set_frequency( - double target_freq, - double ref_freq, - double target_pfd_freq, - bool is_int_n) = 0; + double target_freq, double ref_freq, double target_pfd_freq, bool is_int_n) = 0; /** * Set output power @@ -231,10 +229,7 @@ public: virtual void shutdown(void); virtual bool is_shutdown(void); virtual double set_frequency( - double target_freq, - double ref_freq, - double target_pfd_freq, - bool is_int_n); + double target_freq, double ref_freq, double target_pfd_freq, bool is_int_n); virtual void set_output_power(output_power_t power); virtual void set_ld_pin_mode(ld_pin_mode_t mode); virtual void set_muxout_mode(muxout_mode_t mode); @@ -268,17 +263,16 @@ public: max2870(write_fn func) : max287x<max2870_regs_t>(func) {} ~max2870() {} double set_frequency( - double target_freq, - double ref_freq, - double target_pfd_freq, - bool is_int_n) + double target_freq, double ref_freq, double target_pfd_freq, bool is_int_n) { - _regs.cpoc = is_int_n ? max2870_regs_t::CPOC_ENABLED : max2870_regs_t::CPOC_DISABLED; - _regs.feedback_select = target_freq >= 3.0e9 ? - max2870_regs_t::FEEDBACK_SELECT_DIVIDED : - max2870_regs_t::FEEDBACK_SELECT_FUNDAMENTAL; - - return max287x<max2870_regs_t>::set_frequency(target_freq, ref_freq, target_pfd_freq, is_int_n); + _regs.cpoc = is_int_n ? max2870_regs_t::CPOC_ENABLED + : max2870_regs_t::CPOC_DISABLED; + _regs.feedback_select = target_freq >= 3.0e9 + ? max2870_regs_t::FEEDBACK_SELECT_DIVIDED + : max2870_regs_t::FEEDBACK_SELECT_FUNDAMENTAL; + + return max287x<max2870_regs_t>::set_frequency( + target_freq, ref_freq, target_pfd_freq, is_int_n); } void commit(void) { @@ -360,46 +354,41 @@ class max2871 : public max287x<max2871_regs_t> { public: max2871(write_fn func) : max287x<max2871_regs_t>(func) {} - ~max2871() {}; + ~max2871(){}; void set_muxout_mode(muxout_mode_t mode) { - switch(mode) - { - case MUXOUT_SYNC: - _regs.muxout = max2871_regs_t::MUXOUT_SYNC; - break; - case MUXOUT_SPI: - _regs.muxout = max2871_regs_t::MUXOUT_SPI; - break; - default: - max287x<max2871_regs_t>::set_muxout_mode(mode); + switch (mode) { + case MUXOUT_SYNC: + _regs.muxout = max2871_regs_t::MUXOUT_SYNC; + break; + case MUXOUT_SPI: + _regs.muxout = max2871_regs_t::MUXOUT_SPI; + break; + default: + max287x<max2871_regs_t>::set_muxout_mode(mode); } } double set_frequency( - double target_freq, - double ref_freq, - double target_pfd_freq, - bool is_int_n) + double target_freq, double ref_freq, double target_pfd_freq, bool is_int_n) { _regs.feedback_select = max2871_regs_t::FEEDBACK_SELECT_DIVIDED; - double freq = max287x<max2871_regs_t>::set_frequency(target_freq, ref_freq, target_pfd_freq, is_int_n); + double freq = max287x<max2871_regs_t>::set_frequency( + target_freq, ref_freq, target_pfd_freq, is_int_n); // To support phase synchronization on MAX2871, the same VCO // subband must be manually programmed on all synthesizers and // several registers must be set to specific values. - if (_config_for_sync) - { + if (_config_for_sync) { // Need to manually program VCO value static const double MIN_VCO_FREQ = 3e9; - double vco_freq = target_freq; + double vco_freq = target_freq; while (vco_freq < MIN_VCO_FREQ) - vco_freq *=2; + vco_freq *= 2; uint8_t vco_index = 0xFF; - for(const vco_map_t::value_type &vco: max2871_vco_map) - { - if (uhd::math::fp_compare::fp_compare_epsilon<double>(vco_freq) < vco.second.stop()) - { + for (const vco_map_t::value_type& vco : max2871_vco_map) { + if (uhd::math::fp_compare::fp_compare_epsilon<double>(vco_freq) + < vco.second.stop()) { vco_index = vco.first; break; } @@ -408,19 +397,18 @@ public: throw uhd::index_error("Invalid VCO frequency"); // Settings required for phase synchronization as per MAX2871 datasheet - _regs.shutdown_vas = max2871_regs_t::SHUTDOWN_VAS_DISABLED; - _regs.vco = vco_index; + _regs.shutdown_vas = max2871_regs_t::SHUTDOWN_VAS_DISABLED; + _regs.vco = vco_index; _regs.low_noise_and_spur = max2871_regs_t::LOW_NOISE_AND_SPUR_LOW_NOISE; - _regs.f01 = max2871_regs_t::F01_FRAC_N; - _regs.aux_output_select = max2871_regs_t::AUX_OUTPUT_SELECT_DIVIDED; - } - else - { + _regs.f01 = max2871_regs_t::F01_FRAC_N; + _regs.aux_output_select = max2871_regs_t::AUX_OUTPUT_SELECT_DIVIDED; + } else { // Reset values to defaults - _regs.shutdown_vas = max2871_regs_t::SHUTDOWN_VAS_ENABLED; // turn VCO auto selection on + _regs.shutdown_vas = + max2871_regs_t::SHUTDOWN_VAS_ENABLED; // turn VCO auto selection on _regs.low_noise_and_spur = max2871_regs_t::LOW_NOISE_AND_SPUR_LOW_SPUR_2; - _regs.f01 = max2871_regs_t::F01_AUTO; - _regs.aux_output_select = max2871_regs_t::AUX_OUTPUT_SELECT_FUNDAMENTAL; + _regs.f01 = max2871_regs_t::F01_AUTO; + _regs.aux_output_select = max2871_regs_t::AUX_OUTPUT_SELECT_FUNDAMENTAL; } return freq; @@ -430,17 +418,18 @@ public: { max287x<max2871_regs_t>::commit(); - // According to Maxim support, the following factors must be true to allow for phase synchronization - if (_regs.int_n_mode == max2871_regs_t::INT_N_MODE_FRAC_N and - _regs.feedback_select == max2871_regs_t::FEEDBACK_SELECT_DIVIDED and - _regs.aux_output_select == max2871_regs_t::AUX_OUTPUT_SELECT_DIVIDED and - _regs.rf_divider_select <= max2871_regs_t::RF_DIVIDER_SELECT_DIV16 and - _regs.low_noise_and_spur == max2871_regs_t::LOW_NOISE_AND_SPUR_LOW_NOISE and - _regs.f01 == max2871_regs_t::F01_FRAC_N and - _regs.reference_doubler == max2871_regs_t::REFERENCE_DOUBLER_DISABLED and - _regs.reference_divide_by_2 == max2871_regs_t::REFERENCE_DIVIDE_BY_2_DISABLED and - _regs.r_counter_10_bit == 1) - { + // According to Maxim support, the following factors must be true to allow for + // phase synchronization + if (_regs.int_n_mode == max2871_regs_t::INT_N_MODE_FRAC_N + and _regs.feedback_select == max2871_regs_t::FEEDBACK_SELECT_DIVIDED + and _regs.aux_output_select == max2871_regs_t::AUX_OUTPUT_SELECT_DIVIDED + and _regs.rf_divider_select <= max2871_regs_t::RF_DIVIDER_SELECT_DIV16 + and _regs.low_noise_and_spur == max2871_regs_t::LOW_NOISE_AND_SPUR_LOW_NOISE + and _regs.f01 == max2871_regs_t::F01_FRAC_N + and _regs.reference_doubler == max2871_regs_t::REFERENCE_DOUBLER_DISABLED + and _regs.reference_divide_by_2 + == max2871_regs_t::REFERENCE_DIVIDE_BY_2_DISABLED + and _regs.r_counter_10_bit == 1) { _can_sync = true; } else { _can_sync = false; @@ -456,12 +445,12 @@ public: // include it here. template <typename max287x_regs_t> -max287x<max287x_regs_t>::max287x(write_fn func) : - _can_sync(false), - _config_for_sync(false), - _write_all_regs(true), - _write(func), - _delay_after_write(true) +max287x<max287x_regs_t>::max287x(write_fn func) + : _can_sync(false) + , _config_for_sync(false) + , _write_all_regs(true) + , _write(func) + , _delay_after_write(true) { power_up(); } @@ -469,16 +458,13 @@ max287x<max287x_regs_t>::max287x(write_fn func) : template <typename max287x_regs_t> max287x<max287x_regs_t>::~max287x() { - UHD_SAFE_CALL - ( - shutdown(); - ) + UHD_SAFE_CALL(shutdown();) } template <typename max287x_regs_t> void max287x<max287x_regs_t>::power_up(void) { - _regs.power_down = max287x_regs_t::POWER_DOWN_NORMAL; + _regs.power_down = max287x_regs_t::POWER_DOWN_NORMAL; _regs.double_buffer = max287x_regs_t::DOUBLE_BUFFER_ENABLED; // According to MAX287x data sheets: @@ -489,7 +475,7 @@ void max287x<max287x_regs_t>::power_up(void) // The first write and the 20ms wait are done here. The second write // is done when any other function that does a write to the registers // is called (such as tuning). - _write_all_regs = true; + _write_all_regs = true; _delay_after_write = true; commit(); _write_all_regs = true; // Next call to commit() writes all regs @@ -498,9 +484,9 @@ void max287x<max287x_regs_t>::power_up(void) template <typename max287x_regs_t> void max287x<max287x_regs_t>::shutdown(void) { - _regs.rf_output_enable = max287x_regs_t::RF_OUTPUT_ENABLE_DISABLED; + _regs.rf_output_enable = max287x_regs_t::RF_OUTPUT_ENABLE_DISABLED; _regs.aux_output_enable = max287x_regs_t::AUX_OUTPUT_ENABLE_DISABLED; - _regs.power_down = max287x_regs_t::POWER_DOWN_SHUTDOWN; + _regs.power_down = max287x_regs_t::POWER_DOWN_SHUTDOWN; commit(); } @@ -512,50 +498,48 @@ bool max287x<max287x_regs_t>::is_shutdown(void) template <typename max287x_regs_t> double max287x<max287x_regs_t>::set_frequency( - double target_freq, - double ref_freq, - double target_pfd_freq, - bool is_int_n) + double target_freq, double ref_freq, double target_pfd_freq, bool is_int_n) { - //map rf divider select output dividers to enums - static const uhd::dict<int, typename max287x_regs_t::rf_divider_select_t> rfdivsel_to_enum = - boost::assign::map_list_of - (1, max287x_regs_t::RF_DIVIDER_SELECT_DIV1) - (2, max287x_regs_t::RF_DIVIDER_SELECT_DIV2) - (4, max287x_regs_t::RF_DIVIDER_SELECT_DIV4) - (8, max287x_regs_t::RF_DIVIDER_SELECT_DIV8) - (16, max287x_regs_t::RF_DIVIDER_SELECT_DIV16) - (32, max287x_regs_t::RF_DIVIDER_SELECT_DIV32) - (64, max287x_regs_t::RF_DIVIDER_SELECT_DIV64) - (128, max287x_regs_t::RF_DIVIDER_SELECT_DIV128); - - //map mode setting to valid integer divider (N) values - static const uhd::range_t int_n_mode_div_range(16,65535,1); - static const uhd::range_t frac_n_mode_div_range(19,4091,1); - - //other ranges and constants from MAX287X datasheets - static const uhd::range_t clock_div_range(1,4095,1); - static const uhd::range_t r_range(1,1023,1); + // map rf divider select output dividers to enums + static const uhd::dict<int, typename max287x_regs_t::rf_divider_select_t> + rfdivsel_to_enum = + boost::assign::map_list_of(1, max287x_regs_t::RF_DIVIDER_SELECT_DIV1)( + 2, max287x_regs_t::RF_DIVIDER_SELECT_DIV2)( + 4, max287x_regs_t::RF_DIVIDER_SELECT_DIV4)( + 8, max287x_regs_t::RF_DIVIDER_SELECT_DIV8)( + 16, max287x_regs_t::RF_DIVIDER_SELECT_DIV16)( + 32, max287x_regs_t::RF_DIVIDER_SELECT_DIV32)( + 64, max287x_regs_t::RF_DIVIDER_SELECT_DIV64)( + 128, max287x_regs_t::RF_DIVIDER_SELECT_DIV128); + + // map mode setting to valid integer divider (N) values + static const uhd::range_t int_n_mode_div_range(16, 65535, 1); + static const uhd::range_t frac_n_mode_div_range(19, 4091, 1); + + // other ranges and constants from MAX287X datasheets + static const uhd::range_t clock_div_range(1, 4095, 1); + static const uhd::range_t r_range(1, 1023, 1); static const double MIN_VCO_FREQ = 3e9; - static const double BS_FREQ = 50e3; - static const int MAX_BS_VALUE = 1023; - - int T = 0; - int D = ref_freq <= 10.0e6 ? 1 : 0; - int R = 0; - int BS = 0; - int N = 0; - int FRAC = 0; - int MOD = 4095; - int RFdiv = 1; + static const double BS_FREQ = 50e3; + static const int MAX_BS_VALUE = 1023; + + int T = 0; + int D = ref_freq <= 10.0e6 ? 1 : 0; + int R = 0; + int BS = 0; + int N = 0; + int FRAC = 0; + int MOD = 4095; + int RFdiv = 1; double pfd_freq = target_pfd_freq; - bool feedback_divided = (_regs.feedback_select == max287x_regs_t::FEEDBACK_SELECT_DIVIDED); + bool feedback_divided = + (_regs.feedback_select == max287x_regs_t::FEEDBACK_SELECT_DIVIDED); - //increase RF divider until acceptable VCO frequency (MIN freq for MAX287x VCO is 3GHz) + // increase RF divider until acceptable VCO frequency (MIN freq for MAX287x VCO is + // 3GHz) UHD_ASSERT_THROW(target_freq > 0); double vco_freq = target_freq; - while (vco_freq < MIN_VCO_FREQ) - { + while (vco_freq < MIN_VCO_FREQ) { vco_freq *= 2; RFdiv *= 2; } @@ -580,56 +564,60 @@ double max287x<max287x_regs_t>::set_frequency( * N = f_vco/f_pfd - FRAC/MOD = f_vco*((R*(T+1))/(f_ref*(1+D))) - FRAC/MOD * f_rf = f_vco/RFdiv */ - for(R = int(ref_freq*(1+D)/(target_pfd_freq*(1+T))); R <= r_range.stop(); R++) - { - //PFD input frequency = f_ref/R ... ignoring Reference doubler/divide-by-2 (D & T) - pfd_freq = ref_freq*(1+D)/(R*(1+T)); + for (R = int(ref_freq * (1 + D) / (target_pfd_freq * (1 + T))); R <= r_range.stop(); + R++) { + // PFD input frequency = f_ref/R ... ignoring Reference doubler/divide-by-2 (D & + // T) + pfd_freq = ref_freq * (1 + D) / (R * (1 + T)); - //keep the PFD frequency at or below target + // keep the PFD frequency at or below target if (pfd_freq > target_pfd_freq) continue; - //ignore fractional part of tuning - N = int((vco_freq/pfd_freq)/fb_divisor); + // ignore fractional part of tuning + N = int((vco_freq / pfd_freq) / fb_divisor); - //Fractional-N calculation - FRAC = int(boost::math::round(((vco_freq/pfd_freq)/fb_divisor - N)*MOD)); + // Fractional-N calculation + FRAC = int(boost::math::round(((vco_freq / pfd_freq) / fb_divisor - N) * MOD)); - if(is_int_n) - { - if (FRAC > (MOD / 2)) //Round integer such that actual freq is closest to target + if (is_int_n) { + if (FRAC + > (MOD / 2)) // Round integer such that actual freq is closest to target N++; FRAC = 0; } - //keep N within int divider requirements - if(is_int_n) - { - if(N <= int_n_mode_div_range.start()) continue; - if(N >= int_n_mode_div_range.stop()) continue; - } - else - { - if(N <= frac_n_mode_div_range.start()) continue; - if(N >= frac_n_mode_div_range.stop()) continue; + // keep N within int divider requirements + if (is_int_n) { + if (N <= int_n_mode_div_range.start()) + continue; + if (N >= int_n_mode_div_range.stop()) + continue; + } else { + if (N <= frac_n_mode_div_range.start()) + continue; + if (N >= frac_n_mode_div_range.stop()) + continue; } - //keep pfd freq low enough to achieve 50kHz BS clock + // keep pfd freq low enough to achieve 50kHz BS clock BS = static_cast<int>(std::ceil(pfd_freq / BS_FREQ)); - if(BS <= MAX_BS_VALUE) break; + if (BS <= MAX_BS_VALUE) + break; } UHD_ASSERT_THROW(R <= r_range.stop()); - //Reference divide-by-2 for 50% duty cycle + // Reference divide-by-2 for 50% duty cycle // if R even, move one divide by 2 to to regs.reference_divide_by_2 - if(R % 2 == 0) - { + if (R % 2 == 0) { T = 1; R /= 2; } - //actual frequency calculation - double actual_freq = double((N + (double(FRAC)/double(MOD)))*ref_freq*(1+int(D))/(R*(1+int(T)))) * fb_divisor / RFdiv; + // actual frequency calculation + double actual_freq = double((N + (double(FRAC) / double(MOD))) * ref_freq + * (1 + int(D)) / (R * (1 + int(T)))) + * fb_divisor / RFdiv; UHD_LOGGER_TRACE("MAX287X") << boost::format("Intermediates: ref=%0.2f, outdiv=%f, fbdiv=%f") % ref_freq @@ -645,40 +633,38 @@ double max287x<max287x_regs_t>::set_frequency( % (target_freq / 1e6) % (actual_freq / 1e6) % (vco_freq / 1e6) % (pfd_freq / 1e6) % (pfd_freq / BS / 1e6); - //load the register values + // load the register values _regs.rf_output_enable = max287x_regs_t::RF_OUTPUT_ENABLE_ENABLED; - if(is_int_n) { - _regs.cpl = max287x_regs_t::CPL_DISABLED; - _regs.ldf = max287x_regs_t::LDF_INT_N; + if (is_int_n) { + _regs.cpl = max287x_regs_t::CPL_DISABLED; + _regs.ldf = max287x_regs_t::LDF_INT_N; _regs.int_n_mode = max287x_regs_t::INT_N_MODE_INT_N; } else { - _regs.cpl = max287x_regs_t::CPL_ENABLED; - _regs.ldf = max287x_regs_t::LDF_FRAC_N; + _regs.cpl = max287x_regs_t::CPL_ENABLED; + _regs.ldf = max287x_regs_t::LDF_FRAC_N; _regs.int_n_mode = max287x_regs_t::INT_N_MODE_FRAC_N; } _regs.lds = pfd_freq <= 32e6 ? max287x_regs_t::LDS_SLOW : max287x_regs_t::LDS_FAST; _regs.frac_12_bit = FRAC; - _regs.int_16_bit = N; - _regs.mod_12_bit = MOD; - _regs.clock_divider_12_bit = std::max(int(clock_div_range.start()), int(std::ceil(400e-6*pfd_freq/MOD))); + _regs.int_16_bit = N; + _regs.mod_12_bit = MOD; + _regs.clock_divider_12_bit = + std::max(int(clock_div_range.start()), int(std::ceil(400e-6 * pfd_freq / MOD))); UHD_ASSERT_THROW(_regs.clock_divider_12_bit <= clock_div_range.stop()); - _regs.r_counter_10_bit = R; - _regs.reference_divide_by_2 = T ? - max287x_regs_t::REFERENCE_DIVIDE_BY_2_ENABLED : - max287x_regs_t::REFERENCE_DIVIDE_BY_2_DISABLED; - _regs.reference_doubler = D ? - max287x_regs_t::REFERENCE_DOUBLER_ENABLED : - max287x_regs_t::REFERENCE_DOUBLER_DISABLED; + _regs.r_counter_10_bit = R; + _regs.reference_divide_by_2 = T ? max287x_regs_t::REFERENCE_DIVIDE_BY_2_ENABLED + : max287x_regs_t::REFERENCE_DIVIDE_BY_2_DISABLED; + _regs.reference_doubler = D ? max287x_regs_t::REFERENCE_DOUBLER_ENABLED + : max287x_regs_t::REFERENCE_DOUBLER_DISABLED; _regs.band_select_clock_div = BS & 0xFF; - _regs.bs_msb = (BS & 0x300) >> 8; + _regs.bs_msb = (BS & 0x300) >> 8; UHD_ASSERT_THROW(rfdivsel_to_enum.has_key(RFdiv)); _regs.rf_divider_select = rfdivsel_to_enum[RFdiv]; - if (_regs.clock_div_mode == max287x_regs_t::CLOCK_DIV_MODE_FAST_LOCK) - { + if (_regs.clock_div_mode == max287x_regs_t::CLOCK_DIV_MODE_FAST_LOCK) { // Charge pump current needs to be set to lowest value in fast lock mode _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_0_32MA; // Make sure the register containing the charge pump current is written @@ -691,165 +677,163 @@ double max287x<max287x_regs_t>::set_frequency( template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_output_power(output_power_t power) { - switch (power) - { - case OUTPUT_POWER_M4DBM: - _regs.output_power = max287x_regs_t::OUTPUT_POWER_M4DBM; - break; - case OUTPUT_POWER_M1DBM: - _regs.output_power = max287x_regs_t::OUTPUT_POWER_M1DBM; - break; - case OUTPUT_POWER_2DBM: - _regs.output_power = max287x_regs_t::OUTPUT_POWER_2DBM; - break; - case OUTPUT_POWER_5DBM: - _regs.output_power = max287x_regs_t::OUTPUT_POWER_5DBM; - break; - default: - UHD_THROW_INVALID_CODE_PATH(); + switch (power) { + case OUTPUT_POWER_M4DBM: + _regs.output_power = max287x_regs_t::OUTPUT_POWER_M4DBM; + break; + case OUTPUT_POWER_M1DBM: + _regs.output_power = max287x_regs_t::OUTPUT_POWER_M1DBM; + break; + case OUTPUT_POWER_2DBM: + _regs.output_power = max287x_regs_t::OUTPUT_POWER_2DBM; + break; + case OUTPUT_POWER_5DBM: + _regs.output_power = max287x_regs_t::OUTPUT_POWER_5DBM; + break; + default: + UHD_THROW_INVALID_CODE_PATH(); } } template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_ld_pin_mode(ld_pin_mode_t mode) { - switch(mode) - { - case LD_PIN_MODE_LOW: - _regs.ld_pin_mode = max287x_regs_t::LD_PIN_MODE_LOW; - break; - case LD_PIN_MODE_DLD: - _regs.ld_pin_mode = max287x_regs_t::LD_PIN_MODE_DLD; - break; - case LD_PIN_MODE_ALD: - _regs.ld_pin_mode = max287x_regs_t::LD_PIN_MODE_ALD; - break; - case LD_PIN_MODE_HIGH: - _regs.ld_pin_mode = max287x_regs_t::LD_PIN_MODE_HIGH; - break; - default: - UHD_THROW_INVALID_CODE_PATH(); + switch (mode) { + case LD_PIN_MODE_LOW: + _regs.ld_pin_mode = max287x_regs_t::LD_PIN_MODE_LOW; + break; + case LD_PIN_MODE_DLD: + _regs.ld_pin_mode = max287x_regs_t::LD_PIN_MODE_DLD; + break; + case LD_PIN_MODE_ALD: + _regs.ld_pin_mode = max287x_regs_t::LD_PIN_MODE_ALD; + break; + case LD_PIN_MODE_HIGH: + _regs.ld_pin_mode = max287x_regs_t::LD_PIN_MODE_HIGH; + break; + default: + UHD_THROW_INVALID_CODE_PATH(); } } template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_muxout_mode(muxout_mode_t mode) { - switch(mode) - { - case MUXOUT_TRI_STATE: - _regs.muxout = max287x_regs_t::MUXOUT_TRI_STATE; - break; - case MUXOUT_HIGH: - _regs.muxout = max287x_regs_t::MUXOUT_HIGH; - break; - case MUXOUT_LOW: - _regs.muxout = max287x_regs_t::MUXOUT_LOW; - break; - case MUXOUT_RDIV: - _regs.muxout = max287x_regs_t::MUXOUT_RDIV; - break; - case MUXOUT_NDIV: - _regs.muxout = max287x_regs_t::MUXOUT_NDIV; - break; - case MUXOUT_ALD: - _regs.muxout = max287x_regs_t::MUXOUT_ALD; - break; - case MUXOUT_DLD: - _regs.muxout = max287x_regs_t::MUXOUT_DLD; - break; - default: - UHD_THROW_INVALID_CODE_PATH(); + switch (mode) { + case MUXOUT_TRI_STATE: + _regs.muxout = max287x_regs_t::MUXOUT_TRI_STATE; + break; + case MUXOUT_HIGH: + _regs.muxout = max287x_regs_t::MUXOUT_HIGH; + break; + case MUXOUT_LOW: + _regs.muxout = max287x_regs_t::MUXOUT_LOW; + break; + case MUXOUT_RDIV: + _regs.muxout = max287x_regs_t::MUXOUT_RDIV; + break; + case MUXOUT_NDIV: + _regs.muxout = max287x_regs_t::MUXOUT_NDIV; + break; + case MUXOUT_ALD: + _regs.muxout = max287x_regs_t::MUXOUT_ALD; + break; + case MUXOUT_DLD: + _regs.muxout = max287x_regs_t::MUXOUT_DLD; + break; + default: + UHD_THROW_INVALID_CODE_PATH(); } } template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_charge_pump_current(charge_pump_current_t cp_current) { - switch(cp_current) - { - case CHARGE_PUMP_CURRENT_0_32MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_0_32MA; - break; - case CHARGE_PUMP_CURRENT_0_64MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_0_64MA; - break; - case CHARGE_PUMP_CURRENT_0_96MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_0_96MA; - break; - case CHARGE_PUMP_CURRENT_1_28MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_1_28MA; - break; - case CHARGE_PUMP_CURRENT_1_60MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_1_60MA; - break; - case CHARGE_PUMP_CURRENT_1_92MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_1_92MA; - break; - case CHARGE_PUMP_CURRENT_2_24MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_2_24MA; - break; - case CHARGE_PUMP_CURRENT_2_56MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_2_56MA; - break; - case CHARGE_PUMP_CURRENT_2_88MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_2_88MA; - break; - case CHARGE_PUMP_CURRENT_3_20MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_3_20MA; - break; - case CHARGE_PUMP_CURRENT_3_52MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_3_52MA; - break; - case CHARGE_PUMP_CURRENT_3_84MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_3_84MA; - break; - case CHARGE_PUMP_CURRENT_4_16MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_4_16MA; - break; - case CHARGE_PUMP_CURRENT_4_48MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_4_48MA; - break; - case CHARGE_PUMP_CURRENT_4_80MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_4_80MA; - break; - case CHARGE_PUMP_CURRENT_5_12MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_5_12MA; - break; - default: - UHD_THROW_INVALID_CODE_PATH(); + switch (cp_current) { + case CHARGE_PUMP_CURRENT_0_32MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_0_32MA; + break; + case CHARGE_PUMP_CURRENT_0_64MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_0_64MA; + break; + case CHARGE_PUMP_CURRENT_0_96MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_0_96MA; + break; + case CHARGE_PUMP_CURRENT_1_28MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_1_28MA; + break; + case CHARGE_PUMP_CURRENT_1_60MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_1_60MA; + break; + case CHARGE_PUMP_CURRENT_1_92MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_1_92MA; + break; + case CHARGE_PUMP_CURRENT_2_24MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_2_24MA; + break; + case CHARGE_PUMP_CURRENT_2_56MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_2_56MA; + break; + case CHARGE_PUMP_CURRENT_2_88MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_2_88MA; + break; + case CHARGE_PUMP_CURRENT_3_20MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_3_20MA; + break; + case CHARGE_PUMP_CURRENT_3_52MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_3_52MA; + break; + case CHARGE_PUMP_CURRENT_3_84MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_3_84MA; + break; + case CHARGE_PUMP_CURRENT_4_16MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_4_16MA; + break; + case CHARGE_PUMP_CURRENT_4_48MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_4_48MA; + break; + case CHARGE_PUMP_CURRENT_4_80MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_4_80MA; + break; + case CHARGE_PUMP_CURRENT_5_12MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_5_12MA; + break; + default: + UHD_THROW_INVALID_CODE_PATH(); } } template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_auto_retune(bool enabled) { - _regs.retune = enabled ? max287x_regs_t::RETUNE_ENABLED : max287x_regs_t::RETUNE_DISABLED; + _regs.retune = enabled ? max287x_regs_t::RETUNE_ENABLED + : max287x_regs_t::RETUNE_DISABLED; } template <> inline void max287x<max2871_regs_t>::set_auto_retune(bool enabled) { - _regs.retune = enabled ? max2871_regs_t::RETUNE_ENABLED : max2871_regs_t::RETUNE_DISABLED; - _regs.vas_dly = enabled ? max2871_regs_t::VAS_DLY_ENABLED : max2871_regs_t::VAS_DLY_DISABLED; + _regs.retune = enabled ? max2871_regs_t::RETUNE_ENABLED + : max2871_regs_t::RETUNE_DISABLED; + _regs.vas_dly = enabled ? max2871_regs_t::VAS_DLY_ENABLED + : max2871_regs_t::VAS_DLY_DISABLED; } template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_clock_divider_mode(clock_divider_mode_t mode) { - switch(mode) - { - case CLOCK_DIV_MODE_CLOCK_DIVIDER_OFF: - _regs.clock_div_mode = max287x_regs_t::CLOCK_DIV_MODE_CLOCK_DIVIDER_OFF; - break; - case CLOCK_DIV_MODE_FAST_LOCK: - _regs.clock_div_mode = max287x_regs_t::CLOCK_DIV_MODE_FAST_LOCK; - break; - case CLOCK_DIV_MODE_PHASE: - _regs.clock_div_mode = max287x_regs_t::CLOCK_DIV_MODE_PHASE; - break; - default: - UHD_THROW_INVALID_CODE_PATH(); + switch (mode) { + case CLOCK_DIV_MODE_CLOCK_DIVIDER_OFF: + _regs.clock_div_mode = max287x_regs_t::CLOCK_DIV_MODE_CLOCK_DIVIDER_OFF; + break; + case CLOCK_DIV_MODE_FAST_LOCK: + _regs.clock_div_mode = max287x_regs_t::CLOCK_DIV_MODE_FAST_LOCK; + break; + case CLOCK_DIV_MODE_PHASE: + _regs.clock_div_mode = max287x_regs_t::CLOCK_DIV_MODE_PHASE; + break; + default: + UHD_THROW_INVALID_CODE_PATH(); } } @@ -857,25 +841,25 @@ template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_cycle_slip_mode(bool enabled) { if (enabled) - throw uhd::runtime_error("Cycle slip mode not supported on this MAX287x synthesizer."); + throw uhd::runtime_error( + "Cycle slip mode not supported on this MAX287x synthesizer."); } template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_low_noise_and_spur(low_noise_and_spur_t mode) { - switch(mode) - { - case LOW_NOISE_AND_SPUR_LOW_NOISE: - _regs.low_noise_and_spur = max287x_regs_t::LOW_NOISE_AND_SPUR_LOW_NOISE; - break; - case LOW_NOISE_AND_SPUR_LOW_SPUR_1: - _regs.low_noise_and_spur = max287x_regs_t::LOW_NOISE_AND_SPUR_LOW_SPUR_1; - break; - case LOW_NOISE_AND_SPUR_LOW_SPUR_2: - _regs.low_noise_and_spur = max287x_regs_t::LOW_NOISE_AND_SPUR_LOW_SPUR_2; - break; - default: - UHD_THROW_INVALID_CODE_PATH(); + switch (mode) { + case LOW_NOISE_AND_SPUR_LOW_NOISE: + _regs.low_noise_and_spur = max287x_regs_t::LOW_NOISE_AND_SPUR_LOW_NOISE; + break; + case LOW_NOISE_AND_SPUR_LOW_SPUR_1: + _regs.low_noise_and_spur = max287x_regs_t::LOW_NOISE_AND_SPUR_LOW_SPUR_1; + break; + case LOW_NOISE_AND_SPUR_LOW_SPUR_2: + _regs.low_noise_and_spur = max287x_regs_t::LOW_NOISE_AND_SPUR_LOW_SPUR_2; + break; + default: + UHD_THROW_INVALID_CODE_PATH(); } } @@ -892,21 +876,18 @@ void max287x<max287x_regs_t>::commit() std::set<uint32_t> changed_regs; // Get only regs with changes - if (_write_all_regs) - { + if (_write_all_regs) { for (int addr = 5; addr >= 0; addr--) regs.push_back(_regs.get_reg(uint32_t(addr))); } else { try { - changed_regs = _regs.template get_changed_addrs<uint32_t> (); + changed_regs = _regs.template get_changed_addrs<uint32_t>(); // register 0 must be written to apply double buffered fields - if (changed_regs.size() > 0) - { + if (changed_regs.size() > 0) { changed_regs.insert(0); } - for (int addr = 5; addr >= 0; addr--) - { + for (int addr = 5; addr >= 0; addr--) { if (changed_regs.find(uint32_t(addr)) != changed_regs.end()) regs.push_back(_regs.get_reg(uint32_t(addr))); } @@ -921,8 +902,7 @@ void max287x<max287x_regs_t>::commit() _regs.save_state(); _write_all_regs = false; - if (_delay_after_write) - { + if (_delay_after_write) { std::this_thread::sleep_for(std::chrono::milliseconds(20)); _delay_after_write = false; } diff --git a/host/lib/include/uhdlib/usrp/common/mpmd_mb_controller.hpp b/host/lib/include/uhdlib/usrp/common/mpmd_mb_controller.hpp index 8111d05b8..25d32ee28 100644 --- a/host/lib/include/uhdlib/usrp/common/mpmd_mb_controller.hpp +++ b/host/lib/include/uhdlib/usrp/common/mpmd_mb_controller.hpp @@ -27,7 +27,10 @@ public: mpmd_mb_controller(uhd::rpc_client::sptr rpcc, uhd::device_addr_t device_info); //! Return reference to the RPC client - uhd::rpc_client::sptr get_rpc_client() { return _rpc; } + uhd::rpc_client::sptr get_rpc_client() + { + return _rpc; + } /************************************************************************** * Timekeeper API diff --git a/host/lib/include/uhdlib/usrp/common/recv_packet_demuxer.hpp b/host/lib/include/uhdlib/usrp/common/recv_packet_demuxer.hpp index c61e0ba99..09882378e 100644 --- a/host/lib/include/uhdlib/usrp/common/recv_packet_demuxer.hpp +++ b/host/lib/include/uhdlib/usrp/common/recv_packet_demuxer.hpp @@ -10,24 +10,28 @@ #include <uhd/config.hpp> #include <uhd/transport/zero_copy.hpp> -#include <memory> #include <stdint.h> +#include <memory> -namespace uhd{ namespace usrp{ +namespace uhd { namespace usrp { - class recv_packet_demuxer{ - public: - typedef std::shared_ptr<recv_packet_demuxer> sptr; +class recv_packet_demuxer +{ +public: + typedef std::shared_ptr<recv_packet_demuxer> sptr; - virtual ~recv_packet_demuxer(void) = 0; + virtual ~recv_packet_demuxer(void) = 0; - //! Make a new demuxer from a transport and parameters - static sptr make(transport::zero_copy_if::sptr transport, const size_t size, const uint32_t sid_base); + //! Make a new demuxer from a transport and parameters + static sptr make(transport::zero_copy_if::sptr transport, + const size_t size, + const uint32_t sid_base); - //! Get a buffer at the given index from the transport - virtual transport::managed_recv_buffer::sptr get_recv_buff(const size_t index, const double timeout) = 0; - }; + //! Get a buffer at the given index from the transport + virtual transport::managed_recv_buffer::sptr get_recv_buff( + const size_t index, const double timeout) = 0; +}; -}} //namespace uhd::usrp +}} // namespace uhd::usrp #endif /* INCLUDED_LIBUHD_USRP_COMMON_RECV_PACKET_DEMUXER_HPP */ diff --git a/host/lib/include/uhdlib/usrp/common/recv_packet_demuxer_3000.hpp b/host/lib/include/uhdlib/usrp/common/recv_packet_demuxer_3000.hpp index bb5b070c5..4d20e17cc 100644 --- a/host/lib/include/uhdlib/usrp/common/recv_packet_demuxer_3000.hpp +++ b/host/lib/include/uhdlib/usrp/common/recv_packet_demuxer_3000.hpp @@ -10,140 +10,156 @@ #include <uhd/config.hpp> #include <uhd/transport/zero_copy.hpp> -#include <uhd/utils/log.hpp> #include <uhd/types/time_spec.hpp> #include <uhd/utils/byteswap.hpp> +#include <uhd/utils/log.hpp> +#include <stdint.h> #include <boost/thread.hpp> +#include <chrono> +#include <map> #include <memory> #include <queue> -#include <map> -#include <chrono> -#include <stdint.h> -namespace uhd{ namespace usrp{ +namespace uhd { namespace usrp { - struct recv_packet_demuxer_3000 : std::enable_shared_from_this<recv_packet_demuxer_3000> +struct recv_packet_demuxer_3000 : std::enable_shared_from_this<recv_packet_demuxer_3000> +{ + typedef std::shared_ptr<recv_packet_demuxer_3000> sptr; + static sptr make(transport::zero_copy_if::sptr xport) { - typedef std::shared_ptr<recv_packet_demuxer_3000> sptr; - static sptr make(transport::zero_copy_if::sptr xport) - { - return sptr(new recv_packet_demuxer_3000(xport)); - } + return sptr(new recv_packet_demuxer_3000(xport)); + } - recv_packet_demuxer_3000(transport::zero_copy_if::sptr xport): - _xport(xport) - {/*NOP*/} + recv_packet_demuxer_3000(transport::zero_copy_if::sptr xport) : _xport(xport) + { /*NOP*/ + } - transport::managed_recv_buffer::sptr get_recv_buff(const uint32_t sid, const double timeout) + transport::managed_recv_buffer::sptr get_recv_buff( + const uint32_t sid, const double timeout) + { + const auto exit_time = std::chrono::high_resolution_clock::now() + + std::chrono::microseconds(int64_t(timeout * 1e6)); + transport::managed_recv_buffer::sptr buff; + buff = _internal_get_recv_buff(sid, timeout); + while (not buff) // loop until timeout { - const auto exit_time = std::chrono::high_resolution_clock::now() - + std::chrono::microseconds(int64_t(timeout * 1e6)); - transport::managed_recv_buffer::sptr buff; - buff = _internal_get_recv_buff(sid, timeout); - while (not buff) //loop until timeout - { - const auto delta = exit_time - std::chrono::high_resolution_clock::now(); - const double new_timeout = - std::chrono::duration_cast<std::chrono::duration<double>>(delta) - .count(); - if (new_timeout < 0.0) { - break; - } - buff = _internal_get_recv_buff(sid, new_timeout); + const auto delta = exit_time - std::chrono::high_resolution_clock::now(); + const double new_timeout = + std::chrono::duration_cast<std::chrono::duration<double>>(delta).count(); + if (new_timeout < 0.0) { + break; } - return buff; + buff = _internal_get_recv_buff(sid, new_timeout); } + return buff; + } + + transport::managed_recv_buffer::sptr _internal_get_recv_buff( + const uint32_t sid, const double timeout) + { + transport::managed_recv_buffer::sptr buff; - transport::managed_recv_buffer::sptr _internal_get_recv_buff(const uint32_t sid, const double timeout) + //---------------------------------------------------------- + //-- Check the queue to see if we already have a buffer + //---------------------------------------------------------- { - transport::managed_recv_buffer::sptr buff; - - //---------------------------------------------------------- - //-- Check the queue to see if we already have a buffer - //---------------------------------------------------------- - { - boost::mutex::scoped_lock l(mutex); - queue_type_t &queue = _queues[sid]; - if (not queue.empty()) - { - buff = queue.front(); - queue.front().reset(); - queue.pop(); - return buff; - } - } - { - buff = _xport->get_recv_buff(timeout); - if (buff) - { - const uint32_t new_sid = uhd::wtohx(buff->cast<const uint32_t *>()[1]); - if (new_sid != sid) - { - boost::mutex::scoped_lock l(mutex); - if (_queues.count(new_sid) == 0) UHD_LOGGER_ERROR("STREAMER") - << "recv packet demuxer unexpected sid 0x" << std::hex << new_sid << std::dec - ; - else _queues[new_sid].push(buff); - buff.reset(); - } - } + boost::mutex::scoped_lock l(mutex); + queue_type_t& queue = _queues[sid]; + if (not queue.empty()) { + buff = queue.front(); + queue.front().reset(); + queue.pop(); + return buff; } - return buff; } - - void realloc_sid(const uint32_t sid) { - boost::mutex::scoped_lock l(mutex); - while(not _queues[sid].empty()) //allocated and clears if already allocated - { - _queues[sid].pop(); + buff = _xport->get_recv_buff(timeout); + if (buff) { + const uint32_t new_sid = uhd::wtohx(buff->cast<const uint32_t*>()[1]); + if (new_sid != sid) { + boost::mutex::scoped_lock l(mutex); + if (_queues.count(new_sid) == 0) + UHD_LOGGER_ERROR("STREAMER") + << "recv packet demuxer unexpected sid 0x" << std::hex + << new_sid << std::dec; + else + _queues[new_sid].push(buff); + buff.reset(); + } } } + return buff; + } - transport::zero_copy_if::sptr make_proxy(const uint32_t sid); - - typedef std::queue<transport::managed_recv_buffer::sptr> queue_type_t; - std::map<uint32_t, queue_type_t> _queues; - transport::zero_copy_if::sptr _xport; - boost::mutex mutex; - }; - - struct recv_packet_demuxer_proxy_3000 : transport::zero_copy_if + void realloc_sid(const uint32_t sid) { - recv_packet_demuxer_proxy_3000(recv_packet_demuxer_3000::sptr demux, transport::zero_copy_if::sptr xport, const uint32_t sid): - _demux(demux), _xport(xport), _sid(sid) + boost::mutex::scoped_lock l(mutex); + while (not _queues[sid].empty()) // allocated and clears if already allocated { - _demux->realloc_sid(_sid); //causes clear + _queues[sid].pop(); } + } - ~recv_packet_demuxer_proxy_3000(void) - { - _demux->realloc_sid(_sid); //causes clear - } + transport::zero_copy_if::sptr make_proxy(const uint32_t sid); - size_t get_num_recv_frames(void) const {return _xport->get_num_recv_frames();} - size_t get_recv_frame_size(void) const {return _xport->get_recv_frame_size();} - transport::managed_recv_buffer::sptr get_recv_buff(double timeout) - { - return _demux->get_recv_buff(_sid, timeout); - } - size_t get_num_send_frames(void) const {return _xport->get_num_send_frames();} - size_t get_send_frame_size(void) const {return _xport->get_send_frame_size();} - transport::managed_send_buffer::sptr get_send_buff(double timeout) - { - return _xport->get_send_buff(timeout); - } + typedef std::queue<transport::managed_recv_buffer::sptr> queue_type_t; + std::map<uint32_t, queue_type_t> _queues; + transport::zero_copy_if::sptr _xport; + boost::mutex mutex; +}; + +struct recv_packet_demuxer_proxy_3000 : transport::zero_copy_if +{ + recv_packet_demuxer_proxy_3000(recv_packet_demuxer_3000::sptr demux, + transport::zero_copy_if::sptr xport, + const uint32_t sid) + : _demux(demux), _xport(xport), _sid(sid) + { + _demux->realloc_sid(_sid); // causes clear + } - recv_packet_demuxer_3000::sptr _demux; - transport::zero_copy_if::sptr _xport; - const uint32_t _sid; - }; + ~recv_packet_demuxer_proxy_3000(void) + { + _demux->realloc_sid(_sid); // causes clear + } - inline transport::zero_copy_if::sptr recv_packet_demuxer_3000::make_proxy(const uint32_t sid) + size_t get_num_recv_frames(void) const { - return transport::zero_copy_if::sptr(new recv_packet_demuxer_proxy_3000(this->shared_from_this(), _xport, sid)); + return _xport->get_num_recv_frames(); } + size_t get_recv_frame_size(void) const + { + return _xport->get_recv_frame_size(); + } + transport::managed_recv_buffer::sptr get_recv_buff(double timeout) + { + return _demux->get_recv_buff(_sid, timeout); + } + size_t get_num_send_frames(void) const + { + return _xport->get_num_send_frames(); + } + size_t get_send_frame_size(void) const + { + return _xport->get_send_frame_size(); + } + transport::managed_send_buffer::sptr get_send_buff(double timeout) + { + return _xport->get_send_buff(timeout); + } + + recv_packet_demuxer_3000::sptr _demux; + transport::zero_copy_if::sptr _xport; + const uint32_t _sid; +}; + +inline transport::zero_copy_if::sptr recv_packet_demuxer_3000::make_proxy( + const uint32_t sid) +{ + return transport::zero_copy_if::sptr( + new recv_packet_demuxer_proxy_3000(this->shared_from_this(), _xport, sid)); +} -}} //namespace uhd::usrp +}} // namespace uhd::usrp #endif /* INCLUDED_LIBUHD_USRP_COMMON_RECV_PACKET_DEMUXER_3000_HPP */ diff --git a/host/lib/include/uhdlib/usrp/common/validate_subdev_spec.hpp b/host/lib/include/uhdlib/usrp/common/validate_subdev_spec.hpp index f2f3ce035..eb56da12e 100644 --- a/host/lib/include/uhdlib/usrp/common/validate_subdev_spec.hpp +++ b/host/lib/include/uhdlib/usrp/common/validate_subdev_spec.hpp @@ -9,20 +9,18 @@ #define INCLUDED_LIBUHD_USRP_COMMON_VALIDATE_SUBDEV_SPEC_HPP #include <uhd/config.hpp> -#include <uhd/usrp/subdev_spec.hpp> #include <uhd/property_tree.hpp> +#include <uhd/usrp/subdev_spec.hpp> #include <string> -namespace uhd{ namespace usrp{ +namespace uhd { namespace usrp { - //! Validate a subdev spec against a property tree - void validate_subdev_spec( - property_tree::sptr tree, - const subdev_spec_t &spec, - const std::string &type, //rx or tx - const std::string &mb = "0" - ); +//! Validate a subdev spec against a property tree +void validate_subdev_spec(property_tree::sptr tree, + const subdev_spec_t& spec, + const std::string& type, // rx or tx + const std::string& mb = "0"); -}} //namespace uhd::usrp +}} // namespace uhd::usrp #endif /* INCLUDED_LIBUHD_USRP_COMMON_VALIDATE_SUBDEV_SPEC_HPP */ |