diff options
Diffstat (limited to 'host/lib/include/uhdlib/usrp/common/max287x.hpp')
| -rw-r--r-- | host/lib/include/uhdlib/usrp/common/max287x.hpp | 620 |
1 files changed, 300 insertions, 320 deletions
diff --git a/host/lib/include/uhdlib/usrp/common/max287x.hpp b/host/lib/include/uhdlib/usrp/common/max287x.hpp index 08ee5b16d..5e23649ef 100644 --- a/host/lib/include/uhdlib/usrp/common/max287x.hpp +++ b/host/lib/include/uhdlib/usrp/common/max287x.hpp @@ -16,13 +16,13 @@ #include <uhd/utils/log.hpp> #include <uhd/utils/math.hpp> #include <uhd/utils/safe_call.hpp> +#include <stdint.h> #include <boost/assign.hpp> -#include <functional> #include <boost/math/special_functions/round.hpp> -#include <vector> #include <chrono> +#include <functional> #include <thread> -#include <stdint.h> +#include <vector> /** * MAX287x interface @@ -37,7 +37,7 @@ public: /** * LD Pin Modes */ - typedef enum{ + typedef enum { LD_PIN_MODE_LOW, LD_PIN_MODE_DLD, LD_PIN_MODE_ALD, @@ -47,7 +47,7 @@ public: /** * MUXOUT Modes */ - typedef enum{ + typedef enum { MUXOUT_TRI_STATE, MUXOUT_HIGH, MUXOUT_LOW, @@ -62,7 +62,7 @@ public: /** * Charge Pump Currents */ - typedef enum{ + typedef enum { CHARGE_PUMP_CURRENT_0_32MA, CHARGE_PUMP_CURRENT_0_64MA, CHARGE_PUMP_CURRENT_0_96MA, @@ -84,7 +84,7 @@ public: /** * Output Powers */ - typedef enum{ + typedef enum { OUTPUT_POWER_M4DBM, OUTPUT_POWER_M1DBM, OUTPUT_POWER_2DBM, @@ -108,7 +108,8 @@ public: * @param write write function * @return shared pointer to object */ - template <typename max287X_t> static sptr make(write_fn write) + template <typename max287X_t> + static sptr make(write_fn write) { return sptr(new max287X_t(write)); } @@ -116,7 +117,7 @@ public: /** * Destructor */ - virtual ~max287x_iface() {}; + virtual ~max287x_iface(){}; /** * Power up the synthesizer @@ -142,10 +143,7 @@ public: * @return actual frequency */ virtual double set_frequency( - double target_freq, - double ref_freq, - double target_pfd_freq, - bool is_int_n) = 0; + double target_freq, double ref_freq, double target_pfd_freq, bool is_int_n) = 0; /** * Set output power @@ -231,10 +229,7 @@ public: virtual void shutdown(void); virtual bool is_shutdown(void); virtual double set_frequency( - double target_freq, - double ref_freq, - double target_pfd_freq, - bool is_int_n); + double target_freq, double ref_freq, double target_pfd_freq, bool is_int_n); virtual void set_output_power(output_power_t power); virtual void set_ld_pin_mode(ld_pin_mode_t mode); virtual void set_muxout_mode(muxout_mode_t mode); @@ -268,17 +263,16 @@ public: max2870(write_fn func) : max287x<max2870_regs_t>(func) {} ~max2870() {} double set_frequency( - double target_freq, - double ref_freq, - double target_pfd_freq, - bool is_int_n) + double target_freq, double ref_freq, double target_pfd_freq, bool is_int_n) { - _regs.cpoc = is_int_n ? max2870_regs_t::CPOC_ENABLED : max2870_regs_t::CPOC_DISABLED; - _regs.feedback_select = target_freq >= 3.0e9 ? - max2870_regs_t::FEEDBACK_SELECT_DIVIDED : - max2870_regs_t::FEEDBACK_SELECT_FUNDAMENTAL; - - return max287x<max2870_regs_t>::set_frequency(target_freq, ref_freq, target_pfd_freq, is_int_n); + _regs.cpoc = is_int_n ? max2870_regs_t::CPOC_ENABLED + : max2870_regs_t::CPOC_DISABLED; + _regs.feedback_select = target_freq >= 3.0e9 + ? max2870_regs_t::FEEDBACK_SELECT_DIVIDED + : max2870_regs_t::FEEDBACK_SELECT_FUNDAMENTAL; + + return max287x<max2870_regs_t>::set_frequency( + target_freq, ref_freq, target_pfd_freq, is_int_n); } void commit(void) { @@ -360,46 +354,41 @@ class max2871 : public max287x<max2871_regs_t> { public: max2871(write_fn func) : max287x<max2871_regs_t>(func) {} - ~max2871() {}; + ~max2871(){}; void set_muxout_mode(muxout_mode_t mode) { - switch(mode) - { - case MUXOUT_SYNC: - _regs.muxout = max2871_regs_t::MUXOUT_SYNC; - break; - case MUXOUT_SPI: - _regs.muxout = max2871_regs_t::MUXOUT_SPI; - break; - default: - max287x<max2871_regs_t>::set_muxout_mode(mode); + switch (mode) { + case MUXOUT_SYNC: + _regs.muxout = max2871_regs_t::MUXOUT_SYNC; + break; + case MUXOUT_SPI: + _regs.muxout = max2871_regs_t::MUXOUT_SPI; + break; + default: + max287x<max2871_regs_t>::set_muxout_mode(mode); } } double set_frequency( - double target_freq, - double ref_freq, - double target_pfd_freq, - bool is_int_n) + double target_freq, double ref_freq, double target_pfd_freq, bool is_int_n) { _regs.feedback_select = max2871_regs_t::FEEDBACK_SELECT_DIVIDED; - double freq = max287x<max2871_regs_t>::set_frequency(target_freq, ref_freq, target_pfd_freq, is_int_n); + double freq = max287x<max2871_regs_t>::set_frequency( + target_freq, ref_freq, target_pfd_freq, is_int_n); // To support phase synchronization on MAX2871, the same VCO // subband must be manually programmed on all synthesizers and // several registers must be set to specific values. - if (_config_for_sync) - { + if (_config_for_sync) { // Need to manually program VCO value static const double MIN_VCO_FREQ = 3e9; - double vco_freq = target_freq; + double vco_freq = target_freq; while (vco_freq < MIN_VCO_FREQ) - vco_freq *=2; + vco_freq *= 2; uint8_t vco_index = 0xFF; - for(const vco_map_t::value_type &vco: max2871_vco_map) - { - if (uhd::math::fp_compare::fp_compare_epsilon<double>(vco_freq) < vco.second.stop()) - { + for (const vco_map_t::value_type& vco : max2871_vco_map) { + if (uhd::math::fp_compare::fp_compare_epsilon<double>(vco_freq) + < vco.second.stop()) { vco_index = vco.first; break; } @@ -408,19 +397,18 @@ public: throw uhd::index_error("Invalid VCO frequency"); // Settings required for phase synchronization as per MAX2871 datasheet - _regs.shutdown_vas = max2871_regs_t::SHUTDOWN_VAS_DISABLED; - _regs.vco = vco_index; + _regs.shutdown_vas = max2871_regs_t::SHUTDOWN_VAS_DISABLED; + _regs.vco = vco_index; _regs.low_noise_and_spur = max2871_regs_t::LOW_NOISE_AND_SPUR_LOW_NOISE; - _regs.f01 = max2871_regs_t::F01_FRAC_N; - _regs.aux_output_select = max2871_regs_t::AUX_OUTPUT_SELECT_DIVIDED; - } - else - { + _regs.f01 = max2871_regs_t::F01_FRAC_N; + _regs.aux_output_select = max2871_regs_t::AUX_OUTPUT_SELECT_DIVIDED; + } else { // Reset values to defaults - _regs.shutdown_vas = max2871_regs_t::SHUTDOWN_VAS_ENABLED; // turn VCO auto selection on + _regs.shutdown_vas = + max2871_regs_t::SHUTDOWN_VAS_ENABLED; // turn VCO auto selection on _regs.low_noise_and_spur = max2871_regs_t::LOW_NOISE_AND_SPUR_LOW_SPUR_2; - _regs.f01 = max2871_regs_t::F01_AUTO; - _regs.aux_output_select = max2871_regs_t::AUX_OUTPUT_SELECT_FUNDAMENTAL; + _regs.f01 = max2871_regs_t::F01_AUTO; + _regs.aux_output_select = max2871_regs_t::AUX_OUTPUT_SELECT_FUNDAMENTAL; } return freq; @@ -430,17 +418,18 @@ public: { max287x<max2871_regs_t>::commit(); - // According to Maxim support, the following factors must be true to allow for phase synchronization - if (_regs.int_n_mode == max2871_regs_t::INT_N_MODE_FRAC_N and - _regs.feedback_select == max2871_regs_t::FEEDBACK_SELECT_DIVIDED and - _regs.aux_output_select == max2871_regs_t::AUX_OUTPUT_SELECT_DIVIDED and - _regs.rf_divider_select <= max2871_regs_t::RF_DIVIDER_SELECT_DIV16 and - _regs.low_noise_and_spur == max2871_regs_t::LOW_NOISE_AND_SPUR_LOW_NOISE and - _regs.f01 == max2871_regs_t::F01_FRAC_N and - _regs.reference_doubler == max2871_regs_t::REFERENCE_DOUBLER_DISABLED and - _regs.reference_divide_by_2 == max2871_regs_t::REFERENCE_DIVIDE_BY_2_DISABLED and - _regs.r_counter_10_bit == 1) - { + // According to Maxim support, the following factors must be true to allow for + // phase synchronization + if (_regs.int_n_mode == max2871_regs_t::INT_N_MODE_FRAC_N + and _regs.feedback_select == max2871_regs_t::FEEDBACK_SELECT_DIVIDED + and _regs.aux_output_select == max2871_regs_t::AUX_OUTPUT_SELECT_DIVIDED + and _regs.rf_divider_select <= max2871_regs_t::RF_DIVIDER_SELECT_DIV16 + and _regs.low_noise_and_spur == max2871_regs_t::LOW_NOISE_AND_SPUR_LOW_NOISE + and _regs.f01 == max2871_regs_t::F01_FRAC_N + and _regs.reference_doubler == max2871_regs_t::REFERENCE_DOUBLER_DISABLED + and _regs.reference_divide_by_2 + == max2871_regs_t::REFERENCE_DIVIDE_BY_2_DISABLED + and _regs.r_counter_10_bit == 1) { _can_sync = true; } else { _can_sync = false; @@ -456,12 +445,12 @@ public: // include it here. template <typename max287x_regs_t> -max287x<max287x_regs_t>::max287x(write_fn func) : - _can_sync(false), - _config_for_sync(false), - _write_all_regs(true), - _write(func), - _delay_after_write(true) +max287x<max287x_regs_t>::max287x(write_fn func) + : _can_sync(false) + , _config_for_sync(false) + , _write_all_regs(true) + , _write(func) + , _delay_after_write(true) { power_up(); } @@ -469,16 +458,13 @@ max287x<max287x_regs_t>::max287x(write_fn func) : template <typename max287x_regs_t> max287x<max287x_regs_t>::~max287x() { - UHD_SAFE_CALL - ( - shutdown(); - ) + UHD_SAFE_CALL(shutdown();) } template <typename max287x_regs_t> void max287x<max287x_regs_t>::power_up(void) { - _regs.power_down = max287x_regs_t::POWER_DOWN_NORMAL; + _regs.power_down = max287x_regs_t::POWER_DOWN_NORMAL; _regs.double_buffer = max287x_regs_t::DOUBLE_BUFFER_ENABLED; // According to MAX287x data sheets: @@ -489,7 +475,7 @@ void max287x<max287x_regs_t>::power_up(void) // The first write and the 20ms wait are done here. The second write // is done when any other function that does a write to the registers // is called (such as tuning). - _write_all_regs = true; + _write_all_regs = true; _delay_after_write = true; commit(); _write_all_regs = true; // Next call to commit() writes all regs @@ -498,9 +484,9 @@ void max287x<max287x_regs_t>::power_up(void) template <typename max287x_regs_t> void max287x<max287x_regs_t>::shutdown(void) { - _regs.rf_output_enable = max287x_regs_t::RF_OUTPUT_ENABLE_DISABLED; + _regs.rf_output_enable = max287x_regs_t::RF_OUTPUT_ENABLE_DISABLED; _regs.aux_output_enable = max287x_regs_t::AUX_OUTPUT_ENABLE_DISABLED; - _regs.power_down = max287x_regs_t::POWER_DOWN_SHUTDOWN; + _regs.power_down = max287x_regs_t::POWER_DOWN_SHUTDOWN; commit(); } @@ -512,50 +498,48 @@ bool max287x<max287x_regs_t>::is_shutdown(void) template <typename max287x_regs_t> double max287x<max287x_regs_t>::set_frequency( - double target_freq, - double ref_freq, - double target_pfd_freq, - bool is_int_n) + double target_freq, double ref_freq, double target_pfd_freq, bool is_int_n) { - //map rf divider select output dividers to enums - static const uhd::dict<int, typename max287x_regs_t::rf_divider_select_t> rfdivsel_to_enum = - boost::assign::map_list_of - (1, max287x_regs_t::RF_DIVIDER_SELECT_DIV1) - (2, max287x_regs_t::RF_DIVIDER_SELECT_DIV2) - (4, max287x_regs_t::RF_DIVIDER_SELECT_DIV4) - (8, max287x_regs_t::RF_DIVIDER_SELECT_DIV8) - (16, max287x_regs_t::RF_DIVIDER_SELECT_DIV16) - (32, max287x_regs_t::RF_DIVIDER_SELECT_DIV32) - (64, max287x_regs_t::RF_DIVIDER_SELECT_DIV64) - (128, max287x_regs_t::RF_DIVIDER_SELECT_DIV128); - - //map mode setting to valid integer divider (N) values - static const uhd::range_t int_n_mode_div_range(16,65535,1); - static const uhd::range_t frac_n_mode_div_range(19,4091,1); - - //other ranges and constants from MAX287X datasheets - static const uhd::range_t clock_div_range(1,4095,1); - static const uhd::range_t r_range(1,1023,1); + // map rf divider select output dividers to enums + static const uhd::dict<int, typename max287x_regs_t::rf_divider_select_t> + rfdivsel_to_enum = + boost::assign::map_list_of(1, max287x_regs_t::RF_DIVIDER_SELECT_DIV1)( + 2, max287x_regs_t::RF_DIVIDER_SELECT_DIV2)( + 4, max287x_regs_t::RF_DIVIDER_SELECT_DIV4)( + 8, max287x_regs_t::RF_DIVIDER_SELECT_DIV8)( + 16, max287x_regs_t::RF_DIVIDER_SELECT_DIV16)( + 32, max287x_regs_t::RF_DIVIDER_SELECT_DIV32)( + 64, max287x_regs_t::RF_DIVIDER_SELECT_DIV64)( + 128, max287x_regs_t::RF_DIVIDER_SELECT_DIV128); + + // map mode setting to valid integer divider (N) values + static const uhd::range_t int_n_mode_div_range(16, 65535, 1); + static const uhd::range_t frac_n_mode_div_range(19, 4091, 1); + + // other ranges and constants from MAX287X datasheets + static const uhd::range_t clock_div_range(1, 4095, 1); + static const uhd::range_t r_range(1, 1023, 1); static const double MIN_VCO_FREQ = 3e9; - static const double BS_FREQ = 50e3; - static const int MAX_BS_VALUE = 1023; - - int T = 0; - int D = ref_freq <= 10.0e6 ? 1 : 0; - int R = 0; - int BS = 0; - int N = 0; - int FRAC = 0; - int MOD = 4095; - int RFdiv = 1; + static const double BS_FREQ = 50e3; + static const int MAX_BS_VALUE = 1023; + + int T = 0; + int D = ref_freq <= 10.0e6 ? 1 : 0; + int R = 0; + int BS = 0; + int N = 0; + int FRAC = 0; + int MOD = 4095; + int RFdiv = 1; double pfd_freq = target_pfd_freq; - bool feedback_divided = (_regs.feedback_select == max287x_regs_t::FEEDBACK_SELECT_DIVIDED); + bool feedback_divided = + (_regs.feedback_select == max287x_regs_t::FEEDBACK_SELECT_DIVIDED); - //increase RF divider until acceptable VCO frequency (MIN freq for MAX287x VCO is 3GHz) + // increase RF divider until acceptable VCO frequency (MIN freq for MAX287x VCO is + // 3GHz) UHD_ASSERT_THROW(target_freq > 0); double vco_freq = target_freq; - while (vco_freq < MIN_VCO_FREQ) - { + while (vco_freq < MIN_VCO_FREQ) { vco_freq *= 2; RFdiv *= 2; } @@ -580,56 +564,60 @@ double max287x<max287x_regs_t>::set_frequency( * N = f_vco/f_pfd - FRAC/MOD = f_vco*((R*(T+1))/(f_ref*(1+D))) - FRAC/MOD * f_rf = f_vco/RFdiv */ - for(R = int(ref_freq*(1+D)/(target_pfd_freq*(1+T))); R <= r_range.stop(); R++) - { - //PFD input frequency = f_ref/R ... ignoring Reference doubler/divide-by-2 (D & T) - pfd_freq = ref_freq*(1+D)/(R*(1+T)); + for (R = int(ref_freq * (1 + D) / (target_pfd_freq * (1 + T))); R <= r_range.stop(); + R++) { + // PFD input frequency = f_ref/R ... ignoring Reference doubler/divide-by-2 (D & + // T) + pfd_freq = ref_freq * (1 + D) / (R * (1 + T)); - //keep the PFD frequency at or below target + // keep the PFD frequency at or below target if (pfd_freq > target_pfd_freq) continue; - //ignore fractional part of tuning - N = int((vco_freq/pfd_freq)/fb_divisor); + // ignore fractional part of tuning + N = int((vco_freq / pfd_freq) / fb_divisor); - //Fractional-N calculation - FRAC = int(boost::math::round(((vco_freq/pfd_freq)/fb_divisor - N)*MOD)); + // Fractional-N calculation + FRAC = int(boost::math::round(((vco_freq / pfd_freq) / fb_divisor - N) * MOD)); - if(is_int_n) - { - if (FRAC > (MOD / 2)) //Round integer such that actual freq is closest to target + if (is_int_n) { + if (FRAC + > (MOD / 2)) // Round integer such that actual freq is closest to target N++; FRAC = 0; } - //keep N within int divider requirements - if(is_int_n) - { - if(N <= int_n_mode_div_range.start()) continue; - if(N >= int_n_mode_div_range.stop()) continue; - } - else - { - if(N <= frac_n_mode_div_range.start()) continue; - if(N >= frac_n_mode_div_range.stop()) continue; + // keep N within int divider requirements + if (is_int_n) { + if (N <= int_n_mode_div_range.start()) + continue; + if (N >= int_n_mode_div_range.stop()) + continue; + } else { + if (N <= frac_n_mode_div_range.start()) + continue; + if (N >= frac_n_mode_div_range.stop()) + continue; } - //keep pfd freq low enough to achieve 50kHz BS clock + // keep pfd freq low enough to achieve 50kHz BS clock BS = static_cast<int>(std::ceil(pfd_freq / BS_FREQ)); - if(BS <= MAX_BS_VALUE) break; + if (BS <= MAX_BS_VALUE) + break; } UHD_ASSERT_THROW(R <= r_range.stop()); - //Reference divide-by-2 for 50% duty cycle + // Reference divide-by-2 for 50% duty cycle // if R even, move one divide by 2 to to regs.reference_divide_by_2 - if(R % 2 == 0) - { + if (R % 2 == 0) { T = 1; R /= 2; } - //actual frequency calculation - double actual_freq = double((N + (double(FRAC)/double(MOD)))*ref_freq*(1+int(D))/(R*(1+int(T)))) * fb_divisor / RFdiv; + // actual frequency calculation + double actual_freq = double((N + (double(FRAC) / double(MOD))) * ref_freq + * (1 + int(D)) / (R * (1 + int(T)))) + * fb_divisor / RFdiv; UHD_LOGGER_TRACE("MAX287X") << boost::format("Intermediates: ref=%0.2f, outdiv=%f, fbdiv=%f") % ref_freq @@ -645,40 +633,38 @@ double max287x<max287x_regs_t>::set_frequency( % (target_freq / 1e6) % (actual_freq / 1e6) % (vco_freq / 1e6) % (pfd_freq / 1e6) % (pfd_freq / BS / 1e6); - //load the register values + // load the register values _regs.rf_output_enable = max287x_regs_t::RF_OUTPUT_ENABLE_ENABLED; - if(is_int_n) { - _regs.cpl = max287x_regs_t::CPL_DISABLED; - _regs.ldf = max287x_regs_t::LDF_INT_N; + if (is_int_n) { + _regs.cpl = max287x_regs_t::CPL_DISABLED; + _regs.ldf = max287x_regs_t::LDF_INT_N; _regs.int_n_mode = max287x_regs_t::INT_N_MODE_INT_N; } else { - _regs.cpl = max287x_regs_t::CPL_ENABLED; - _regs.ldf = max287x_regs_t::LDF_FRAC_N; + _regs.cpl = max287x_regs_t::CPL_ENABLED; + _regs.ldf = max287x_regs_t::LDF_FRAC_N; _regs.int_n_mode = max287x_regs_t::INT_N_MODE_FRAC_N; } _regs.lds = pfd_freq <= 32e6 ? max287x_regs_t::LDS_SLOW : max287x_regs_t::LDS_FAST; _regs.frac_12_bit = FRAC; - _regs.int_16_bit = N; - _regs.mod_12_bit = MOD; - _regs.clock_divider_12_bit = std::max(int(clock_div_range.start()), int(std::ceil(400e-6*pfd_freq/MOD))); + _regs.int_16_bit = N; + _regs.mod_12_bit = MOD; + _regs.clock_divider_12_bit = + std::max(int(clock_div_range.start()), int(std::ceil(400e-6 * pfd_freq / MOD))); UHD_ASSERT_THROW(_regs.clock_divider_12_bit <= clock_div_range.stop()); - _regs.r_counter_10_bit = R; - _regs.reference_divide_by_2 = T ? - max287x_regs_t::REFERENCE_DIVIDE_BY_2_ENABLED : - max287x_regs_t::REFERENCE_DIVIDE_BY_2_DISABLED; - _regs.reference_doubler = D ? - max287x_regs_t::REFERENCE_DOUBLER_ENABLED : - max287x_regs_t::REFERENCE_DOUBLER_DISABLED; + _regs.r_counter_10_bit = R; + _regs.reference_divide_by_2 = T ? max287x_regs_t::REFERENCE_DIVIDE_BY_2_ENABLED + : max287x_regs_t::REFERENCE_DIVIDE_BY_2_DISABLED; + _regs.reference_doubler = D ? max287x_regs_t::REFERENCE_DOUBLER_ENABLED + : max287x_regs_t::REFERENCE_DOUBLER_DISABLED; _regs.band_select_clock_div = BS & 0xFF; - _regs.bs_msb = (BS & 0x300) >> 8; + _regs.bs_msb = (BS & 0x300) >> 8; UHD_ASSERT_THROW(rfdivsel_to_enum.has_key(RFdiv)); _regs.rf_divider_select = rfdivsel_to_enum[RFdiv]; - if (_regs.clock_div_mode == max287x_regs_t::CLOCK_DIV_MODE_FAST_LOCK) - { + if (_regs.clock_div_mode == max287x_regs_t::CLOCK_DIV_MODE_FAST_LOCK) { // Charge pump current needs to be set to lowest value in fast lock mode _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_0_32MA; // Make sure the register containing the charge pump current is written @@ -691,165 +677,163 @@ double max287x<max287x_regs_t>::set_frequency( template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_output_power(output_power_t power) { - switch (power) - { - case OUTPUT_POWER_M4DBM: - _regs.output_power = max287x_regs_t::OUTPUT_POWER_M4DBM; - break; - case OUTPUT_POWER_M1DBM: - _regs.output_power = max287x_regs_t::OUTPUT_POWER_M1DBM; - break; - case OUTPUT_POWER_2DBM: - _regs.output_power = max287x_regs_t::OUTPUT_POWER_2DBM; - break; - case OUTPUT_POWER_5DBM: - _regs.output_power = max287x_regs_t::OUTPUT_POWER_5DBM; - break; - default: - UHD_THROW_INVALID_CODE_PATH(); + switch (power) { + case OUTPUT_POWER_M4DBM: + _regs.output_power = max287x_regs_t::OUTPUT_POWER_M4DBM; + break; + case OUTPUT_POWER_M1DBM: + _regs.output_power = max287x_regs_t::OUTPUT_POWER_M1DBM; + break; + case OUTPUT_POWER_2DBM: + _regs.output_power = max287x_regs_t::OUTPUT_POWER_2DBM; + break; + case OUTPUT_POWER_5DBM: + _regs.output_power = max287x_regs_t::OUTPUT_POWER_5DBM; + break; + default: + UHD_THROW_INVALID_CODE_PATH(); } } template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_ld_pin_mode(ld_pin_mode_t mode) { - switch(mode) - { - case LD_PIN_MODE_LOW: - _regs.ld_pin_mode = max287x_regs_t::LD_PIN_MODE_LOW; - break; - case LD_PIN_MODE_DLD: - _regs.ld_pin_mode = max287x_regs_t::LD_PIN_MODE_DLD; - break; - case LD_PIN_MODE_ALD: - _regs.ld_pin_mode = max287x_regs_t::LD_PIN_MODE_ALD; - break; - case LD_PIN_MODE_HIGH: - _regs.ld_pin_mode = max287x_regs_t::LD_PIN_MODE_HIGH; - break; - default: - UHD_THROW_INVALID_CODE_PATH(); + switch (mode) { + case LD_PIN_MODE_LOW: + _regs.ld_pin_mode = max287x_regs_t::LD_PIN_MODE_LOW; + break; + case LD_PIN_MODE_DLD: + _regs.ld_pin_mode = max287x_regs_t::LD_PIN_MODE_DLD; + break; + case LD_PIN_MODE_ALD: + _regs.ld_pin_mode = max287x_regs_t::LD_PIN_MODE_ALD; + break; + case LD_PIN_MODE_HIGH: + _regs.ld_pin_mode = max287x_regs_t::LD_PIN_MODE_HIGH; + break; + default: + UHD_THROW_INVALID_CODE_PATH(); } } template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_muxout_mode(muxout_mode_t mode) { - switch(mode) - { - case MUXOUT_TRI_STATE: - _regs.muxout = max287x_regs_t::MUXOUT_TRI_STATE; - break; - case MUXOUT_HIGH: - _regs.muxout = max287x_regs_t::MUXOUT_HIGH; - break; - case MUXOUT_LOW: - _regs.muxout = max287x_regs_t::MUXOUT_LOW; - break; - case MUXOUT_RDIV: - _regs.muxout = max287x_regs_t::MUXOUT_RDIV; - break; - case MUXOUT_NDIV: - _regs.muxout = max287x_regs_t::MUXOUT_NDIV; - break; - case MUXOUT_ALD: - _regs.muxout = max287x_regs_t::MUXOUT_ALD; - break; - case MUXOUT_DLD: - _regs.muxout = max287x_regs_t::MUXOUT_DLD; - break; - default: - UHD_THROW_INVALID_CODE_PATH(); + switch (mode) { + case MUXOUT_TRI_STATE: + _regs.muxout = max287x_regs_t::MUXOUT_TRI_STATE; + break; + case MUXOUT_HIGH: + _regs.muxout = max287x_regs_t::MUXOUT_HIGH; + break; + case MUXOUT_LOW: + _regs.muxout = max287x_regs_t::MUXOUT_LOW; + break; + case MUXOUT_RDIV: + _regs.muxout = max287x_regs_t::MUXOUT_RDIV; + break; + case MUXOUT_NDIV: + _regs.muxout = max287x_regs_t::MUXOUT_NDIV; + break; + case MUXOUT_ALD: + _regs.muxout = max287x_regs_t::MUXOUT_ALD; + break; + case MUXOUT_DLD: + _regs.muxout = max287x_regs_t::MUXOUT_DLD; + break; + default: + UHD_THROW_INVALID_CODE_PATH(); } } template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_charge_pump_current(charge_pump_current_t cp_current) { - switch(cp_current) - { - case CHARGE_PUMP_CURRENT_0_32MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_0_32MA; - break; - case CHARGE_PUMP_CURRENT_0_64MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_0_64MA; - break; - case CHARGE_PUMP_CURRENT_0_96MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_0_96MA; - break; - case CHARGE_PUMP_CURRENT_1_28MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_1_28MA; - break; - case CHARGE_PUMP_CURRENT_1_60MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_1_60MA; - break; - case CHARGE_PUMP_CURRENT_1_92MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_1_92MA; - break; - case CHARGE_PUMP_CURRENT_2_24MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_2_24MA; - break; - case CHARGE_PUMP_CURRENT_2_56MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_2_56MA; - break; - case CHARGE_PUMP_CURRENT_2_88MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_2_88MA; - break; - case CHARGE_PUMP_CURRENT_3_20MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_3_20MA; - break; - case CHARGE_PUMP_CURRENT_3_52MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_3_52MA; - break; - case CHARGE_PUMP_CURRENT_3_84MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_3_84MA; - break; - case CHARGE_PUMP_CURRENT_4_16MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_4_16MA; - break; - case CHARGE_PUMP_CURRENT_4_48MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_4_48MA; - break; - case CHARGE_PUMP_CURRENT_4_80MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_4_80MA; - break; - case CHARGE_PUMP_CURRENT_5_12MA: - _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_5_12MA; - break; - default: - UHD_THROW_INVALID_CODE_PATH(); + switch (cp_current) { + case CHARGE_PUMP_CURRENT_0_32MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_0_32MA; + break; + case CHARGE_PUMP_CURRENT_0_64MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_0_64MA; + break; + case CHARGE_PUMP_CURRENT_0_96MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_0_96MA; + break; + case CHARGE_PUMP_CURRENT_1_28MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_1_28MA; + break; + case CHARGE_PUMP_CURRENT_1_60MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_1_60MA; + break; + case CHARGE_PUMP_CURRENT_1_92MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_1_92MA; + break; + case CHARGE_PUMP_CURRENT_2_24MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_2_24MA; + break; + case CHARGE_PUMP_CURRENT_2_56MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_2_56MA; + break; + case CHARGE_PUMP_CURRENT_2_88MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_2_88MA; + break; + case CHARGE_PUMP_CURRENT_3_20MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_3_20MA; + break; + case CHARGE_PUMP_CURRENT_3_52MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_3_52MA; + break; + case CHARGE_PUMP_CURRENT_3_84MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_3_84MA; + break; + case CHARGE_PUMP_CURRENT_4_16MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_4_16MA; + break; + case CHARGE_PUMP_CURRENT_4_48MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_4_48MA; + break; + case CHARGE_PUMP_CURRENT_4_80MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_4_80MA; + break; + case CHARGE_PUMP_CURRENT_5_12MA: + _regs.charge_pump_current = max287x_regs_t::CHARGE_PUMP_CURRENT_5_12MA; + break; + default: + UHD_THROW_INVALID_CODE_PATH(); } } template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_auto_retune(bool enabled) { - _regs.retune = enabled ? max287x_regs_t::RETUNE_ENABLED : max287x_regs_t::RETUNE_DISABLED; + _regs.retune = enabled ? max287x_regs_t::RETUNE_ENABLED + : max287x_regs_t::RETUNE_DISABLED; } template <> inline void max287x<max2871_regs_t>::set_auto_retune(bool enabled) { - _regs.retune = enabled ? max2871_regs_t::RETUNE_ENABLED : max2871_regs_t::RETUNE_DISABLED; - _regs.vas_dly = enabled ? max2871_regs_t::VAS_DLY_ENABLED : max2871_regs_t::VAS_DLY_DISABLED; + _regs.retune = enabled ? max2871_regs_t::RETUNE_ENABLED + : max2871_regs_t::RETUNE_DISABLED; + _regs.vas_dly = enabled ? max2871_regs_t::VAS_DLY_ENABLED + : max2871_regs_t::VAS_DLY_DISABLED; } template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_clock_divider_mode(clock_divider_mode_t mode) { - switch(mode) - { - case CLOCK_DIV_MODE_CLOCK_DIVIDER_OFF: - _regs.clock_div_mode = max287x_regs_t::CLOCK_DIV_MODE_CLOCK_DIVIDER_OFF; - break; - case CLOCK_DIV_MODE_FAST_LOCK: - _regs.clock_div_mode = max287x_regs_t::CLOCK_DIV_MODE_FAST_LOCK; - break; - case CLOCK_DIV_MODE_PHASE: - _regs.clock_div_mode = max287x_regs_t::CLOCK_DIV_MODE_PHASE; - break; - default: - UHD_THROW_INVALID_CODE_PATH(); + switch (mode) { + case CLOCK_DIV_MODE_CLOCK_DIVIDER_OFF: + _regs.clock_div_mode = max287x_regs_t::CLOCK_DIV_MODE_CLOCK_DIVIDER_OFF; + break; + case CLOCK_DIV_MODE_FAST_LOCK: + _regs.clock_div_mode = max287x_regs_t::CLOCK_DIV_MODE_FAST_LOCK; + break; + case CLOCK_DIV_MODE_PHASE: + _regs.clock_div_mode = max287x_regs_t::CLOCK_DIV_MODE_PHASE; + break; + default: + UHD_THROW_INVALID_CODE_PATH(); } } @@ -857,25 +841,25 @@ template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_cycle_slip_mode(bool enabled) { if (enabled) - throw uhd::runtime_error("Cycle slip mode not supported on this MAX287x synthesizer."); + throw uhd::runtime_error( + "Cycle slip mode not supported on this MAX287x synthesizer."); } template <typename max287x_regs_t> void max287x<max287x_regs_t>::set_low_noise_and_spur(low_noise_and_spur_t mode) { - switch(mode) - { - case LOW_NOISE_AND_SPUR_LOW_NOISE: - _regs.low_noise_and_spur = max287x_regs_t::LOW_NOISE_AND_SPUR_LOW_NOISE; - break; - case LOW_NOISE_AND_SPUR_LOW_SPUR_1: - _regs.low_noise_and_spur = max287x_regs_t::LOW_NOISE_AND_SPUR_LOW_SPUR_1; - break; - case LOW_NOISE_AND_SPUR_LOW_SPUR_2: - _regs.low_noise_and_spur = max287x_regs_t::LOW_NOISE_AND_SPUR_LOW_SPUR_2; - break; - default: - UHD_THROW_INVALID_CODE_PATH(); + switch (mode) { + case LOW_NOISE_AND_SPUR_LOW_NOISE: + _regs.low_noise_and_spur = max287x_regs_t::LOW_NOISE_AND_SPUR_LOW_NOISE; + break; + case LOW_NOISE_AND_SPUR_LOW_SPUR_1: + _regs.low_noise_and_spur = max287x_regs_t::LOW_NOISE_AND_SPUR_LOW_SPUR_1; + break; + case LOW_NOISE_AND_SPUR_LOW_SPUR_2: + _regs.low_noise_and_spur = max287x_regs_t::LOW_NOISE_AND_SPUR_LOW_SPUR_2; + break; + default: + UHD_THROW_INVALID_CODE_PATH(); } } @@ -892,21 +876,18 @@ void max287x<max287x_regs_t>::commit() std::set<uint32_t> changed_regs; // Get only regs with changes - if (_write_all_regs) - { + if (_write_all_regs) { for (int addr = 5; addr >= 0; addr--) regs.push_back(_regs.get_reg(uint32_t(addr))); } else { try { - changed_regs = _regs.template get_changed_addrs<uint32_t> (); + changed_regs = _regs.template get_changed_addrs<uint32_t>(); // register 0 must be written to apply double buffered fields - if (changed_regs.size() > 0) - { + if (changed_regs.size() > 0) { changed_regs.insert(0); } - for (int addr = 5; addr >= 0; addr--) - { + for (int addr = 5; addr >= 0; addr--) { if (changed_regs.find(uint32_t(addr)) != changed_regs.end()) regs.push_back(_regs.get_reg(uint32_t(addr))); } @@ -921,8 +902,7 @@ void max287x<max287x_regs_t>::commit() _regs.save_state(); _write_all_regs = false; - if (_delay_after_write) - { + if (_delay_after_write) { std::this_thread::sleep_for(std::chrono::milliseconds(20)); _delay_after_write = false; } |