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-rw-r--r--host/lib/ic_reg_maps/common.py68
1 files changed, 63 insertions, 5 deletions
diff --git a/host/lib/ic_reg_maps/common.py b/host/lib/ic_reg_maps/common.py
index d05470706..4aa1ef35e 100644
--- a/host/lib/ic_reg_maps/common.py
+++ b/host/lib/ic_reg_maps/common.py
@@ -16,23 +16,69 @@
#
import re
+import sys
import math
from Cheetah.Template import Template
+COMMON_TMPL = """\
+#import time
+/***********************************************************************
+ * This file was generated by $file on $time.strftime("%c")
+ **********************************************************************/
+
+\#ifndef INCLUDED_$(name.upper())_HPP
+\#define INCLUDED_$(name.upper())_HPP
+
+\#include <boost/cstdint.hpp>
+
+struct $(name)_t{
+
+ #for $reg in $regs
+ #if $reg.get_enums()
+ enum $reg.get_type(){
+ #for $i, $enum in enumerate($reg.get_enums())
+ #set $end_comma = ',' if $i < len($reg.get_enums())-1 else ''
+ $(reg.get_name().upper())_$(enum[0].upper()) = $enum[1]$end_comma
+ #end for
+ };
+ #end if
+ $reg.get_type() $reg.get_name();
+ #end for
+
+ $(name)_t(void){
+ #for $reg in $regs
+ $reg.get_name() = $reg.get_default();
+ #end for
+ }
+
+$body
+
+};
+
+\#endif /* INCLUDED_$(name.upper())_HPP */
+"""
+
def parse_tmpl(_tmpl_text, **kwargs):
return str(Template(_tmpl_text, kwargs))
+def to_num(arg): return eval(arg)
+
class reg:
def __init__(self, reg_des):
+ try: self.parse(reg_des)
+ except Exception, e:
+ raise Exception, 'Error parsing register description: "%s"\nWhat: %s'%(reg_des, e)
+
+ def parse(self, reg_des):
x = re.match('^(\w*)\s*(\w*)\[(.*)\]\s*(\w*)\s*(.*)$', reg_des)
name, addr, bit_range, default, enums = x.groups()
#store variables
self._name = name
- self._addr = int(addr, 16)
+ self._addr = to_num(addr)
if ':' in bit_range: self._addr_spec = sorted(map(int, bit_range.split(':')))
else: self._addr_spec = int(bit_range), int(bit_range)
- self._default = int(default, 16)
+ self._default = to_num(default)
#extract enum
self._enums = list()
@@ -41,7 +87,7 @@ class reg:
for enum_str in map(str.strip, enums.split(',')):
if '=' in enum_str:
enum_name, enum_val = enum_str.split('=')
- enum_val = int(enum_val)
+ enum_val = to_num(enum_val)
else: enum_name = enum_str
self._enums.append((enum_name, enum_val))
enum_val += 1
@@ -53,8 +99,20 @@ class reg:
for key, val in self.get_enums():
if val == self._default: return str.upper('%s_%s'%(self.get_name(), key))
return self._default
- def get_stdint_type(self):\
- return 'uint%d_t'%max(2**math.ceil(math.log(self.get_bit_width(), 2)), 8)
+ def get_type(self):
+ if self.get_enums(): return '%s_t'%self.get_name()
+ return 'boost::uint%d_t'%max(2**math.ceil(math.log(self.get_bit_width(), 2)), 8)
def get_shift(self): return self._addr_spec[0]
def get_mask(self): return hex(int('1'*self.get_bit_width(), 2))
def get_bit_width(self): return self._addr_spec[1] - self._addr_spec[0] + 1
+
+def generate(name, regs_tmpl, body_tmpl='', file=__file__):
+ regs = map(reg, parse_tmpl(regs_tmpl).splitlines())
+ body = parse_tmpl(body_tmpl, regs=regs).replace('\n', '\n ').strip()
+ code = parse_tmpl(COMMON_TMPL,
+ name=name,
+ regs=regs,
+ body=body,
+ file=file,
+ )
+ open(sys.argv[1], 'w').write(code)