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-rw-r--r--host/examples/rfnoc-example/fpga/rfnoc_block_gain/Makefile26
1 files changed, 21 insertions, 5 deletions
diff --git a/host/examples/rfnoc-example/fpga/rfnoc_block_gain/Makefile b/host/examples/rfnoc-example/fpga/rfnoc_block_gain/Makefile
index 1ff3046ee..0239041b9 100644
--- a/host/examples/rfnoc-example/fpga/rfnoc_block_gain/Makefile
+++ b/host/examples/rfnoc-example/fpga/rfnoc_block_gain/Makefile
@@ -19,24 +19,40 @@ include $(BASE_DIR)/../tools/make/viv_sim_preamble.mak
#-------------------------------------------------
# Design Specific
#-------------------------------------------------
+
+# In-tree IP
+LIB_IP_DIR = $(BASE_DIR)/../lib/ip
+include $(LIB_IP_DIR)/complex_multiplier/Makefile.inc
+
+# Out-of-tree IP
+OOT_FPGA_DIR = $(dir $(abspath $(firstword $(MAKEFILE_LIST))))/../
+include $(OOT_FPGA_DIR)/ip/cmplx_mul/Makefile.inc
+
# Include makefiles and sources for the DUT and its
# dependencies.
+include $(BASE_DIR)/../lib/rfnoc/Makefile.srcs
include $(BASE_DIR)/../lib/rfnoc/core/Makefile.srcs
include $(BASE_DIR)/../lib/rfnoc/utils/Makefile.srcs
include Makefile.srcs
-DESIGN_SRCS += $(abspath \
-$(RFNOC_CORE_SRCS) \
-$(RFNOC_UTIL_SRCS) \
-$(RFNOC_OOT_SRCS) \
+DESIGN_SRCS += $(abspath \
+$(RFNOC_SRCS) \
+$(RFNOC_CORE_SRCS) \
+$(RFNOC_UTIL_SRCS) \
+$(RFNOC_OOT_SRCS) \
+$(LIB_IP_CMPLX_MUL_SRCS) \
+$(LIB_IP_COMPLEX_MULTIPLIER_SRCS) \
)
#-------------------------------------------------
# Testbench Specific
#-------------------------------------------------
-SIM_TOP = rfnoc_block_gain_tb
+SIM_TOP = rfnoc_block_gain_tb glbl
SIM_SRCS = \
+$(abspath $(IP_BUILD_DIR)/cmplx_mul/sim/cmplx_mul.vhd) \
+$(abspath $(IP_BUILD_DIR)/complex_multiplier/sim/complex_multiplier.vhd) \
$(abspath rfnoc_block_gain_tb.sv) \
+$(VIVADO_PATH)/data/verilog/src/glbl.v \
#-------------------------------------------------
# Bottom-of-Makefile