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-rw-r--r--fpga/usrp3/top/x400/dboards/zbx/cpld/register_endpoints/basic_regs.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga/usrp3/top/x400/dboards/zbx/cpld/register_endpoints/basic_regs.v b/fpga/usrp3/top/x400/dboards/zbx/cpld/register_endpoints/basic_regs.v
index 3c218de17..b208c020b 100644
--- a/fpga/usrp3/top/x400/dboards/zbx/cpld/register_endpoints/basic_regs.v
+++ b/fpga/usrp3/top/x400/dboards/zbx/cpld/register_endpoints/basic_regs.v
@@ -150,7 +150,7 @@ endmodule
// This enum is used to create the constants held in the basic registers in both verilog and vhdl.
// </info>
// <value name="BOARD_ID_VALUE" integer="0x4002"/>
-// <value name="CPLD_REVISION" integer="0x21031009"/>
+// <value name="CPLD_REVISION" integer="0x21111614"/>
// <value name="OLDEST_CPLD_REVISION" integer="0x20110611"/>
// </enumeratedtype>
//